bb466331e7
Simplify FastISel's constructor argument list, make the FastISel
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class hold a MachineRegisterInfo member, and make the
MachineBasicBlock be passed in to SelectInstructions rather
than the FastISel constructor.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55076 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-20 21:05:57 +00:00
cb34cd7b5e
Make more use of the BuildMI API.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55072 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-20 18:16:32 +00:00
4cbe0662ab
Minor code reorganization.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55071 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-20 18:10:48 +00:00
77ad79689d
Minor whitespace cleanup.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55070 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-20 18:09:38 +00:00
b7864a9e23
Fix 80 column violation.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55069 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-20 18:09:02 +00:00
e6798b757a
Fix FastISel to recognize that the last block in the function does
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not have a fall-through successor.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55033 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-20 01:17:01 +00:00
a7f2dff98e
Fix FastISel to recognize unhandled operands, such as constants
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that aren't available as virtual registers (for now).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55026 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-20 00:35:17 +00:00
8014e86580
Add FastISel support for floating-point operations.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55021 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-20 00:23:20 +00:00
bdedd44773
Add FastISel support for several more binary operators.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55020 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-20 00:11:48 +00:00
6f2766d597
Support unconditional fall-through branches in FastISel.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55014 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-19 22:31:46 +00:00
8133a52eb5
Use the BuildMI overload that sets up a destination register
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instead of the one that doesn't and then adding it manually.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55006 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-19 20:46:54 +00:00
32155acb8a
Handle the case where target-specific fastisel code doesn't have
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a desired opcode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55005 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-19 20:43:22 +00:00
e285a74f7c
Make FastISel's constructor protected, and give it a destructor.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54793 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-14 21:51:29 +00:00
b0cf29c5cf
Initial checkin of the new "fast" instruction selection support. See
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the comments in FastISelEmitter.cpp for details on what this is.
This is currently experimental and unusable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54751 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-13 20:19:35 +00:00
