Commit Graph

30007 Commits

Author SHA1 Message Date
Brendon Cahoon
6912fe6f35 [Hexagon] Remove dead constant assignment in hardware loop pass
After converting a loop to a hardware loop, the pass should remove
any unnecessary instructions from the old compare-and-branch
code. This patch removes a dead constant assignment that was
used in the compare instruction.

Differential Revision: http://reviews.llvm.org/D9720


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237373 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-14 17:31:40 +00:00
Toma Tabacu
e6f281a2ff [mips] [IAS] Enforce .set nomacro.
Summary: When used, ".set nomacro" causes warning messages to be reported when we expand pseudo-instructions to multiple machine instructions.

Reviewers: dsanders

Reviewed By: dsanders

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D9564

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237366 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-14 14:51:32 +00:00
Brendon Cahoon
23b0065f29 [Hexagon] Check for underflow/wrap in hardware loop pass
If the loop trip count may underflow or wrap, the compiler should
not generate a hardware loop since the trip count will be
incorrect.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237365 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-14 14:15:08 +00:00
Toma Tabacu
7c7cbd2669 [mips] [IAS] Emit .set macro/nomacro.
Reviewers: dsanders

Reviewed By: dsanders

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D9563

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237363 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-14 13:42:10 +00:00
Vasileios Kalintiris
2f29498a6b [mips] Do not place users of $ra in the delay slot of call instructions.
Summary:
When we are trying to fill the delay slot of a call instruction, we must avoid
filler instructions that use the $ra register. This fixes the test
MultiSource/Applications/JM/lencod when we enable the forward delay slot filler.

Reviewers: dsanders

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D9670

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237362 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-14 13:17:56 +00:00
Artyom Skrobov
9ce56af1eb Re-apply r237247 - [AArch64] Codegen VMAX/VMIN for safe math cases
No longer breaks SPEC2000/2006



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237361 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-14 12:59:46 +00:00
Adam Nemet
dd469afe15 New Loop Distribution pass
Summary:
This implements the initial version as was proposed earlier this year
(http://lists.cs.uiuc.edu/pipermail/llvmdev/2015-January/080462.html).
Since then Loop Access Analysis was split out from the Loop Vectorizer
and was made into a separate analysis pass.  Loop Distribution becomes
the second user of this analysis.

The pass is off by default and can be enabled
with -enable-loop-distribution.  There is currently no notion of
profitability; if there is a loop with dependence cycles, the pass will
try to split them off from other memory operations into a separate loop.

I decided to remove the control-dependence calculation from this first
version.  This and the issues with the PDT are actively discussed so it
probably makes sense to treat it separately.  Right now I just mark all
terminator instruction required which keeps identical CFGs for each
distributed loop.  This seems to be working pretty well for 456.hmmer
where even though there is an empty if-then block in the distributed
loop initially, it gets completely removed.

The pass keeps DominatorTree and LoopInfo updated.  I've tested this
with -loop-distribute-verify with the testsuite where we distribute ~90
loops.  SimplifyLoop is violated in some cases and I have a FIXME
covering this.

Reviewers: hfinkel, nadav, aschwaighofer

Reviewed By: aschwaighofer

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D8831

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237358 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-14 12:05:18 +00:00
Toma Tabacu
78549eb45b [mips] [IAS] Warn when LA is used with a 64-bit symbol.
Reviewers: dsanders

Reviewed By: dsanders

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D9295

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237356 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-14 10:53:40 +00:00
Elena Demikhovsky
2fa91afc46 AVX-512: Added i1 type handling for calling conventions.
i1 type is a legal type on AVX-512 and can be passed as parameter or return value.
i1 is promoted to i8 on return and to i32 for call arguments (i8 is also promoted to i32 here).
The result code is similar to the previous X86 targets, where i1 is allways promoted to i8.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237350 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-14 09:04:45 +00:00
Andy Ayers
edd2bb863e Don't omit the constant when computing a cross-section relative relocation.
Differential Revision: http://reviews.llvm.org/D9692

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237327 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-14 01:10:41 +00:00
Ahmed Bougacha
d8b3f0d785 [CodeGen] Use standard -not gnueabi- naming for f16 libcalls on Darwin.
Other targets probably should as well.  Since r237161, compiler-rt has
both, but I don't see why anything other than gnueabi would use a
gnueabi naming scheme.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237324 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-14 01:00:51 +00:00
Alex Lorenz
b96942f6ec YAML: Implement block scalar parsing.
This commit implements the parsing of YAML block scalars.
Some code existed for it before, but it couldn't parse block
scalars.

This commit adds a new yaml node type to represent the block
scalar values. 

This commit also deletes the 'spec-09-27' and 'spec-09-28' tests
as they are identical to the test file 'spec-09-26'.

This commit introduces 3 new utility functions to the YAML scanner
class: `skip_s_space`, `advanceWhile` and `consumeLineBreakIfPresent`.

Reviewers: Duncan P. N. Exon Smith

Differential Revision: http://reviews.llvm.org/D9503


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237314 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-13 23:10:51 +00:00
Douglas Katzman
a8a342bb41 [X86] Fix PR23271 - RIP-relative decoding bug in disassembler.
Differential Revision: http://reviews.llvm.org/D9110

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237310 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-13 22:44:52 +00:00
Justin Bogner
98f0f26fdf InstrProf: Fix display of large numbers in llvm-cov
llvm-cov was truncating numbers that were larger than a particular
fixed width, which is as confusing as it is useless. Instead, we use
engineering notation with SI prefix for magnitude.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237307 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-13 22:41:48 +00:00
Sanjoy Das
3f0ca03e94 [PlaceSafepoints] New attributes for patchable statepoints.
Summary:
This patch teaches the PlaceSafepoints pass about two `CallSite`
function attributes:

 * "statepoint-id": if the string value of this attribute can be parsed
   as an integer, then it is propagated to the ID parameter of the
   statepoint created.

 * "statepoint-num-patch-bytes": if the string value of this attribute
   can be parsed as an integer, then it is propagated to the `num patch
   bytes` parameter of the statepoint created.

This change intentionally does not assert on a malformed value for these
attributes, given that they're not "official" attributes.

Reviewers: reames, pgavlin

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D9735

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237286 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-13 20:11:31 +00:00
Jingyue Wu
12b5fa5f6e [NaryReassociate] avoid running forever
Avoid running forever by checking we are not reassociating an expression into
the same form.

Tested with @avoid_infinite_loops in nary-add.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237269 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-13 18:12:24 +00:00
Brendon Cahoon
a036cd4093 [Hexagon] Generate loop1 instruction for nested loops
loop1 is for the outer loop and loop0 is for the inner loop.

Differential Revision: http://reviews.llvm.org/D9680


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237266 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-13 17:56:03 +00:00
Diego Novillo
0e0929ed98 Add function entry counts from sample profiles.
This patch uses the new function profile metadata "function_entry_count"
to annotate entry counts from sample profiles.

In a sampling profile, the total samples collected at the function entry
are an approximation for the number of times that function was invoked.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237265 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-13 17:04:29 +00:00
Diego Novillo
a3bccceda7 Add function entry count metadata.
Summary:
This adds three Function methods to handle function entry counts:
setEntryCount() and getEntryCount().

Entry counts are stored under the MD_prof metadata node with the name
"function_entry_count". They are unsigned 64 bit values set by profilers
(instrumentation and sample profiler changes coming up).

Added documentation for new profile metadata and tests.

Reviewers: dexonsmith, bogner

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D9628

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237260 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-13 15:13:45 +00:00
Brendon Cahoon
e55e117ad3 [Hexagon] Generate hardware loop when loop has a critical edge
The hardware loop pass should try to generate a hardware loop
instruction when the original loop has a critical edge.

Differential Revision: http://reviews.llvm.org/D9678


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237258 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-13 14:54:24 +00:00
Jozef Kolek
cdecddaf1e [mips][microMIPSr6] Implement CLO and CLZ instructions
This patch implements CLO and CLZ instructions using mapping.

Differential Revision: http://reviews.llvm.org/D8553


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237257 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-13 14:18:11 +00:00
Silviu Baranga
b937dadfb2 Revert r237247 - [AArch64] Codegen VMAX/VMIN.. as it is causing failures in SPEC2000/2006
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237256 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-13 14:03:18 +00:00
Toma Tabacu
c617a13a2e [mips] [IAS] Unify common functionality of LA and LI.
Summary: A side-effect of this is that LA gains proper handling of unsigned and positive signed 16-bit immediates and more accurate error messages.

Reviewers: dsanders

Reviewed By: dsanders

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D9290

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237255 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-13 13:56:16 +00:00
Artyom Skrobov
e8dceea402 [AArch64] Codegen VMAX/VMIN for safe math cases
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237247 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-13 12:01:09 +00:00
Michael Kuperstein
66112dd7f8 Reverting r237234, "Use std::bitset for SubtargetFeatures"
The buildbots are still not satisfied.
MIPS and ARM are failing (even though at least MIPS was expected to pass).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237245 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-13 10:28:46 +00:00
Toma Tabacu
4d8e3c44c1 [mips] [IAS] Merge the micromips-expressions.s test into expr1.s. NFC.
Summary: Also did some minor reformatting in the resulting test.

Reviewers: dsanders

Reviewed By: dsanders

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D9702

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237242 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-13 09:53:53 +00:00
Sergey Dmitrouk
6eb9a62fe0 [DebugInfo] Debug locations for constant SD nodes
Several updates for [DebugInfo] Add debug locations to constant SD nodes (r235989).
Includes:

 *  re-enabling the change (disabled recently);
 *  missing change for FP constants;
 *  resetting debug location of constant node if it's used more than at one place
    to prevent emission of wrong locations in case of coalesced constants;
 *  a couple of additional tests.

Now all look ups in CSEMap are wrapped by additional method.

Comment in D9084 suggests that debug locations aren't useful for "target constants",
so there might be one more change related to this API (namely, dropping debug
locations for getTarget*Constant methods).

Differential Revision: http://reviews.llvm.org/D9604

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237237 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-13 08:58:03 +00:00
Michael Kuperstein
1336daad86 Use std::bitset for SubtargetFeatures
Previously, subtarget features were a bitfield with the underlying type being uint64_t. 
Since several targets (X86 and ARM, in particular) have hit or were very close to hitting this bound, switching the features to use a bitset.
No functional change.

The first two times this was committed (r229831, r233055), it caused several buildbot failures. 
At least some of the ARM and MIPS ones were due to gcc/binutils issues, and should now be fixed.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237234 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-13 08:27:08 +00:00
Elena Demikhovsky
d5c1ae7e36 AVX-512: fixed a bug in encoding of VPSRAQ instrcution,
added a bunch of encoding tests.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237232 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-13 07:35:05 +00:00
Jingyue Wu
3062272092 [SLSR] handles non-canonicalized Mul candidates
such as (2 + B) * S.

Tested by @non_canonicalized in slsr-mul.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237216 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-13 00:03:17 +00:00
Sanjoy Das
ead2d1fbe0 [Statepoints] Support for "patchable" statepoints.
Summary:
This change adds two new parameters to the statepoint intrinsic, `i64 id`
and `i32 num_patch_bytes`.  `id` gets propagated to the ID field
in the generated StackMap section.  If the `num_patch_bytes` is
non-zero then the statepoint is lowered to `num_patch_bytes` bytes of
nops instead of a call (the spill and reload code remains unchanged).
A non-zero `num_patch_bytes` is useful in situations where a language
runtime requires complete control over how a call is lowered.

This change brings statepoints one step closer to patchpoints.  With
some additional work (that is not part of this patch) it should be
possible to get rid of `TargetOpcode::STATEPOINT` altogether.

PlaceSafepoints generates `statepoint` wrappers with `id` set to
`0xABCDEF00` (the old default value for the ID reported in the stackmap)
and `num_patch_bytes` set to `0`.  This can be made more sophisticated
later.

Reviewers: reames, pgavlin, swaroop.sridhar, AndyAyers

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D9546

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237214 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-12 23:52:24 +00:00
Saleem Abdulrasool
82550fed5c CodeGen: ignore DEBUG_VALUE nodes in KILL tagging
DEBUG_VALUE nodes do not take part in code generation.  Ignore them when
performing KILL updates.  Addresses PR23486.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237211 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-12 23:36:18 +00:00
Chandler Carruth
42042e5c3f Revert r237175: [X86] Always return the sret parameter in eax/rax ...
This commit broke an x86 test and the bots have been broken for well
over an hour now so I'm just reverting.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237210 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-12 23:34:27 +00:00
Bjorn Steinbrink
1b8b7d61ee CVP: Improve handling of Selects used as incoming PHI values
Summary:
If the branch that leads to the PHI node and the Select instruction
depend on correlated conditions, we might be able to directly use the
corresponding value from the Select instruction as the incoming value
for the PHI node, allowing later removal of the select instruction.

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D9051

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237201 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-12 22:31:47 +00:00
Philip Reames
6865b977ae [RewriteStatepointsForGC] Extend base pointer to handle more cases w/vectors
When relocating a pointer, we need to determine a base pointer for the derived pointer being relocated. We have limited support for handling a pointer extracted from a vector; the current code only handled the case where the entire vector was known to contain base pointers. This patch extends the reasoning to handle chains of insertelements where the indices are constants. This case turns out to be fairly common in vectorized code. We can now handle vectors which contains mixtures of base and derived pointers provided the insertelements use constant indices.

Note that this doesn't solve the general problem. To handle variable indexed insertelements, we'd need to scalarize and introduce conditional branching based on the index. Alternatively, we could eagerly scalarize, but the code structure doesn't currently make either fix easy. The patch also doesn't handle shufflevector or other vector manipulation for much the same reasons. I plan to defer this work until I have a motivating test case.

Differential Revision: http://reviews.llvm.org/D9676



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237200 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-12 22:19:52 +00:00
Arnold Schwaighofer
414a781256 MergeFunctions: Two different sized allocas are *not* the same
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237193 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-12 21:42:22 +00:00
Reid Kleckner
0d8dadf96e [X86] Always return the sret parameter in eax/rax, even on 32-bit
Summary:
This rule was always in the old SysV i386 ABI docs and the new ones that
H.J. Lu has put together, but we never noticed:

  EAX   scratch register; also used to return integer and pointer values
        from functions; also stores the address of a returned struct or union

Fixes PR23491.

Reviewers: majnemer

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D9715

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237175 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-12 20:56:32 +00:00
Philip Reames
c89f135a41 [PlaceSafepoints] Remove dependence on LoopSimplify
As a step towards getting rid of internal pass manager hack entirely, remove the need for loop simplify to run in the inner pass manager. The new code does produce slightly different loop structures, so this isn't technically NFC.

Differential Revision: http://reviews.llvm.org/D9585



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237172 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-12 20:43:48 +00:00
Sundeep Kushwaha
891914aef8 [PATCH] [HEXAGON] Add a test program to verify calling convention
for large struct return by value.

Differential Revision: http://reviews.llvm.org/D9709



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237170 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-12 20:13:10 +00:00
Pat Gavlin
81b3ceba60 [Statepoints] Split the calling convention and statepoint flags operand to STATEPOINT into two separate operands.
Differential Revision: http://reviews.llvm.org/D9623

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237166 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-12 19:50:19 +00:00
Jozef Kolek
043da74b89 [mips][microMIPSr6] Implement SELEQZ and SELNEZ instructions
This patch implements SELEQZ and SELNEZ instructions using mapping.

Differential Revision: http://reviews.llvm.org/D8497


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237158 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-12 17:39:32 +00:00
Michael Zolotukhin
e2d9012a38 Reimplement heuristic for estimating complete-unroll optimization effects.
Summary:
This patch reimplements heuristic that tries to estimate optimization beneftis
from complete loop unrolling.

In this patch I kept the minimal changes - e.g. I removed code handling
branches and folding compares. That's a promising area, but now there
are too many questions to discuss before we can enable it.

Test Plan: Tests are included in the patch.

Reviewers: hfinkel, chandlerc

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D8816

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237156 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-12 17:20:03 +00:00
Petar Jovanovic
2c3514ae0d [Mips] Return false for isFPCloseToIncomingSP()
On Mips, frame pointer points to the same side of the frame as the stack
pointer. This function is used to decide where to put register scavenging
spill slot. So far, it was put on the wrong side of the frame, and thus it
was too far away from $fp when frame was larger than 2^15 bytes.

Patch by Vladimir Radosavljevic.

http://reviews.llvm.org/D8895


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237153 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-12 17:14:05 +00:00
Tom Stellard
e83e5d460d R600/SI: add pass to mark CF live ranges as non-spillable
Spilling can insert instructions almost anywhere, and this can mess
up control flow lowering in a multitude of ways, due to instruction
reordering. Let's sort this out the easy way: never spill registers
involved with control flow, i.e. saved EXEC masks.

Unfortunately, this does not work at all with optimizations disabled,
as the register allocator ignores spill weights. This should be
addressed in a future commit.

The test was reduced from the "stacks" shader of [1]. Some issues
trigger the machine verifier while another one is checked manually.

[1] http://madebyevan.com/webgl-path-tracing/

v2: only insert pass with optimizations enabled, merge test runs.

Patch by: Grigori Goronzy

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237152 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-12 17:13:02 +00:00
Sunil Srivastava
561c44fc33 Changed renaming of local symbols by inserting a dot vefore the numeric suffix.
One code change and several test changes to match that
details in http://reviews.llvm.org/D9481


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237150 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-12 16:47:30 +00:00
Keith Walker
09f089a39e [DWARF] Add CIE header fields address_size and segment_size when generating dwarf-4
The DWARF-4 specification added 2 new fields in the CIE header called
address_size and segment_size.
Create these 2 new fields when generating dwarf-4 CIE entries, print out
the new fields when dumping the CIE and update tests

Differential Revision: http://reviews.llvm.org/D9558


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237145 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-12 15:25:08 +00:00
Tom Stellard
f36ad4aa04 R600/SI: Remove M0Reg register class
It is no longer used.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237142 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-12 15:00:52 +00:00
Tom Stellard
6ecd744594 R600/SI: Remove explicit m0 operand from DS instructions
Instead add m0 as an implicit operand.  This helps avoid spills
of the m0 register in some cases.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237141 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-12 15:00:49 +00:00
Tom Stellard
9c9f5585b9 R600/SI: Make sendmsg test more strict
We want to make sure that the m0 copies are being cse'd.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237134 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-12 14:18:16 +00:00
Elena Demikhovsky
9cc691fa05 AVX-512, X86: Added lowering for shift operations for SKX.
The other changes in the LowerShift() are not functional,
just to make the code more convenient.
So, the functional changes for SKX only.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237129 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-12 13:25:46 +00:00