Commit Graph

102286 Commits

Author SHA1 Message Date
Jim Grosbach
6bb00df864 X86: Remove TargetMachine CPU auto-detection.
This logic is properly in the realm of whatever is creating the
TargetMachine. This makes plain 'llc foo.ll' consistent across
heterogenous machines.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206094 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-12 01:34:29 +00:00
Hal Finkel
e13b87c08d Reenable use of TBAA during CodeGen
We had disabled use of TBAA during CodeGen (even when otherwise using AA)
because the ptrtoint/inttoptr used by CGP for address sinking caused BasicAA to
miss basic type punning that it should catch (and, thus, we'd fail to override
TBAA when we should).

However, when AA is in use during CodeGen, CGP now uses normal GEPs and
bitcasts, instead of ptrtoint/inttoptr, when doing address sinking. As a
result, BasicAA should be able to make us do the right thing in the face of
type-punning, and it seems safe to enable use of TBAA again. self-hosting seems
fine on PPC64/Linux on the P7, with TBAA enabled and -misched=shuffle.

Note: We still don't update TBAA when merging stack slots, although because
BasicAA should now catch all such cases, this is no longer a blocking issue.
Nevertheless, I plan to commit code to deal with this properly in the near
future.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206093 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-12 01:26:00 +00:00
Hal Finkel
24517d023f Add the ability to use GEPs for address sinking in CGP
The current memory-instruction optimization logic in CGP, which sinks parts of
the address computation that can be adsorbed by the addressing mode, does this
by explicitly converting the relevant part of the address computation into
IR-level integer operations (making use of ptrtoint and inttoptr). For most
targets this is currently not a problem, but for targets wishing to make use of
IR-level aliasing analysis during CodeGen, the use of ptrtoint/inttoptr is a
problem for two reasons:
  1. BasicAA becomes less powerful in the face of the ptrtoint/inttoptr
  2. In cases where type-punning was used, and BasicAA was used
     to override TBAA, BasicAA may no longer do so. (this had forced us to disable
     all use of TBAA in CodeGen; something which we can now enable again)

This (use of GEPs instead of ptrtoint/inttoptr) is not currently enabled by
default (except for those targets that use AA during CodeGen), and so aside
from some PowerPC subtargets and SystemZ, there should be no change in
behavior. We may be able to switch completely away from the ptrtoint/inttoptr
sinking on all targets, but further testing is required.

I've doubled-up on a number of existing tests that are sensitive to the
address sinking behavior (including some store-merging tests that are
sensitive to the order of the resulting ADD operations at the SDAG level).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206092 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-12 00:59:48 +00:00
Chad Rosier
a5b2772d31 [AArch64] Implement the isLegalAddressingMode and getScalingFactorCost APIs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206089 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-12 00:14:23 +00:00
Duncan P. N. Exon Smith
23a6033104 blockfreq: Document BlockFrequencyInfo terminology
Documents terminology used in the forthcoming rewrite of
BlockFrequencyInfo.

<rdar://problem/14292693>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206086 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-11 23:21:07 +00:00
Duncan P. N. Exon Smith
670060dddf blockfreq: Rename BlockProbInfoT to BranchProbabilityInfoT
No functionality change.

<rdar://problem/14292693>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206085 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-11 23:21:04 +00:00
Duncan P. N. Exon Smith
3c371e995a blockfreq: Remove unnecessary template parameters
Moves redundant template parameters into an implementation detail of
BlockFrequencyInfoImpl.

No functionality change.

<rdar://problem/14292693>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206084 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-11 23:21:02 +00:00
Duncan P. N. Exon Smith
e9139c68d4 blockfreq: Rename BlockFrequencyImpl to BlockFrequencyInfoImpl
This is a shared implementation class for BlockFrequencyInfo and
MachineBlockFrequencyInfo, not for BlockFrequency, a related (but
distinct) class.

No functionality change.

<rdar://problem/14292693>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206083 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-11 23:20:58 +00:00
Duncan P. N. Exon Smith
484a2b6c2f blockfreq: Use getSuccessorIndex()
No functionality change.

<rdar://problem/14292693>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206082 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-11 23:20:52 +00:00
David Blaikie
06e433a099 Pull out a named variable for the cached section names to aid readability.
Based on a code review suggestion from Eric Christopher in r205990

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206080 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-11 22:49:14 +00:00
Louis Gerbarg
5672630b7c Add ARM64 CLS patterns
This patch adds patterns to generate the cls instruction ARM64. Includes tests
for 64 bit and 32 bit operands.

rdar://15611957

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206079 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-11 22:27:58 +00:00
David Blaikie
0f6d8c6c8d Format fixes for r205990
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206078 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-11 22:11:50 +00:00
Benjamin Kramer
71e50b4d97 Make doxygen comment match the declaration.
Found by -Wdocumentation.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206076 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-11 21:58:11 +00:00
Quentin Colombet
010311b104 [RegAllocGreedy][Last Chance Recoloring] Change the name of the exhaustive search option.
fexhaustive-register-search => exhaustive-register-search
'f' is a Clang thing!

This is related to PR18747.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206075 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-11 21:51:09 +00:00
Quentin Colombet
92a892e8f9 [RegAllocGreedy][Last Chance Recoloring] Addition of
-fexhaustive-register-search option to allow an exhaustive search during last
chance recoloring.

This is related to PR18747

Patch by MAYUR PANDEY <mayur.p@samsung.com>. 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206072 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-11 21:39:44 +00:00
Matt Arsenault
4aee5942c3 R600: Check if a sextload should be used for parameter loads.
Through some oddity where truncate (sextload x) isn't folded into
an anyextload for vectors, the sextload remains if the
vector isn't immediately scalarized. This keeps the expected
zextload instructions in the kernel-args test when small type
vectors aren't scalarized.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206070 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-11 20:59:54 +00:00
Lang Hames
a02c32f31d Remove redundant symbolization support from MCDisassembler interface.
MCDisassembler has an MCSymbolizer member that is meant to take care of
symbolizing during disassembly, but it also has several methods that enable the
disassembler to do symbolization internally (i.e. without an attached symbolizer
object). There is no need for this duplication, but ARM64 had been making use of
it. This patch moves the ARM64 symbolization logic out of ARM64Disassembler and
into an ARM64ExternalSymbolizer class, and removes the duplicated MCSymbolizer
functionality from the MCDisassembler interface. Symbolization will now be
done exclusively through MCSymbolizers.

There should be no impact on disassembly for any platform, but this allows us to
tidy up the MCDisassembler interface and simplify the process of (and invariants
related to) disassembler setup.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206063 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-11 20:07:58 +00:00
Quentin Colombet
441d6d505b [Register Coalescer] Fix wrong live-range information with rematerialization.
When rematerializing an instruction that defines a super register that would be
used by a physical subregisters we use the related physical super register for
the definition.
To keep the live-range information accurate, all the defined subregisters must be
marked as dead def, otherwise the register allocation may miss some
interferences.

Working on a reduced test-case!

<rdar://problem/16582185>


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206060 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-11 19:45:07 +00:00
Matt Arsenault
6e6126ac4c R600/SI: Refactor SOPC classes slightly.
Better match what is done for VOPC to eventually
prefer selecting these.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206048 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-11 19:25:18 +00:00
Rafael Espindola
0a3dcf2c51 Don't lose the thumb bit by using relocations with sections.
This fixes a regression from r205076.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206047 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-11 19:18:01 +00:00
Adrian Prantl
35aa928870 Add some CHECKs to this testcase.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206046 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-11 18:08:37 +00:00
Matt Arsenault
fb33ce9956 Fix shift by constants for vector.
ashr <N x iM>, <N x iM> M -> undef

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206045 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-11 17:57:53 +00:00
Adrian Prantl
c6db0bdef2 Debug info: Store the DIVariable in DebugLocEntry also for constants,
so DwarfDebug::emitDebugLocEntry can emit them with the correct signedness.

rdar://problem/15928306

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206042 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-11 17:49:47 +00:00
Matt Arsenault
d879166376 Move ExtractVectorElements to SelectionDAG.
This seems generally useful, and makes sense to
go along with SplitVector.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206041 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-11 17:47:30 +00:00
Tom Stellard
e04360918b SelectionDAG: Use helper function to improve legalization of ISD::MUL
The TargetLowering::expandMUL() helper contains lowering code extracted
from the DAGTypeLegalizer and allows the SelectionDAGLegalizer to expand more
ISD::MUL patterns without having to use a library call.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206037 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-11 16:12:01 +00:00
Tom Stellard
fdde7d2110 SelectionDAG: Factor ISD::MUL lowering code out of DAGTypeLegalizer
This code has been moved to a new function in the TargetLowering
class called expandMUL().  The purpose of this is to be able
to share lowering code between the SelectionDAGLegalize and
DAGTypeLegalizer classes.

No functionality changed intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206036 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-11 16:11:58 +00:00
Daniel Sanders
ae6f7070ba Revert: r205182 - llvm/test/MC/Mips/mips64r2/valid-xfail.s: This REQUIRES asserts. Seems it doesn't fail with -Asserts.
This was most likely caused by an uninitialized value and the relevant code was re-written in r205292. Reverting to see if it still fails on any of the buildbots.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206033 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-11 15:33:36 +00:00
Diego Novillo
bb7b423bdc Fix use-after-free bug caught by address sanitizer:
http://lab.llvm.org:8011/builders/sanitizer-x86_64-linux-bootstrap/builds/2959

The location string is returned as a std::string, not a StringRef.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206032 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-11 13:55:56 +00:00
Simon Atanasyan
eb0c9094ac [yaml2obj][ELF] ELF Relocations Support.
The patch implements support for both relocation record formats: Elf_Rel
and Elf_Rela. It is possible to define relocation against symbol only.
Relocations against sections will be implemented later. Now yaml2obj
recognizes X86_64, MIPS and Hexagon relocation types.

Example of relocation section specification:
Sections:
- Name: .text
  Type: SHT_PROGBITS
  Content: "0000000000000000"
  AddressAlign: 16
  Flags: [SHF_ALLOC]

- Name: .rel.text
  Type: SHT_REL
  Info: .text
  AddressAlign: 4
  Relocations:
    - Offset: 0x1
      Symbol: glob1
      Type: R_MIPS_32
    - Offset: 0x2
      Symbol: glob2
      Type: R_MIPS_CALL16

The patch reviewed by Michael Spencer, Sean Silva, Shankar Easwaran.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206017 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-11 04:13:39 +00:00
David Blaikie
77cf856e56 Implement depth_first and inverse_depth_first range factory functions.
Also updated as many loops as I could find using df_begin/idf_begin -
strangely I found no uses of idf_begin. Is that just used out of tree?

Also a few places couldn't use df_begin because either they used the
member functions of the depth first iterators or had specific ordering
constraints (I added a comment in the latter case).

Based on a patch by Jim Grosbach. (Jim - you just had iterator_range<T>
where you needed iterator_range<idf_iterator<T>>)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206016 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-11 01:50:01 +00:00
Jim Grosbach
ae64ab542a [c++11] Range'ify use list loops in InstrEmitter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206015 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-11 01:13:16 +00:00
Jim Grosbach
84f004436a [c++11] Range'ify use list loops in DAGCombiner.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206014 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-11 01:13:13 +00:00
Jim Grosbach
a117c712c7 [ARM64,C++11] Range'ify use-lists iterators in address type promotion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206013 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-11 01:13:10 +00:00
David Blaikie
e6cd1ac2d5 Use value types instead of 'new'd objects to store dwarf labels for asm files
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206009 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-11 00:43:52 +00:00
Jim Grosbach
62fc093cf2 [ARM64,C++11]: Range'ify use-list iterators in DAGToDAG.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206007 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-11 00:27:22 +00:00
Jim Grosbach
098f42dbc7 [ARM64,C++11]: More range-based loop simplification.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206006 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-11 00:27:19 +00:00
Jim Grosbach
fb4b420326 SDNode: Add uses() iterator_range convenience methods.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206005 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-11 00:27:17 +00:00
David Blaikie
42382d3e37 Remove lazy-initialization of section caches in MCContext
This seems to have been a cargo-culted habit from the very first such
cache which didn't have any specific justification (but might've been a
layering constraint at the time).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206003 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-10 23:55:11 +00:00
Reid Kleckner
bc1fd917f0 Move the segmented stack switch to a function attribute
This removes the -segmented-stacks command line flag in favor of a
per-function "split-stack" attribute.

Patch by Luqman Aden and Alex Crichton!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205997 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-10 22:58:43 +00:00
Josh Magee
ee66766568 [stack protector] Refactor and clean-up test. No functionality change.
Refactored stack-protector.ll to use new-style function attributes everywhere
and eliminated unnecessary attributes.

This cleanup is in preparation for an upcoming test change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205996 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-10 22:47:27 +00:00
Louis Gerbarg
93bb4ead52 Test commit.
Update contact information in CREDITS.TXT.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205995 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-10 22:25:51 +00:00
David Blaikie
83ee956104 Simplify make_range by using move semantics
Move the iterators into the range the same way the range's ctor moves
them into the members.

Also remove some redundant top level parens in the return statement.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205993 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-10 22:03:48 +00:00
Jim Grosbach
eb690d8491 [ARM64,C++11]: Range'ify loops in InstrInfo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205992 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-10 22:00:18 +00:00
Kaelyn Takata
c39b659b89 Remove the use of "%e" as it is not a valid expansion like "%t".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205991 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-10 21:55:58 +00:00
David Blaikie
fe25521451 Reimplement debug info compression by compressing the whole section, rather than a fragment.
To support compressing the debug_line section that contains multiple
fragments (due, I believe, to variation in choices of line table
encoding depending on the size of instruction ranges in the actual
program code) we needed to support compressing multiple MCFragments in a
single pass.

This patch implements that behavior by mutating the post-relaxed and
relocated section to be the compressed form of its former self,
including renaming the section.

This is a more flexible (and less invasive, to a degree) implementation
that will allow for other features such as "use compression only if it's
smaller than the uncompressed data".

Compressing debug_frame would be a possible further extension to this
work, but I've left it for now. The hurdle there is alignment sections -
which might require going as far as to refactor
MCAssembler.cpp:writeFragment to handle writing to a byte buffer or an
MCObjectWriter (there's already a virtual call there, so it shouldn't
add substantial compile-time cost) which could in turn involve
refactoring MCAsmBackend::writeNopData to use that same abstraction...
which involves touching all the backends. This would remove the limited
handling of fragment writing seen in
ELFObjectWriter.cpp:getUncompressedData which would be nice - but it's
more invasive.

I did discover that I (perhaps obviously) don't need to handle
relocations when I rewrite the fragments - since the relocations have
already been applied and computed (and stored into
ELFObjectWriter::Relocations) by this stage (necessarily, because we
need to have written any immediate values or assembly-time relocations
into the data already before we compress it, which we have). The test
case doesn't necessarily cover that in detail - I can add more test
coverage if that's preferred.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205990 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-10 21:53:53 +00:00
David Blaikie
22f3236dd6 Revert debug info compression support.
To support compression for debug_line and debug_frame a different
approach is required. To simplify review, revert the old implementation
and XFAIL the test case. New implementation to follow shortly.

Reverts r205059 and r204958.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205989 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-10 21:53:47 +00:00
Jim Grosbach
13772fb0a7 [ARM64,C++11]: Range'ify loops in the conditional-compare pass.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205988 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-10 21:49:24 +00:00
Jim Grosbach
b4dd10a723 iterator_range: Add an llvm::make_range() helper method.
Convenience wrapper to make dealing with sub-ranges easier. Like the
iterator_range<> itself, if/when this sort of thing gets standards
blessing, it will be replaced by the official version.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205987 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-10 21:49:22 +00:00
Kevin Enderby
e7ef041ba4 For the ARM integrated assembler add checking of the
alignments on vld/vst instructions.  And report errors for
alignments that are not supported.

While this is a large diff and an big test case, the changes
are very straight forward.  But pretty much had to touch
all vld/vst instructions changing the addrmode to one of the
new ones that where added will do the proper checking for
the specific instruction.

FYI, re-committing this with a tweak so MemoryOp's default
constructor is trivial and will work with MSVC 2012. Thanks
to Reid Kleckner and Jim Grosbach for help with the tweak.

rdar://11312406


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205986 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-10 20:18:58 +00:00
Adrian Prantl
a7ff9e9e6a Revert "Follow-up to r205973: change the return type to const MDNode*."
This reverts commit r205974, it turns out that this wasn't such a great idea
after all. Using DIVariable as return value is self-documenting and marginally
more type safe.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205979 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-10 18:37:53 +00:00