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6ced1d12dd
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14165 Commits

Author SHA1 Message Date
Douglas Gregor
6ced1d12dd Add initial *-*-rtems* target, from Joel Sherrill 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134282 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-01 22:41:06 +00:00
Evan Cheng
ce795dc92f Add MCSubtargetInfo target registry stuff. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134279 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-01 22:25:04 +00:00
Evan Cheng
5b1b4489cf Rename TargetSubtarget to TargetSubtargetInfo for consistency. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134259 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-01 21:01:15 +00:00
Evan Cheng
94214703d9 - Added MCSubtargetInfo to capture subtarget features and scheduling 
itineraries.
- Refactor TargetSubtarget to be based on MCSubtargetInfo.
- Change tablegen generated subtarget info to initialize MCSubtargetInfo
  and hide more details from targets.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134257 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-01 20:45:01 +00:00
Evan Cheng
4db3cffe94 Hide the call to InitMCInstrInfo into tblgen generated ctor. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134244 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-01 17:57:27 +00:00
Rafael Espindola
3f9b9eb57d Fix use after free. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134234 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-01 04:40:50 +00:00
Evan Cheng
e1bff38386 Switch SubtargetFeatures from std::string to StringRef. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134219 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-01 00:23:10 +00:00
Bill Wendling
5cd2791513 Add target a target hook to get the register number used by the compact unwind 
encoding for the registers it knows about. Return -1 if it can't handle that
register.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134202 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-30 23:20:32 +00:00
Rafael Espindola
cfe5254cd3 Create a isFullCopy predicate. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134189 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-30 21:15:52 +00:00
Rafael Espindola
77a2c372fa Add r134057 back, but splice the predecessor after the successors phi 
nodes.

Original message:
Let simplify cfg simplify bb with only debug and lifetime intrinsics.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134182 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-30 20:14:24 +00:00
Evan Cheng
276365dd4b Fix the ridiculous SubtargetFeatures API where it implicitly expects CPU name to 
be the first encoded as the first feature. It then uses the CPU name to look up
features / scheduling itineray even though clients know full well the CPU name
being used to query these properties.

The fix is to just have the clients explictly pass the CPU name!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134127 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-30 01:53:36 +00:00
Eric Christopher
5244c4cc2f Remove getRegClassForInlineAsmConstraint and all dependencies. 
Fixes rdar://9643582


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134123 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-30 01:20:03 +00:00
Devang Patel
272511f518 Revert r133953 for now. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134116 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-29 23:50:13 +00:00
Andrew Trick
3290239daf Added IRBuilder::SetInsertPoint(Use) to find a valid insertion point 
that dominates the given Use.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134111 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-29 23:01:52 +00:00
Andrew Trick
45f454d569 whitespace 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134110 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-29 22:52:51 +00:00
Evan Cheng
33b259f46c Indentation 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134100 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-29 21:58:37 +00:00
Chad Rosier
ce77aa3edc Temporarily revert r134057: "Let simplify cfg simplify bb with only debug and 
lifetime intrinsics" due to buildbot failures.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134071 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-29 16:22:11 +00:00
Rafael Espindola
0fb7dcd48f Let simplify cfg simplify bb with only debug and lifetime intrinsics. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134057 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-29 05:25:47 +00:00
Evan Cheng
ab8be96fd3 Sink SubtargetFeature and TargetInstrItineraries (renamed MCInstrItineraries) into MC. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134049 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-29 01:14:12 +00:00
Evan Cheng
d807674c8b Trim include 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134048 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-29 00:35:31 +00:00
Evan Cheng
a01b58af85 Unbreak every backend. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134031 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-28 21:33:11 +00:00
Evan Cheng
d5b03f252c Move CallFrameSetupOpcode and CallFrameDestroyOpcode to TargetInstrInfo. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134030 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-28 21:14:33 +00:00
Evan Cheng
94b01f6882 Add MCInstrInfo registeration machinery. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134026 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-28 20:29:03 +00:00
Evan Cheng
22fee2dff4 Merge XXXGenRegisterNames.inc into XXXGenRegisterInfo.inc 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134024 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-28 20:07:07 +00:00
Evan Cheng
e837dead3c - Rename TargetInstrDesc, TargetOperandInfo to MCInstrDesc and MCOperandInfo and 
sink them into MC layer.
- Added MCInstrInfo, which captures the tablegen generated static data. Chang
TargetInstrInfo so it's based off MCInstrInfo.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134021 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-28 19:10:37 +00:00
Jay Foad
4f91054fe4 PR10210: New method ConstantArray::getAsCString(). Use it in LTO to 
avoid getting embedded trailing null bytes in std::strings.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133999 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-28 08:24:19 +00:00
Andrew Trick
6d64a04a4d Cleanup. Fix a stupid variable name. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133996 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-28 05:44:06 +00:00
Andrew Trick
5e7645be4c SCEVExpander: give new insts a name that identifies the reponsible pass. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133992 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-28 05:07:32 +00:00
Evan Cheng
f46e7e3d7f Remove RegClass2VRegMap from MachineRegisterInfo. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133967 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-27 23:54:40 +00:00
Evan Cheng
4db3748fcf Remove RCBarriers from TargetInstrDesc. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133964 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-27 23:47:21 +00:00
Evan Cheng
f10711fb8c Remove the experimental (and unused) pre-ra splitting pass. Greedy regalloc can split live ranges. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133962 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-27 23:40:45 +00:00
Devang Patel
016c5829a5 During bottom up fast-isel, instructions emitted to materalize registers are at top of basic block and do not have debug location. This may misguide debugger while entering the basic block and sometimes debugger provides semi useful view of current location to developer by picking up previous known location as current location. Assign a sensible location to the first instruction in a basic block, if it does not have one location derived from source file, so that debugger can provide meaningful user experience to developers in edge cases. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133953 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-27 22:32:04 +00:00
Evan Cheng
15993f83a4 More refactoring. Move getRegClass from TargetOperandInfo to TargetInstrInfo. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133944 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-27 21:26:13 +00:00
Owen Anderson
bea6f615ee Add support for alternative register names, useful for instructions whose operands are logically equivalent to existing registers, but happen to be printed specially. For example, an instruciton that prints d0[0] instead of s0. 
Patch by Jim Grosbach.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133940 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-27 21:06:21 +00:00
Evan Cheng
2ca7f4d2f3 Rename unnecessary forward declaration. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133928 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-27 19:41:39 +00:00
Nick Lewycky
99e0b2a8df Move onlyUsedByLifetimeMarkers to ValueTracking so that it can be used by other 
passes as well.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133904 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-27 04:20:45 +00:00
Jakob Stoklund Olesen
f792fa90f1 Distinguish early clobber output operands from clobbered registers. 
Both become <earlyclobber> defs on the INLINEASM MachineInstr, but we
now use two different asm operand kinds.

The new Kind_Clobber is treated identically to the old
Kind_RegDefEarlyClobber for now, but x87 floating point stack inline
assembly does care about the difference.

This will pop a register off the stack:

  asm("fstp %st" : : "t"(x) : "st");

While this will pop the input and push an output:

  asm("fst %st" : "=&t"(r) : "t"(x));

We need to know if ST0 was a clobber or an output operand, and we can't
depend on <dead> flags for that.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133902 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-27 04:08:33 +00:00
Rafael Espindola
5b220213bf There is only one register coalescer. Merge it into the base class and 
remove the analysis group.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133899 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-26 22:34:10 +00:00
Rafael Espindola
fdf16ca44f Move RegisterCoalescer.h to lib/CodeGen. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133895 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-26 21:41:06 +00:00
Michael J. Spencer
25b15777df Object: Add proper error handling. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133872 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-25 17:55:23 +00:00
Michael J. Spencer
001c9205fc Make Binary the parent of ObjectFile and update children to new interface. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133870 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-25 17:54:50 +00:00
Michael J. Spencer
c44c915372 Add Binary class. This is a cleaner parent than ObjectFile. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133869 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-25 17:54:29 +00:00
Michael J. Spencer
d2a02f409e Add Object/Error. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133868 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-25 17:42:56 +00:00
Nick Lewycky
3e64427cb3 Enhance the sanity check for block sizes; check that the resulting pointer is 
pointing to the range [first character, last character] instead of just not
after the last character. Patch by Yan Ivnitskiy!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133867 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-25 17:08:50 +00:00
Evan Cheng
5e6b4605bd Rename TargetRegisterDesc to MCRegisterDesc 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133845 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-24 23:44:48 +00:00
Jim Grosbach
ba8297ec08 Refactor MachO relocation generaration into the Target directories. 
Move the target-specific RecordRelocation logic out of the generic MC
MachObjectWriter and into the target-specific object writers. This allows
nuking quite a bit of target knowledge from the supposedly target-independent
bits in lib/MC.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133844 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-24 23:44:37 +00:00
Devang Patel
fa3f9c001f Fix struct member's scope. Patch by Xi Wang. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133828 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-24 22:00:39 +00:00
Devang Patel
8594d429e0 Handle debug info for i128 constants. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133821 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-24 20:46:11 +00:00
Evan Cheng
f5fa52ed06 - Add MCRegisterInfo registration machinery. Also added x86 registration routines. 
- Rename TargetRegisterDesc to MCRegisterDesc.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133820 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-24 20:42:09 +00:00
Evan Cheng
a347f85dbe Starting to refactor Target to separate out code that's needed to fully describe 
target machine from those that are only needed by codegen. The goal is to
sink the essential target description into MC layer so we can start building
MC based tools without needing to link in the entire codegen.

First step is to refactor TargetRegisterInfo. This patch added a base class
MCRegisterInfo which TargetRegisterInfo is derived from. Changed TableGen to
separate register description from the rest of the stuff.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133782 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-24 01:44:41 +00:00