Commit Graph

107519 Commits

Author SHA1 Message Date
Robin Morisset
66b380b6b6 Relax the constraint more in MemoryDependencyAnalysis.cpp
Even loads/stores that have a stronger ordering than monotonic can be safe.
The rule is no release-acquire pair on the path from the QueryInst, assuming that
the QueryInst is not atomic itself.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216771 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-29 20:32:58 +00:00
Robin Morisset
22f3cb0dc4 [X86] Refactor X86ISelDAGToDAG::SelectAtomicLoadArith - NFC
Summary:
Mostly renaming the (not very explicit) variables Tmp0, .. Tmp4, and grouping
related statements together, along with a few lines of comments for the
surprising parts.

No functional change intended.

Test Plan: make check-all

Reviewers: jfb

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D5088

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216768 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-29 20:19:23 +00:00
Nick Kledzik
f1b5734cc8 Add missing mach-o EXPORT_SYMBOL_FLAG_KIND_ABSOLUTE
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216759 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-29 19:55:55 +00:00
Jean-Luc Duprat
1da4862939 Tablegen fixes for new syntax when initializing bits from variables.
Followup to r215086.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216757 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-29 19:41:04 +00:00
Juergen Ributzka
d8835d09ec [FastISel][AArch64] Fix an incorrect kill flag due to a bug in SelectTrunc.
When we select a trunc instruction we don't emit any code if the type is already
i32 or smaller. This is because the instruction that uses the truncated value
will deal with it.

This behavior can incorrectly transfer a kill flag, which was meant for the
result of the truncate, onto the source register.

%2 = trunc i32 %1 to i16
... = ... %2                -> ... = ... vreg1 <kill>
... = ... %1                   ... = ... vreg1

This commit fixes this by emitting a COPY instruction, so that the result and
source register are distinct virtual registers.

This fixes rdar://problem/18178188.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216750 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-29 17:58:16 +00:00
Tilmann Scheller
59758c4337 [ARM] Add Thumb-2 code size optimization test for ASR (register).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216746 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-29 17:19:00 +00:00
Tilmann Scheller
b1424d72ca [ARM] Add Thumb-2 code size optimization test for ASR (immediate).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216744 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-29 17:02:28 +00:00
Hal Finkel
4f66dd7fc6 Fix a typo in AddAliasScopeMetadata
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216741 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-29 16:33:41 +00:00
Matt Arsenault
0d90962f29 Make fabs safe to speculatively execute
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216736 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-29 16:01:17 +00:00
Matt Arsenault
f4d57e7874 R600/SI: Use mad for fsub + fmul
We can use a negate source modifier to match
this for fsub.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216735 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-29 16:01:14 +00:00
Tim Northover
1e77dc84c4 AArch64: only try to get operand of a known node.
A bug in r216725 meant we tried to discover the type of a SETCC before
confirming the node actually was a SETCC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216734 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-29 15:34:58 +00:00
Frederic Riss
d1c544306e Remove unnecessary regex in test pattern per dblaikie suggestion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216733 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-29 15:32:15 +00:00
Sanjay Patel
86cafbc6ed typo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216732 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-29 15:32:09 +00:00
Jingyue Wu
87a2b36cf6 [NVPTX] Make the alignment an explicit argument to ldu/ldg
Summary:
Instead of specifying the alignment as metadata which may be destroyed by
transformation passes, make the alignment the second argument to ldu/ldg
intrinsic calls.

Test Plan:
ldu-ldg.ll
ldu-i8.ll
ldu-reg-plus-offset.ll

Reviewers: eliben, meheff, jholewinski

Reviewed By: meheff, jholewinski

Subscribers: jholewinski, llvm-commits

Differential Revision: http://reviews.llvm.org/D5093

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216731 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-29 15:30:20 +00:00
Tilmann Scheller
c5484a2704 [ARM] Make Thumb-2 code size optimization test more strict.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216729 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-29 15:13:35 +00:00
Tilmann Scheller
f238c1844e [ARM] Add a first test for the Thumb-2 code size optimization pass.
While working on a Thumb-2 code size optimization I just realized that we don't have any regression tests for it.

So here's a first test case, I plan to increase the coverage over time.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216728 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-29 15:04:40 +00:00
Tim Northover
1f70cb9c14 AArch64: skip select/setcc combine in complex case.
In an llvm-stress generated test, we were trying to create a v0iN type and
asserting when that failed. This case could probably be handled by the
function, but not without added complexity and the situation it arises in is
sufficiently odd that there's probably no benefit anyway.

Should fix PR20775.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216725 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-29 13:05:18 +00:00
Arnaud A. de Grandmaison
123c92cbe0 [AArch64] FPLoadBalancing: move ownership of the chain to its current accumulator register
and forget about the previously used accumulator.

Coming up with a simple testcase is not easy, as this highly depends on
what the register allocator is doing: this issue showed up while working
with the PBQP allocator, which produced a different allocation scheme.
A testcase would need to come up with chain starting in D[0-7], then
moving to D[8-15], followed by a call to a function whose regmask
clobbers the starting accumulator in D[0-7], then another use of the chain.

Fixed some formatting, added some invariant checks while there.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216721 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-29 09:54:11 +00:00
Frederic Riss
622de3b2eb Use DwarfDebug::attachLowHighPC for the compilation unit DIE.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216719 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-29 09:00:26 +00:00
Robert Khasanov
37e671e894 [SKX] Enable lowering of integer CMP operations.
Added new types to Legalizer.
Fixed getSetCCResultType function
Added lowering tests.

Reviewed by Elena Demikhovsky.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216717 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-29 08:46:04 +00:00
Job Noorman
d2323fc295 Do not assume the value passed to memset is an i32.
The code in SelectionDAG::getMemset for some reason assumes the value passed to
memset is an i32. This breaks the generated code for targets that only have
registers smaller than 32 bits because the value might get split into multiple
registers by the calling convention. See the test for the MSP430 target included
in the patch for an example.

This patch ensures that nothing is assumed about the type of the value. Instead,
the type is taken from the selected overload of the llvm.memset intrinsic.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216716 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-29 08:23:53 +00:00
Craig Topper
95f7e2d2fd Add conversion constructor to convert ArrayRef<T*> to ArrayRef<const T*>. Reviewed with Chandler and David Blaikie.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216709 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-29 06:01:43 +00:00
Jiangning Liu
3cd73a5ded [AArch64] Fix some failures exposed by value type v4f16 and v8f16.
1) Add some missing bitcast patterns for v8f16.
2) Add type promotion for operand of ld/st operations.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216706 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-29 01:31:42 +00:00
Chris Bieneman
d814e38de8 Cleaning up static initializers in Signals.inc
Reviewed by: Chandlerc

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216704 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-29 01:05:16 +00:00
Chris Bieneman
77bf4f97bf Cleaning up static initializers in TimeValue.
Code reviewed by Chandlerc

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216703 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-29 01:05:12 +00:00
Alexey Samsonov
79e9b30b11 Introduce -DLLVM_USE_SANITIZER=Undefined CMake option to build UBSan-ified version of LLVM/Clang.
I've fixed most of the simple bugs and currently "check-llvm" test suite
has 26 failures, and "check-clang" suite has 5 failures.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216701 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-29 00:50:36 +00:00
Juergen Ributzka
cf45151b2c [FastISel][AArch64] Don't fold instructions that are not in the same basic block.
This fix checks first if the instruction to be folded (e.g. sign-/zero-extend,
or shift) is in the same machine basic block as the instruction we are folding
into.

Not doing so can result in incorrect code, because the value might not be
live-out of the basic block, where the value is defined.

This fixes rdar://problem/18169495.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216700 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-29 00:19:21 +00:00
David Majnemer
6acfc54706 Revert two GEP-related InstCombine commits
This reverts commit r216523 and r216598; people have reported
regressions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216698 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-29 00:06:43 +00:00
Reid Kleckner
8f58e02646 Don't promote byval pointer arguments when padding matters
Don't promote byval pointer arguments when when their size in bits is
not equal to their alloc size in bits. This can happen for x86_fp80,
where the size in bits is 80 but the alloca size in bits in 128.
Promoting these types can break passing unions of x86_fp80s and other
types.

Patch by Thomas Jablin!

Reviewed By: rnk

Differential Revision: http://reviews.llvm.org/D5057

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216693 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-28 22:42:00 +00:00
Jim Grosbach
0d34b1ed26 AArch64: More correctly constrain target vector extend lowering.
The AArch64 target lowering for [zs]ext of vectors is set up to handle
input simple types and expects the generic SDag path to do something reasonable
with anything that's not a simple type. The code, however, was only
checking that the result type was a simple type and assuming that
implied that the source type would also be a simple type. That's not a
valid assumption, as operations like "zext <1 x i1> %0 to <1 x i32>"
demonstrate. The fix is to simply explicitly validate the source type
as well as the result type.

PR20791

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216689 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-28 22:08:28 +00:00
Sanjay Patel
179b5ee8a8 Move FNEG next to FABS and make them more similar, so it's easier that they can be refactored. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216688 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-28 21:51:37 +00:00
Rafael Espindola
4bb535027e On MachO, don't put non-private constants in mergeable sections.
On MachO, putting a symbol that doesn't start with a 'L' or 'l' in one of the
__TEXT,__literal* sections prevents the linker from merging the context of the
section.

Since private GVs are the ones the get mangled to start with 'L' or 'l', we now
only put those on the __TEXT,__literal* sections.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216682 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-28 20:13:31 +00:00
Frederic Riss
8317095e97 Constify MCSymbol* parameters to DwarfDebug::attachLowHighPC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216681 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-28 19:09:29 +00:00
Sanjay Patel
cf9661c6f9 Fix a logic bug in x86 vector codegen: sext (zext (x) ) != sext (x) (PR20472).
Remove a block of code from LowerSIGN_EXTEND_INREG() that was added with:
http://llvm.org/viewvc/llvm-project?view=revision&revision=177421

And caused:
http://llvm.org/bugs/show_bug.cgi?id=20472 (more analysis here)
http://llvm.org/bugs/show_bug.cgi?id=18054

The testcases confirm that we (1) don't remove a zext op that is necessary and (2) generate
a pmovz instead of punpck if SSE4.1 is available. Although pmovz is 1 byte longer, it allows 
folding of the load, and so saves 3 bytes overall.

Differential Revision: http://reviews.llvm.org/D4909



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216679 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-28 18:59:22 +00:00
Owen Anderson
538b1cbdf5 Do not introduce new shuffle patterns after operation legalization if SHUFFLE_VECTOR
was marked custom.  The target independent DAG combine has no way to know if
the shuffles it is introducing are ones that the target could support or not.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216678 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-28 17:49:58 +00:00
Sanjay Patel
98491c0ff9 Janitorial services: "Don’t duplicate function or class name at the beginning of the comment."
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216674 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-28 16:29:51 +00:00
Sanjay Patel
e43c262106 Remove local TLI vars that are just duplicates of the class var. No functional change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216673 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-28 16:01:50 +00:00
Sanjay Patel
a63b6e2840 Use local vars to improve readability. No functional change.
Completes what was started in r216611 and r216623. 
Used const refs instead of pointers; not sure if one is preferable to the other.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216672 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-28 15:53:16 +00:00
Sid Manning
4152f8d82a Minor spelling correction.
Reviewers: adasgupt, jverma, sidneym

Differential Revision: http://reviews.llvm.org/D5025

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216667 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-28 14:16:32 +00:00
Aaron Ballman
6948f9e09c Silence a -Wsign-compare warning. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216666 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-28 13:23:26 +00:00
Arnaud A. de Grandmaison
e9c80bc2f8 [PBQP] Only output debug information when requested
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216660 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-28 10:15:47 +00:00
David Majnemer
0b16ed7f1c InstCombine: Remove redundant combines
InstSimplify already handles icmp (X+Y), X (and things like it)
appropriately.  The first thing that InstCombine does is run
InstSimplify on the instruction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216659 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-28 10:08:37 +00:00
Erik Eckstein
c84ba857ea Fix: SLPVectorizer tried to move an instruction which was replaced by a vector instruction.
For a detailed description of the problem see the comment in the test file.
The problematic moveBefore() calls are not required anymore because the new
scheduling algorithm ensures a correct ordering anyway.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216656 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-28 07:04:02 +00:00
David Xu
5ca793561e Generate CMN when comparing a short int with minus
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216651 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-28 04:59:53 +00:00
Justin Hibbits
cf3736085b Test commit. Fix whitespace from a previous patch of mine.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216650 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-28 04:40:55 +00:00
Lang Hames
41db8128a2 [MCJIT] Fix format specifiers for debug output in RuntimeDyld.
More work on http://llvm.org/PR20640



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216648 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-28 04:25:17 +00:00
David Majnemer
5283829707 MC: Don't crash when the COFF section limit is reached
I've decided not to commit a test, it takes 2.5 seconds to run on my an
incredibly strong machine.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216647 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-28 04:02:50 +00:00
Chandler Carruth
dccb2afba3 [x86] Fix whitespace and formatting around this function with
clang-format, no functionality changed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216646 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-28 04:00:24 +00:00
Chandler Carruth
6abd62fff1 [x86] Hoist conditions from *every single if* in this routine to
a single early exit.

And factor the subsequent cast<> from all but one block into a single
variable.

No functionality changed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216645 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-28 03:57:13 +00:00
Chandler Carruth
1201cc156f [x86] Inline an SSE4 helper function for INSERT_VECTOR_ELT lowering, no
functionality changed.

Separating this into two functions wasn't helping. There was a decent
amount of boilerplate duplicated, and some subsequent refactorings here
will pull even more common code out.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216644 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-28 03:52:45 +00:00