Job Noorman
77f923cfc1
Drop the W postfix on the 16-bit registers.
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This ensures the inline assembly register constraints are properly recognised in
TargetLowering::getRegForInlineAsmConstraint.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217479 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-10 06:58:14 +00:00
Job Noorman
3edacfa970
Fix MSP430 calling convention to match MSPGCC
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192678 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-15 08:19:39 +00:00
Anton Korobeynikov
6cbeb4d839
Add support for byval args. Patch by Job Noorman!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168439 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-21 17:23:03 +00:00
Anton Korobeynikov
6e4f62790b
Hanle i8 returns
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70742 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 13:11:48 +00:00
Anton Korobeynikov
cf9adf2cbb
Add 8-bit regclass and pattern for sext_inreg
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70721 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 13:05:22 +00:00
Anton Korobeynikov
c8fbb6ae20
Add first draft of MSP430 calling convention stuff and draft of ISD::FORMAL_ARGUMENTS node lowering.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70702 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 12:59:33 +00:00
