Commit Graph

54100 Commits

Author SHA1 Message Date
Craig Topper
708e44fc96 Use MVT instead of EVT through all of LowerVECTOR_SHUFFLEtoBlend and not just the switch. Saves a little bit of binary size.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155339 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-23 07:36:33 +00:00
Craig Topper
9d35240eee Make getZeroVector and getOnesVector more alike as far as how they detect 128-bit versus 256-bit vectors. Be explicit about both sizes and use llvm_unreachable. Similar changes to getLegalSplat.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155337 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-23 07:24:41 +00:00
Craig Topper
69947b9cea Tidy up by removing some 'else' after 'return'
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155336 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-23 06:57:04 +00:00
Craig Topper
1842ba0dfc Tidy up spacing in LowerVECTOR_SHUFFLEtoBlend. Remove code that checks if shuffle operand has a different type than the the shuffle result since it can never happen.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155333 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-23 06:38:28 +00:00
Craig Topper
731dfd0da9 Add a couple llvm_unreachables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155332 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-23 03:42:40 +00:00
Craig Topper
0fbf364fd7 Remove some tab characers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155331 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-23 03:28:34 +00:00
Craig Topper
e8eb116ff3 Remove some 'else' after 'return'. No functional change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155330 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-23 03:26:18 +00:00
Chris Lattner
a9963c648e Don't die with an assertion if the Result bitwidth is already correct. This
fixes an assert reading "1239123123123123" when the result is already 64-bit.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155329 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-23 00:27:54 +00:00
Bill Wendling
85d043d6f6 Cleanup whitespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155328 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-23 00:23:33 +00:00
Bill Wendling
098c595dd2 Limit the number of times we recurse through this algorithm. All of the
intructions are processed. So there's no need to look at them if they're used as
operands of other instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155327 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-23 00:22:55 +00:00
Craig Topper
b14940a047 Make Extract128BitVector and Insert128BitVector take an unsigned instead of an ConstantNode SDValue. getConstant was almost always called just before only to have the functions take it apart and build a new ConstantSDNode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155325 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-22 20:55:18 +00:00
Craig Topper
767b4f64a0 Convert getNode(UNDEF) to getUNDEF.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155321 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-22 19:29:34 +00:00
Craig Topper
df966f6bee Make calls to getVectorShuffle more consistent. Use shuffle VT for calls to getUNDEF instead of requerying. Use &Mask[0] instead of Mask.data().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155320 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-22 19:17:57 +00:00
Craig Topper
d63fa657e4 Tidy up. 80 columns and argument alignment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155319 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-22 18:51:37 +00:00
Craig Topper
4c7972d638 Simplify code by converting multiple places that were manually concatenating 128-bit vectors to use either CONCAT_VECTORS or a helper function. CONCAT_VECTORS will itself be lowered to the same pattern as before. The helper function is needed for concats of BUILD_VECTORs since getNode(CONCAT_VECTORS) will just return a large BUILD_VECTOR and we may be trying to lower large BUILD_VECTORS when this occurs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155318 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-22 18:15:59 +00:00
Benjamin Kramer
bfae1fd1fc ARM: Initialize the HasRAS bit.
Found by valgrind.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155313 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-22 11:52:41 +00:00
Elena Demikhovsky
1da5867236 ZERO_EXTEND/SIGN_EXTEND/TRUNCATE optimization for AVX2
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155309 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-22 09:39:03 +00:00
Bill Wendling
eb23f9e92e Remove some potential warnings about variables used uninitialized.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155307 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-22 07:23:04 +00:00
Bill Wendling
d46575f190 Add a flag to the struct type finder to collect only those types which have
names. This saves collecting types we normally don't care about.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155300 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-21 23:59:16 +00:00
Chris Lattner
2dbd7844e8 No need for "else if" after a return. Autosense "0o123" as octal in
StringRef::getAsInteger


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155298 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-21 22:03:05 +00:00
Nadav Rotem
db3461662e Teach getVectorTypeBreakdown about promotion of vectors in addition to widening of vectors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155296 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-21 20:08:32 +00:00
Craig Topper
9e401f22ec Make some fixed arrays const. Use array_lengthof in a couple places instead of a hardcoded number.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155294 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-21 18:58:38 +00:00
Craig Topper
d0cf565e79 Tidy up. 80 columns and some other spacing issues.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155291 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-21 18:13:35 +00:00
NAKAMURA Takumi
8959393533 llvm/lib/Target: [PR12611] Add "llvm/Support/raw_ostream.h" for Debug build on MSVC.
Thanks to Andy Gibbs, to report the issue.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155287 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-21 15:31:45 +00:00
NAKAMURA Takumi
d2f16a292b HexagonISelLowering.cpp: Reorder #includes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155286 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-21 15:31:36 +00:00
Nuno Lopes
e0af267bc2 move Signals to .rodata
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155283 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-21 14:45:37 +00:00
NAKAMURA Takumi
d1ad82f869 HexagonInstPrinter.cpp: Suppress -Wunused-variable warnings with -Asserts.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155281 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-21 11:24:55 +00:00
Benjamin Kramer
2ddb84506c YAMLParser: silence warning about tautological comparison on unsigned-char platforms.
No functionality change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155280 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-21 10:51:42 +00:00
Jim Grosbach
8e3c17aabf ARM: tblgen'erate more NEON two-operand aliases.
VMUL and VEXT.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155258 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-20 23:46:33 +00:00
Jakob Stoklund Olesen
0b35c35efc Fix PR12599.
The X86 target is editing the selection DAG while isel is selecting
nodes following a topological ordering. When the DAG hacking triggers
CSE, nodes can be deleted and bad things happen.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155257 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-20 23:36:09 +00:00
Jim Grosbach
d83c9ea7d1 ARM: tblgen'erate more NEON two-operand aliases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155254 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-20 23:30:14 +00:00
Bill Wendling
c827834d49 Revert r155241, which is causing some breakage.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155253 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-20 23:11:38 +00:00
Jakob Stoklund Olesen
8c48e4ff89 Make ISelPosition a local variable.
Now that multiple DAGUpdateListeners can be active at the same time,
ISelPosition can become a local variable in DoInstructionSelection.

We simply register an ISelUpdater with CurDAG while ISelPosition exists.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155249 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-20 22:08:50 +00:00
Jakob Stoklund Olesen
bc7d448f24 Register DAGUpdateListeners with SelectionDAG.
Instead of passing listener pointers to RAUW, let SelectionDAG itself
keep a linked list of interested listeners.

This makes it possible to have multiple listeners active at once, like
RAUWUpdateListener was already doing. It also makes it possible to
register listeners up the call stack without controlling all RAUW calls
below.

DAGUpdateListener uses an RAII pattern to add itself to the SelectionDAG
list of active listeners.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155248 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-20 22:08:46 +00:00
Bill Wendling
64c7af8900 If we discover all of the named structs in a module, then don't bother to
process any more Values.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155241 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-20 21:56:24 +00:00
Jakob Stoklund Olesen
3429c7571e Print <def,read-undef> to avoid confusion.
The <undef> flag on a def operand only applies to partial register
redefinitions. Only print the flag when relevant, and print it as
<def,read-undef> to make it clearer what it means.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155239 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-20 21:45:33 +00:00
Andrew Trick
a30444a69c New and improved comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155229 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-20 20:24:33 +00:00
Andrew Trick
c0ccb8bb17 SparseSet: Add support for key-derived indexes and arbitrary key types.
This nicely handles the most common case of virtual register sets, but
also handles anticipated cases where we will map pointers to IDs.

The goal is not to develop a completely generic SparseSet
template. Instead we want to handle the expected uses within llvm
without any template antics in the client code. I'm adding a bit of
template nastiness here, and some assumption about expected usage in
order to make the client code very clean.

The expected common uses cases I'm designing for:
- integer keys that need to be reindexed, and may map to additional
  data
- densely numbered objects where we want pointer keys because no
  number->object map exists.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155227 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-20 20:05:28 +00:00
Andrew Trick
918f38ab24 misched: initialize BB
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155226 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-20 20:05:21 +00:00
Jim Grosbach
d8b3ed8f25 ARM: Update NEON assembly two-operand aliases.
Use the new TwoOperandAliasConstraint to handle lots of the two-operand aliases
for NEON instructions. There's still more to go, but this is a good chunk of
them.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155210 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-20 18:12:54 +00:00
Gabor Greif
413ca0d34b effectively back out my last change (r155190)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155195 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-20 11:41:38 +00:00
Gabor Greif
c77d6781d5 fix obviously bogus (IMO) operand index of the load in asserts
(load only has one operand) and smuggle in some whitespace changes too

NB: I am obviously testing the water here, and believe that the unguarded
    cast is still wrong, but why is the getZExtValue of the load's operand
    tested against zero here? Any review is appreciated.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155190 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-20 08:58:49 +00:00
Craig Topper
420761a0f1 Convert more uses of XXXRegisterClass to &XXXRegClass. No functional change since they are equivalent.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155188 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-20 07:30:17 +00:00
Craig Topper
c909950c38 Convert some uses of XXXRegisterClass to &XXXRegClass. No functional change since they are equivalent.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155186 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-20 06:31:50 +00:00
Jakob Stoklund Olesen
eece9dc81c Revert r155136 "Defer some shl transforms to DAGCombine."
While the patch was perfect and defect free, it exposed a really nasty
bug in X86 SelectionDAG that caused an llc crash when compiling lencod.

I'll put the patch back in after fixing the SelectionDAG problem.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155181 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-20 00:38:45 +00:00
Jim Grosbach
181b147975 ARM some VFP tblgen'erated two-operand aliases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155178 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-20 00:15:00 +00:00
Jim Grosbach
2a22b691b6 ARM let TableGen handle a few two-operand aliases.
No need for these explicit aliases anymore. Nuke 'em.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155173 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-19 23:59:26 +00:00
Bill Wendling
dc21604d4a Put this expensive check below the less expensive ones.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155166 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-19 23:31:07 +00:00
Dan Gohman
8b74e5afda Avoid a bug in the path count computation, preventing an infinite
loop repeatedlt making the same change. This is for rdar://11256239.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155160 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-19 21:50:46 +00:00
Jakob Stoklund Olesen
0d5fcae6cd Defer some shl transforms to DAGCombine.
The shl instruction is used to represent multiplication by a constant
power of two as well as bitwise left shifts. Some InstCombine
transformations would turn an shl instruction into a bit mask operation,
making it difficult for later analysis passes to recognize the
constsnt multiplication.

Disable those shl transformations, deferring them to DAGCombine time.
An 'shl X, C' instruction is now treated mostly the same was as 'mul X, C'.

These transformations are deferred:

  (X >>? C) << C   --> X & (-1 << C)  (When X >> C has multiple uses)
  (X >>? C1) << C2 --> X << (C2-C1) & (-1 << C2)   (When C2 > C1)
  (X >>? C1) << C2 --> X >>? (C1-C2) & (-1 << C2)  (When C1 > C2)

The corresponding exact transformations are preserved, just like
div-exact + mul:

  (X >>?,exact C) << C   --> X
  (X >>?,exact C1) << C2 --> X << (C2-C1)
  (X >>?,exact C1) << C2 --> X >>?,exact (C1-C2)

The disabled transformations could also prevent the instruction selector
from recognizing rotate patterns in hash functions and cryptographic
primitives. I have a test case for that, but it is too fragile.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155136 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-19 16:46:26 +00:00