Commit Graph

14 Commits

Author SHA1 Message Date
Sean Callanan
1a8b789a4b Eliminated the classification of control registers into %ecr_
and %rcr_, leaving just %cr_ which is what people expect.
Updated the disassembler to support this unified register set.
Added a testcase to verify that the registers continue to be
decoded correctly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103196 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-06 20:59:00 +00:00
Sean Callanan
5edca81626 Fixed a bug where the disassembler would allow an immediate
argument that had to be between 0 and 7 to have any value,
firing an assert later in the AsmPrinter.  Now, the
disassembler rejects instructions with out-of-range values
for that immediate.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100694 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-07 21:42:19 +00:00
Evan Cheng
5e81716425 Check in tablegen changes to fix disassembler related failures caused by r98465.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98468 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-14 05:15:39 +00:00
Sean Callanan
80443f9146 Changed the table generator so that the X86
disassembler never recognizes InitReg instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97017 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-24 02:56:25 +00:00
Sean Callanan
cebe955779 Added the rdtscp instruction to the x86 instruction
tables.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96073 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-13 02:06:11 +00:00
Sean Callanan
95a5a7d570 Fixed encodings for invlpg, invept, and invvpid.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96065 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-13 01:48:34 +00:00
Chris Lattner
a599de2410 remove special cases for vmlaunch, vmresume, vmxoff, and swapgs
fix swapgs to be spelled right.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96058 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-13 00:41:14 +00:00
Chris Lattner
eaca5fa8e6 Remove special cases for [LM]FENCE, MONITOR and MWAIT from
encoder and decoder by using new MRM_ forms.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96048 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-12 23:54:57 +00:00
Sean Callanan
9492be8d10 Reworked the Intel disassembler to support instructions
whose opcodes extend into the ModR/M field using the
Form field of the instruction rather than by special
casing each instruction.  Commented out the special
casing of VMCALL, which is the first instruction to use
this special form.  While I was in the neighborhood,
added a few comments for people modifying the Intel
disassembler. 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96043 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-12 23:39:46 +00:00
Chris Lattner
0d8db8e0a8 add a bunch of mod/rm encoding types for fixed mod/rm bytes.
This will work better for the disassembler for modeling things
like lfence/monitor/vmcall etc.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95960 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-12 02:06:33 +00:00
Chris Lattner
a7d479c7bd Introduce a new CodeGenInstruction::ConstraintInfo class
for representing constraint info semantically instead of
as a c expression that will be blatted out to the .inc
file.  Fix X86RecognizableInstr to use this instead of
parsing C code :).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95753 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-10 01:45:28 +00:00
Sean Callanan
7fb35a2fd8 Fixes to the X86 disassembler:
Made LEA memory operands emit only 4 MCInst operands.
Made the scale operand equal 1 for instructions that have no
SIB byte.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91919 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-22 21:12:55 +00:00
Daniel Dunbar
9e6d1d1f50 Add missing newlines at EOF (for clang++).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91756 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-19 04:16:48 +00:00
Sean Callanan
8ed9f51663 Table-driven disassembler for the X86 architecture (16-, 32-, and 64-bit
incarnations), integrated into the MC framework.  

The disassembler is table-driven, using a custom TableGen backend to 
generate hierarchical tables optimized for fast decode.  The disassembler 
consumes MemoryObjects and produces arrays of MCInsts, adhering to the 
abstract base class MCDisassembler (llvm/MC/MCDisassembler.h).

The disassembler is documented in detail in

- lib/Target/X86/Disassembler/X86Disassembler.cpp (disassembler runtime)
- utils/TableGen/DisassemblerEmitter.cpp (table emitter)

You can test the disassembler by running llvm-mc -disassemble for i386
or x86_64 targets.  Please let me know if you encounter any problems
with it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91749 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-19 02:59:52 +00:00