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8 Commits

Author SHA1 Message Date
Evan Cheng
0ddff1b535 Compute feature bits at time of MCSubtargetInfo initialization. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134606 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-07 07:07:08 +00:00
Evan Cheng
385e930d55 Rename XXXGenSubtarget.inc to XXXGenSubtargetInfo.inc for consistency. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134281 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-01 22:36:09 +00:00
Evan Cheng
5b1b4489cf Rename TargetSubtarget to TargetSubtargetInfo for consistency. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134259 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-01 21:01:15 +00:00
Evan Cheng
94214703d9 - Added MCSubtargetInfo to capture subtarget features and scheduling 
itineraries.
- Refactor TargetSubtarget to be based on MCSubtargetInfo.
- Change tablegen generated subtarget info to initialize MCSubtargetInfo
  and hide more details from targets.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134257 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-01 20:45:01 +00:00
Evan Cheng
276365dd4b Fix the ridiculous SubtargetFeatures API where it implicitly expects CPU name to 
be the first encoded as the first feature. It then uses the CPU name to look up
features / scheduling itineray even though clients know full well the CPU name
being used to query these properties.

The fix is to just have the clients explictly pass the CPU name!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134127 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-30 01:53:36 +00:00
Evan Cheng
ab8be96fd3 Sink SubtargetFeature and TargetInstrItineraries (renamed MCInstrItineraries) into MC. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134049 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-29 01:14:12 +00:00
Wesley Peck
3d820baf19 Add scheduling information for the MBlaze backend. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129311 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-11 22:31:52 +00:00
Wesley Peck
a70f28ce7d Adding the MicroBlaze backend. 
The MicroBlaze is a highly configurable 32-bit soft-microprocessor for
use on Xilinx FPGAs. For more information see:
http://www.xilinx.com/tools/microblaze.htm
http://en.wikipedia.org/wiki/MicroBlaze

The current LLVM MicroBlaze backend generates assembly which can be
compiled using the an appropriate binutils assembler.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96969 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-23 19:15:24 +00:00