Commit Graph

3152 Commits

Author SHA1 Message Date
Vladimir Medic
7650bc0fd2 This patch implements .set mips32r2 directive and sets appropriate feature bits. It also introduces helper functions that are used to set and clear feature bits as necessary. This directive is a counterpart of -mips32r2 command line options with the exception that it does not influence elf header flags. The usage example is gives in test file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202807 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-04 09:54:09 +00:00
Kevin Qin
5dee350565 [AArch64]Fix improper diagnostics about offset range of load/store instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202775 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-04 02:05:13 +00:00
Reid Kleckner
4e43e1e686 MC: Fix Intel assembly parser for [global + offset]
We were dropping the displacement on the floor if we also had some
immediate offset.

Should fix PR19033.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202774 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-04 00:33:17 +00:00
Ed Maste
c1e634da0c [mips] support FK_Data_2 and FK_Data_8 to fix big-endian debug data
This fixes invalid lengths in .debug_aranges on big-endian mips64
(lengths appear to be left-shifted by 32 bits) and in .debug_loc.

Differential Revision: http://llvm-reviews.chandlerc.com/D2517


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202716 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-03 14:27:49 +00:00
Vladimir Medic
afa6150f04 This patch implements jalx instruction for Mips architecture.This instruction executes a procedure call within the current 256 MB-aligned region and change the ISA Mode from MIPS32 to microMIPS32 or MIPS16e. Usage samples for assembler and dissasembler are provided as well.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202706 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-03 13:12:59 +00:00
Saleem Abdulrasool
00e373aa73 AsmParser: add missed tests
The diagnostics tests were missing from the previous introduction of ifeqs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202674 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-03 06:35:00 +00:00
Venkatraman Govindaraju
c594f39acb [Sparc] Add trap on integer condition codes (Ticc) instructions to Sparc backend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202670 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-02 23:39:07 +00:00
Venkatraman Govindaraju
75bff895e4 [Sparc] Add return/rett instruction to Sparc backend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202666 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-02 22:55:53 +00:00
Venkatraman Govindaraju
c4b0eecd83 [Sparc] Add support for decoding jmpl/retl/ret instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202663 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-02 21:17:44 +00:00
Venkatraman Govindaraju
833687be0e [Sparc] Add fcmpe* instructions to Sparc backend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202661 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-02 19:56:19 +00:00
Venkatraman Govindaraju
cf06410678 [Sparc] Add VIS instructions to sparc backend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202660 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-02 19:31:21 +00:00
Venkatraman Govindaraju
2871375882 [SparcV9] Adds support for branch on integer register instructions (BPr) and conditional moves on integer register (MOVr/FMOVr).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202628 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-02 09:46:56 +00:00
Venkatraman Govindaraju
a21b315a06 [Sparc] Add support for parsing branches and conditional move instructions with %fcc1-%fcc3 conditional registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202616 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-02 06:28:15 +00:00
Venkatraman Govindaraju
afad335cae [Sparc] Add support for parsing fcmp with %fcc registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202610 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-02 03:39:39 +00:00
Venkatraman Govindaraju
628886b1d2 [SparcV9] Add support for parsing branch instructions with prediction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202602 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-01 22:03:07 +00:00
Venkatraman Govindaraju
e4c88dd909 [Sparc] Add support for parsing annulled branch instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202599 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-01 20:08:48 +00:00
Venkatraman Govindaraju
d4dafd17e1 [Sparc] Add support for parsing sparcv9 instructions addc/subc/addccc/subccc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202598 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-01 18:54:52 +00:00
Venkatraman Govindaraju
e1f5cd3002 [Sparc] Add missing ALU instruction patterns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202597 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-01 17:51:00 +00:00
Sasa Stankovic
9b1add5551 Add missing FileCheck in test command line.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202594 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-01 16:14:29 +00:00
Venkatraman Govindaraju
9314308db1 [Sparc] Add support to decode unimp instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202581 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-01 09:28:18 +00:00
Venkatraman Govindaraju
61f5c0a065 [Sparc] Add support to decode negative simm13 operands in the sparc disassembler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202578 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-01 09:11:57 +00:00
Venkatraman Govindaraju
830156c660 [Sparc] Add support for decoding call instructions in the sparc disassembler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202577 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-01 08:30:58 +00:00
Venkatraman Govindaraju
06f2e69c2f [Sparc] Add support to disassemble sparc memory instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202575 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-01 07:46:33 +00:00
Venkatraman Govindaraju
8669eda107 Add support for parsing sun-style section flags in ELFAsmParser.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202573 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-01 06:21:00 +00:00
Venkatraman Govindaraju
5ddaa6dcf4 [Sparc] Implement writeNopData. Emit actual NOP instruction instead of just filling with zeroes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202572 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-01 05:45:09 +00:00
Venkatraman Govindaraju
e0c7e3d139 [Sparc] Teach SparcAsmParser to emit correct relocations for PIC code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202571 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-01 05:07:21 +00:00
Venkatraman Govindaraju
17e9537004 [Sparc] Add support for parsing directives in SparcAsmParser.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202564 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-01 02:18:04 +00:00
Venkatraman Govindaraju
c9bf74fdc5 [Sparc] Emit 'restore' instead of 'restore %g0, %g0, %g0'. This improves the readability of the generated code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202563 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-01 01:04:26 +00:00
Zoran Jovanovic
5d945dbe5e Fixed encoding of SYSCALL microMIPS instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202523 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-28 18:17:08 +00:00
Zoran Jovanovic
8f883ae9d3 Revert revision 202518 because of wrong commit message.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202521 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-28 18:14:16 +00:00
Zoran Jovanovic
60f8980545 Fix operand of SC instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202518 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-28 18:02:17 +00:00
Sasa Stankovic
068a8c145a [mips] Implement NaCl sandboxing of indirect jumps:
* Align targets of indirect jumps to instruction bundle boundaries (in MI layer).
  * Add masking instructions before indirect jumps (in MC layer).

Differential Revision: http://llvm-reviews.chandlerc.com/D2847


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202479 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-28 10:00:38 +00:00
Alp Toker
bf930d5c1f Fix typos
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202107 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-25 04:21:15 +00:00
Saleem Abdulrasool
6631253907 Asm Parser: support .error directive
The .error directive is similar to .err in that it will halt assembly if it is
evaluated for assembly.  However, it permits a user supplied message to be
rendered.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201999 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-23 23:02:23 +00:00
Saleem Abdulrasool
e3d661f547 AsmParser: support .ifeqs directive
The .ifeqs directive assembles the following code if the quoted string
parameters are equal.  The strings must be quoted using double quotes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201998 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-23 23:02:18 +00:00
Saleem Abdulrasool
ec1c80576d ARM IAS: support .align without parameters
.align is handled specially on certain targets.  .align without any parameters
on ARM indicates a default alignment (4).  Handle the special case in the target
parser, but fall back to the generic parser for the normal version.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201988 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-23 17:45:32 +00:00
Saleem Abdulrasool
69f706d9e1 MCAsmParser: support .ifne
The .ifne directive assembles the following section of code if the argument
expression is non-zero.  Effectively, it is equivalent to if.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201986 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-23 15:53:41 +00:00
Saleem Abdulrasool
0922e5b643 MCAsmParser: handle space properly for .ifc/.ifnc
If the strings are not quoted, the first string stops at the first comma, and
the second string stops at the end of the line.  Strings which contain
whitespace should be quoted.  Unquoted space is to be discarded.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201985 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-23 15:53:36 +00:00
Saleem Abdulrasool
a0d16299c9 MCAsmParser: add support for .err directive
The .err directive produces an error whenever it is assembled.  This can be
useful for preventing assembly when an unexpected condition occurs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201984 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-23 15:53:30 +00:00
Saleem Abdulrasool
be66089390 ARM IAS: support .short and .hword
This adds support for the .short and its alias .hword for adding literal values
into the object file.  This is similar to the .word directive, however, rather
than inserting a value of 4 bytes, adds a 2-byte value.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201968 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-23 06:22:09 +00:00
Nico Rieck
fa3089b14c MC: Support COFF string tables larger than 10MB
Offsets past the range of single-slash encoding are encoded as base64,
padded to 6 characters, and prefixed with two slashes. This encoding is
undocumented but used by MSVC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201940 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-22 16:12:20 +00:00
Daniel Sanders
5c86661f15 [mips] Make it impossible to have UnknownABI in CodeGen and Integrated Assembler.
Summary:
This removes the need to coerce UnknownABI to the default ABI (O32 for
MIPS32, N64 for MIPS64 [*]) in both MipsSubtarget and MipsAsmParser.

Clang has been updated to disable both possible default ABI's before enabling
the ABI it intends to use.

[*] N64 being the default for MIPS64 is not actually correct.
    However N32 is not fully implemented/tested yet.

Depends on: D2830

Reviewers: jacksprat, matheusalmeida

Reviewed By: matheusalmeida

Differential Revision: http://llvm-reviews.chandlerc.com/D2832
Differential Revision: http://llvm-reviews.chandlerc.com/D2846



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201792 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-20 14:58:19 +00:00
Benjamin Kramer
59f6c76703 AsmParser: Disable Darwin-style macro argument expansion on non-darwin targets.
There is code in the wild that relies on $0 not being expanded.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201784 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-20 13:36:32 +00:00
Elena Demikhovsky
08316a11e4 AVX-512: Assembly parsing of broadcast semantic in AVX-512; imlemented by Nis Zinovy (zinovy.y.nis@intel.com)
Fixed truncate i32 to i1; a test will be provided in the next commit.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201757 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-20 06:34:39 +00:00
Daniel Sanders
210edf5559 [mips] Add explicit N32 and N64 tests to nabi-regs.s test
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201684 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-19 15:30:54 +00:00
Craig Topper
fa0cf99585 Remove special FP opcode maps and instead add enough MRM_XX formats to handle all the FP operations. This increases format by 1 bit, but decreases opcode map by 1 bit so the TSFlags size doesn't change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201649 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-19 08:25:02 +00:00
Craig Topper
82a644adf2 Remove A6/A7 opcode maps. They can all be handled with a TB map, opcode of 0xa6/0xa7, and adding MRM_C0/MRM_E0 forms. Removes 376K from the disassembler tables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201641 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-19 05:34:21 +00:00
Saleem Abdulrasool
156f2a1f5d MCAsmParser: support required parameters
This enhances the macro parser to parse and handle parameter qualifications,
which is needed to support required formal parameters in macro definitions.  A
required parameter may not be defaulted (though providing a default value is
accepted with a warning).  This improves GAS compatibility.

Partially addresses PR9248.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201630 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-19 03:00:29 +00:00
Kevin Enderby
4959a2d878 Fix the arm assembler so that this malformed instruction:
ldrd r6, r7 [r2, #15]
simply gives an error and does not triggers an assertion.

As Jim points out, the diagnostic is really strange here,
but fixing that would be more complicated. The missing
comma results in the parser expecting a construct like r2[2],
which is the vector index thing the error message is talking
about. That's not what the user intended, though, and there's
nothing else in the instruction that looks at all like a vector.
Yet more fallout from not having a real parser here and trying
to do context-free generic matching for addressing modes.

rdar://15097243


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201531 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-17 21:45:27 +00:00
Anders Waldenborg
1410f7ffc6 Add support for assigning to . in AsmParser.
This is implemented by handling assignments to the '.' pseudo symbol
as ".org" directives.

Differential Revision: http://llvm-reviews.chandlerc.com/D2625



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201530 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-17 20:48:32 +00:00