Evan Cheng
da47e6e0d0
Replace all target specific implicit def instructions with a target independent one: TargetInstrInfo::IMPLICIT_DEF.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48380 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-15 00:03:38 +00:00
Chris Lattner
834f1ce031
rename isLoad -> isSimpleLoad due to evan's desire to have such a predicate.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45667 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-06 23:38:27 +00:00
Chris Lattner
9c9fbf8e9c
remove some isStore flags that are now inferred automatically.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45652 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-06 05:53:26 +00:00
Chris Lattner
4ee451de36
Remove attribution from file headers, per discussion on llvmdev.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45418 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-29 20:36:04 +00:00
Bill Wendling
c3536b8ecb
Add the 64-bit versions of the DS* Altivec instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41717 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-05 04:05:20 +00:00
Dale Johannesen
48bd15ed72
Fix arguments for some Altivec instructions. From SWB.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40957 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-09 00:49:19 +00:00
Dale Johannesen
84109cd015
Fix spelling of mtvscr and mfvscr.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40908 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-07 23:08:00 +00:00
Evan Cheng
66ffe6be0c
Vector fneg must be expanded into fsub -0.0, X.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40586 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-30 07:51:22 +00:00
Evan Cheng
ffbaccae02
No more noResults.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40132 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-21 00:34:19 +00:00
Evan Cheng
64d80e3387
Change instruction description to split OperandList into OutOperandList and
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InOperandList. This gives one piece of important information: # of results
produced by an instruction.
An example of the change:
def ADD32rr : I<0x01, MRMDestReg, (ops GR32:$dst, GR32:$src1, GR32:$src2),
"add{l} {$src2, $dst|$dst, $src2}",
[(set GR32:$dst, (add GR32:$src1, GR32:$src2))]>;
=>
def ADD32rr : I<0x01, MRMDestReg, (outs GR32:$dst), (ins GR32:$src1, GR32:$src2),
"add{l} {$src2, $dst|$dst, $src2}",
[(set GR32:$dst, (add GR32:$src1, GR32:$src2))]>;
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40033 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-19 01:14:50 +00:00
Chris Lattner
3dd074afcb
fix incorrect encoding of vminsw.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34351 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-16 21:20:09 +00:00
Chris Lattner
303c695529
Make the implicit def instructions look like other instrs.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29174 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-18 16:33:26 +00:00
Chris Lattner
4e85e64007
Remove some now-unneeded casts from instruction patterns. With the casts
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removed, tblgen produces identical output to with them in.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28867 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-20 00:39:56 +00:00
Chris Lattner
ba2194ae84
Fix the CodeGen/PowerPC/buildvec_canonicalize.ll regression last night.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27908 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-20 19:01:30 +00:00
Chris Lattner
0231007269
Make sure that the new instructions selected have the right type. This fixes
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CodeGen/PowerPC/2006-04-19-vmaddfp-crash.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27868 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-20 05:58:10 +00:00
Chris Lattner
f3f69decca
Implement a TODO: have the legalizer canonicalize a bunch of operations to
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one type (v4i32) so that we don't have to write patterns for each type, and
so that more CSE opportunities are exposed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27731 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-16 01:37:57 +00:00
Chris Lattner
6e94af75de
Add patterns for matching vnots with bit converted inputs. Most of these will
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go away when I start using evan's binop type canonicalizer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27725 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-15 23:45:24 +00:00
Chris Lattner
e87192a854
Rename get_VSPLI_elt -> get_VSPLTI_elt
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Canonicalize BUILD_VECTOR's that match VSPLTI's into a single type for each
form, eliminating a bunch of Pat patterns in the .td file and allowing us to
CSE stuff more aggressively. This implements
PowerPC/buildvec_canonicalize.ll:VSPLTI
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27614 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-12 17:37:20 +00:00
Chris Lattner
2b1c3258d6
Ensure that zero vectors are always v4i32, which forces them to CSE with
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each other. This implements CodeGen/PowerPC/vxor-canonicalize.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27609 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-12 16:53:28 +00:00
Chris Lattner
140a58f9df
Change the interface to the predicate that determines if vsplti* can be used.
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No functionality changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27536 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-08 06:46:53 +00:00
Chris Lattner
f24380e78e
Match vpku[hw]um(x,x).
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Convert vsldoi(x,x) to work the same way other (x,x) cases work.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27467 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-06 22:28:36 +00:00
Chris Lattner
caad163496
Add support for matching vmrg(x,x) patterns
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27463 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-06 22:02:42 +00:00
Chris Lattner
116cc48e30
Pattern match vmrg* instructions, which are now lowered by the CFE into shuffles.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27457 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-06 21:11:54 +00:00
Chris Lattner
d0608e191f
Support pattern matching vsldoi(x,y) and vsldoi(x,x), which allows the f.e. to
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lower it and LLVM to have one fewer intrinsic. This implements
CodeGen/PowerPC/vec_shuffle.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27450 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-06 18:26:28 +00:00
Chris Lattner
ddb739e5ea
Compile the vpkuhum/vpkuwum intrinsics into vpkuhum/vpkuwum instead of into
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vperm with a perm mask lvx'd from the constant pool.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27448 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-06 17:23:16 +00:00
Chris Lattner
d8242b49b2
Add all of the data stream intrinsics and instructions. woo
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27442 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-05 22:27:14 +00:00
Chris Lattner
99bdc654e5
Fix a typo
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27440 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-05 20:15:25 +00:00
Chris Lattner
3827f712da
add vsl
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27425 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-05 01:16:22 +00:00
Chris Lattner
0d2cf6b1d1
add vmladduhm
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27423 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-05 00:49:48 +00:00
Chris Lattner
4d9100ddc9
Add m[tf]vscr instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27421 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-05 00:03:57 +00:00
Chris Lattner
72e241cff7
Add missing byte merges.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27418 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-04 23:43:56 +00:00
Chris Lattner
a046d4ac11
Add FP -> Int Conversions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27417 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-04 23:25:02 +00:00
Chris Lattner
3f0b7ff39f
add average intrinsics
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27416 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-04 23:14:00 +00:00
Chris Lattner
7ff7e67458
Ask legalize to promote all vector shuffles to be v16i8 instead of having to
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handle all 4 PPC vector types. This simplifies the matching code and allows
us to eliminate a bunch of patterns. This also adds cases we were missing,
such as CodeGen/PowerPC/vec_splat.ll:splat_h.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27400 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-04 17:25:31 +00:00
Chris Lattner
684ad7702f
Plug in the byte and short splats
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27387 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-04 00:05:13 +00:00
Chris Lattner
c461a51234
Add the full set of min/max instructions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27372 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-03 15:58:28 +00:00
Chris Lattner
c3837d4917
Implement vnot using VNOR instead of using 'vspltisb v0, -1' and vxor
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27331 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-01 22:41:47 +00:00
Chris Lattner
348ba3f9bf
Shrinkify some more intrinsic definitions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27322 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-31 22:41:56 +00:00
Chris Lattner
6cea814f2c
Pull operand asm string into base class, shrinkifying intrinsic definitions.
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No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27320 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-31 22:34:05 +00:00
Chris Lattner
b5c4d17a6c
Fix 80 column violations :)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27315 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-31 21:57:36 +00:00
Chris Lattner
7376a5e129
fix a pasto
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27308 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-31 21:19:06 +00:00
Chris Lattner
a9cb441642
Add vperm support for all datatypes
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27307 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-31 20:00:35 +00:00
Chris Lattner
9492151e32
compactify some more instruction definitions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27288 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-31 05:38:32 +00:00
Chris Lattner
5f7b01963f
Compactify comparisons.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27287 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-31 05:32:57 +00:00
Chris Lattner
a17b1557ad
Lower vector compares to VCMP nodes, just like we lower vector comparison
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predicates to VCMPo nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27285 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-31 05:13:27 +00:00
Chris Lattner
8768bf6ee3
Add the rest of the vmul instructions and the vmulsum* instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27268 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-30 23:39:06 +00:00
Chris Lattner
3c4f4e9f1b
Use a new tblgen feature to significantly shrinkify instruction definitions that
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directly correspond to intrinsics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27266 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-30 23:21:27 +00:00
Chris Lattner
30a6abaef0
Add a bunch of new instructions for intrinsics.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27265 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-30 23:07:36 +00:00
Nate Begeman
816cee2216
Fix a couple typos
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27216 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-28 04:18:18 +00:00
Nate Begeman
98e70cc124
Add a few more altivec intrinsics
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27215 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-28 04:15:58 +00:00