Commit Graph

70365 Commits

Author SHA1 Message Date
Daniel Sanders
77ae274ae7 [mips][mips64r6] cl[oz], and dcl[oz] are re-encoded in MIPS32r6/MIPS64r6
Summary:
There is no change to the restrictions, just the result register is stored
once in the encoding rather than twice. The rt field is zero in
MIPS32r6/MIPS64r6.

Depends on D4119

Reviewers: zoran.jovanovic, jkolek, vmedic

Reviewed By: vmedic

Differential Revision: http://reviews.llvm.org/D4120

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211019 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-16 13:18:59 +00:00
Daniel Sanders
af0d72a6f9 [mips][mips64r6] ll, sc, lld, and scd are re-encoded on MIPS32r6/MIPS64r6.
Summary:
The linked-load, store-conditional operations have been re-encoded such
that have a 9-bit offset instead of the 16-bit offset they have prior to
MIPS32r6/MIPS64r6.

While implementing this, I noticed that the atomic load/store pseudos always
emit a sign extension using sll and sra. I have improved this to use seb/seh
when they are available (MIPS32r2/MIPS64r2 and above).

Depends on D4118

Reviewers: jkolek, zoran.jovanovic, vmedic

Reviewed By: vmedic

Differential Revision: http://reviews.llvm.org/D4119

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211018 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-16 13:13:03 +00:00
Dmitri Gribenko
438c85b50e Support/ConvertUTF: restore compatibility with MSVC, which only implements C89
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211016 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-16 11:22:33 +00:00
Dmitri Gribenko
9becc6c2af Support/ConvertUTF: implement U+FFFD insertion according to the recommendation
given in the Unicode spec

That is, replace every maximal subpart of an ill-formed subsequence with one
U+FFFD.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211015 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-16 11:09:46 +00:00
James Molloy
b3820b4289 [AArch64] Fix a fencepost error in lowering for llvm.aarch64.neon.uqshl.
Patch by Jiangning Liu!



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211014 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-16 10:39:21 +00:00
Daniel Sanders
5ee24f37af [mips][mips64r6] [ls][wd]c2 were re-encoded with 11-bit signed immediates rather than 16-bit in MIPS32r6/MIPS64r6
Summary:
The error message for the invalid.s cases isn't very helpful. It happens because
there is an instruction with a wider immediate that would have matched if the
NotMips32r6 predicate were true. I have some WIP to improve the message but it
affects most error messages for removed/re-encoded instructions on
MIPS32r6/MIPS64r6 and should therefore be a separate commit.

Depens on D4115

Reviewers: zoran.jovanovic, jkolek, vmedic

Reviewed By: vmedic

Differential Revision: http://reviews.llvm.org/D4117

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211012 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-16 10:00:45 +00:00
Christian Pirker
467e6ad2e5 ARMEB: Fix trunc store for vector types
Reviewed at http://reviews.llvm.org/D4135



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211010 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-16 09:17:30 +00:00
Jingyue Wu
f6eb7e3175 Canonicalize addrspacecast ConstExpr between different pointer types
As a follow-up to r210375 which canonicalizes addrspacecast
instructions, this patch canonicalizes addrspacecast constant
expressions.

Given clang uses ConstantExpr::getAddrSpaceCast to emit addrspacecast
cosntant expressions, this patch is also a step towards having the
frontend emit canonicalized addrspacecasts.

Piggyback a minor refactor in InstCombineCasts.cpp

Update three affected tests in addrspacecast-alias.ll,
access-non-generic.ll and constant-fold-gep.ll and added one new test in
constant-fold-address-space-pointer.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211004 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-15 21:40:57 +00:00
Matt Arsenault
f9ef37a986 Fix copy paste error
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211003 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-15 21:22:52 +00:00
Matt Arsenault
fa848ccd09 R600: Remove a few more things from AMDILISelLowering
Try to keep all the setOperationActions for integer ops
together.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211001 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-15 21:08:58 +00:00
Matt Arsenault
e2480a202f R600: Fix assert on vector sdiv
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211000 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-15 21:08:54 +00:00
Matt Arsenault
62f6ab7a6d R600: Move / cleanup more leftover AMDIL stuff.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210998 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-15 20:23:38 +00:00
Matt Arsenault
57177e3361 R600: Move division custom lowering out of AMDILISelLowering
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210997 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-15 20:08:02 +00:00
Eric Christopher
47d34abdb0 Temporarily revert r210953 in an attempt to bring the ARM buildbots
back.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210996 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-15 19:55:14 +00:00
Matt Arsenault
61bfbc4d96 R600: Report that integer division is expensive.
Divides by weird constants now emit much better code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210995 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-15 19:48:16 +00:00
Matt Arsenault
36b9c7c872 R600: Remove dead code
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210994 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-15 19:48:13 +00:00
David Blaikie
5379c6930d PR20038: DebugInfo missing DIEs for some concrete variables.
I haven't nailed this down entirely, but this is about as small of a
test case as I can seem to construct and adequately demonstrates the
crasher. I'll continue investigating the root cause/fix(es).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210993 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-15 19:34:26 +00:00
Tim Northover
40ed1d89b1 LegalizeDAG: make sure cast is unsigned before using FP_TO_UINT.
It's valid to use FP_TO_SINT when asking for a smaller type (e.g. all
"unsigned int16" values fit into a "signed int32"), but the reverse
isn't true.

Unfortunately, I'm not actually aware of any architecture with
asymmetric FP_TO_SINT and FP_TO_UINT handling and the logic happens to
work in the symmetric case, so I can't actually write a test for this.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210986 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-15 09:27:20 +00:00
Tim Northover
8bfc50e4a9 AArch64: improve handling & modelling of FP_TO_XINT nodes.
There's probably no acatual change in behaviour here, just updating
the LowerFP_TO_INT function to be more similar to the reverse
implementation and updating costs to current CodeGen.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210985 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-15 09:27:15 +00:00
Tim Northover
94fe5c1fe2 AArch64: improve vector [su]itofp handling.
This somehow got missed in the AArch64 merge, so should fix a
performance regression since 3.4.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210984 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-15 09:27:06 +00:00
Artyom Skrobov
f6b4b10c29 Replacing the private implementations of SwapValue with calls to sys::swapByteOrder()
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210980 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-14 13:49:57 +00:00
Artyom Skrobov
ab22d95481 Using llvm::sys::swapByteOrder() for the common case of byte-swapping a value in place
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210978 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-14 13:18:07 +00:00
Artyom Skrobov
9bb92cb537 Renaming SwapByteOrder() to getSwappedBytes()
The next commit will add swapByteOrder(), acting in-place



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210973 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-14 11:36:01 +00:00
Matt Arsenault
212514f179 Fix typo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210968 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-14 04:26:07 +00:00
Matt Arsenault
aac455af99 R600: Fix asserts related to constant initializers
This would assert if a constant address space was extern
and therefore didn't have an initializer. If the initializer
was undef, it would hit the unreachable unhandled initializer case.

An extern global should never really occur since we don't have
machine linking, but bugpoint likes to remove initializers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210967 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-14 04:26:05 +00:00
Matt Arsenault
15f474c925 R600: Use address space enum instead of value
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210966 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-14 04:26:01 +00:00
Nick Lewycky
38be65b328 Remove extra whitespace in function declaration. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210965 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-14 03:48:29 +00:00
David Blaikie
d32eccc97b DebugInfo: Remove some extra handling of abstract variables and instead rely solely on the delayed handling introduced in r210946
Now that we handle finding abstract variables at the end of the module,
remove the upfront handling and just ensure the abstract variable is
built when necessary.

In theory we could have a split implementation, where inlined variables
are immediately constructed referencing the abstract definition, and
concrete variables are delayed - but let's go with one solution for now
unless there's a reason not to.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210961 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-13 23:52:55 +00:00
Eric Christopher
53551e2476 Remove InstrItineraryData off of the TargetMachine - it's already
on the subtarget and just forward the accessor.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210955 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-13 23:11:13 +00:00
Eric Christopher
58c99da4d8 Move ARMJITInfo off of the TargetMachine and down onto the subtarget.
This required untangling a mess of headers that included around.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210953 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-13 23:04:46 +00:00
Jiangning Liu
c5bc067a0f Move GlobalMerge from Transform to CodeGen.
This patch is to move GlobalMerge pass from Transform/Scalar                                                           
to CodeGen, because GlobalMerge depends on TargetMachine.
In the mean time, the macro INITIALIZE_TM_PASS is also moved
to CodeGen/Passes.h. With this fix we can avoid making
libScalarOpts depend on libCodeGen.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210951 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-13 22:57:59 +00:00
Eric Christopher
7354a3fe57 The hazard recognizer only needs a subtarget, not a target machine
so make it take one. Fix up all users accordingly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210948 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-13 22:38:52 +00:00
Eric Christopher
0cf109de54 Fix typo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210947 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-13 22:38:48 +00:00
David Blaikie
f154f3b592 DebugInfo: Reference abstract definitions from variables in concrete definitions that preceed their first inline definition.
Rather than relying on abstract variables looked up at the time the
concrete variable is created, look them up at the end of the module to
ensure they're referenced even if they're created after the concrete
definition. This completes/matches the work done in r209677 to handle
this for the subprograms themselves.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210946 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-13 22:35:44 +00:00
Alexey Samsonov
869d3efac9 [DWARF parser] Use distinction between DW_AT_ranges_base and DW_AT_GNU_ranges_base instead of DWARF version
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210945 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-13 22:31:03 +00:00
David Blaikie
9907af99d4 DwarfDebug::getExistingAbstractVariable: constify an existing reference parameter that didn't need to be mutated.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210944 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-13 22:29:31 +00:00
David Blaikie
0fcb9cb1c1 DebugInfo: Following up to r209677, refactor local variable emission to delay the choice between emitting the definition attributes or using DW_AT_abstract_definition
This doesn't fix the abstract variable handling yet, but it introduces a
similar delay mechanism as was added for subprograms, causing
DW_AT_location to be reordered to the beginning of the attribute list
for local variables, and fixes all the test fallout for that.

A subsequent commit will remove the abstract variable handling in
DbgVariable and just do the abstract variable lookup at module end to
ensure that abstract variables introduced after their concrete
counterparts are appropriately referenced by the concrete variable.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210943 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-13 22:18:23 +00:00
Zachary Turner
89e90b25e3 Make the error-handling functions thread-safe.
Prior to this change, error handling functions must be installed
and removed only inside of an llvm_[start/stop]_multithreading
pair.  This change allows error handling functions to be installed
any time, and from any thread.

Reviewed by: chandlerc

Differential Revision: http://reviews.llvm.org/D4140

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210937 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-13 21:20:44 +00:00
Alexey Samsonov
6140939365 Remove top-level Clang -fsanitize= flags for optional ASan features.
Init-order and use-after-return modes can currently be enabled
by runtime flags. use-after-scope mode is not really working at the
moment.

The only problem I see is that users won't be able to disable extra
instrumentation for init-order and use-after-scope by a top-level Clang flag.
But this instrumentation was implicitly enabled for quite a while and
we didn't hear from users hurt by it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210924 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-13 17:53:44 +00:00
Tim Northover
eee7a7a836 X86: lower ATOMIC_CMP_SWAP_WITH_SUCCESS directly
Lowering this new node allows us to fold the almost universal
comparison for success before it's even formed. Instead we can create
a copy from EFLAGS and an X86ISD::SETCC operation since all "cmpxchg"
instructions set the zero-flag to the correct value.

rdar://problem/13201607

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210923 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-13 17:29:39 +00:00
Matt Arsenault
f317d86f8f R600: Cleanup some old AMDIL stuff.
Move / delete some of the more obviously wrong
setOperationAction calls. Most of these are setting Expand
for types that aren't legal which is the default anyway.
Leave stuff that might require more thought on whether it's
junk or not as it is.

No functionality change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210922 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-13 17:20:53 +00:00
Rafael Espindola
d8b23109b2 Finishing touch for the std::error_code transition.
While std::error_code itself seems to work OK in all platforms, there
are few annoying differences with regards to the std::errc enumeration.

This patch adds a simple llvm enumeration, which will hopefully avoid build
breakages in other platforms and surprises as we get more uses of
std::error_code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210920 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-13 17:20:48 +00:00
Tim Northover
33fe993f2e Atomics: make use of the "cmpxchg weak" instruction.
This also simplifies the IR we create slightly: instead of working out
where success & failure should go manually, it turns out we can just
always jump to a success/failure block created for the purpose. Later
phases will sort out the mess without much difficulty.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210917 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-13 16:45:52 +00:00
Tim Northover
6b3ed2b821 Atomics: switch direction of cmpxchg comparison
This has two benefits: it makes the result more suitable for direct
insertaion into the struct to emulate the new cmpxchg, and it means
the name we give the instruction matches its actual effect better.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210916 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-13 16:45:36 +00:00
Tom Stellard
61bc72e9ae R600: Remove AMDIL instruction and register definitions
Most of these are no longer used any more.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210915 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-13 16:38:59 +00:00
Rafael Espindola
cc0d35a2e8 Remove unused and odd code.
This code was never being used and any use of it would look fairly strange.
For example, it would try to map a object_error::parse_failed to
std::errc::invalid_argument.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210912 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-13 15:36:17 +00:00
Tim Northover
e1a9d504a3 SCCP: update for cmpxchg returning { iN, i1 } now.
I accidentally missed this one since its use looked OK locally.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210909 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-13 14:54:09 +00:00
Zoran Jovanovic
636ae2b660 [mips][mips64r6] Relocation R_MIPS_PC18_S3
Differential Revision: http://reviews.llvm.org/D3890


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210908 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-13 14:26:47 +00:00
Tim Northover
8f2a85e099 IR: add "cmpxchg weak" variant to support permitted failure.
This commit adds a weak variant of the cmpxchg operation, as described
in C++11. A cmpxchg instruction with this modifier is permitted to
fail to store, even if the comparison indicated it should.

As a result, cmpxchg instructions must return a flag indicating
success in addition to their original iN value loaded. Thus, for
uniformity *all* cmpxchg instructions now return "{ iN, i1 }". The
second flag is 1 when the store succeeded.

At the DAG level, a new ATOMIC_CMP_SWAP_WITH_SUCCESS node has been
added as the natural representation for the new cmpxchg instructions.
It is a strong cmpxchg.

By default this gets Expanded to the existing ATOMIC_CMP_SWAP during
Legalization, so existing backends should see no change in behaviour.
If they wish to deal with the enhanced node instead, they can call
setOperationAction on it. Beware: as a node with 2 results, it cannot
be selected from TableGen.

Currently, no use is made of the extra information provided in this
patch. Test updates are almost entirely adapting the input IR to the
new scheme.

Summary for out of tree users:
------------------------------

+ Legacy Bitcode files are upgraded during read.
+ Legacy assembly IR files will be invalid.
+ Front-ends must adapt to different type for "cmpxchg".
+ Backends should be unaffected by default.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210903 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-13 14:24:07 +00:00
Daniel Sanders
7cfd0ffb3b [mips] Add cache and pref instructions
Summary:
cache and pref were added in MIPS-III, and MIPS32 but were re-encoded in
MIPS32r6/MIPS64r6 to use a 9-bit offset rather than the 16-bit offset
available to earlier cores.

Resolved the decoding conflict between pref and lwc3.

Depends on D4115

Reviewers: zoran.jovanovic, jkolek, vmedic

Reviewed By: vmedic

Differential Revision: http://reviews.llvm.org/D4116

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210900 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-13 13:15:59 +00:00