Dan Gohman
08293f6b6c
Fix indentation.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55049 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-20 13:50:12 +00:00
Dan Gohman
e3d920699c
Re-enable elimination of unnecessary SUBREG_TO_REG instructions in
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LowerSubregs, and fix an x86-64 isel bug that this exposed.
SUBREG_TO_REG for x86-64 implicit zero extension is only safe for
isel to generate when the source is known to always have zeros in
the high 32 bits. The EXTRACT_SUBREG instruction does not clear
the high 32 bits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54444 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-07 02:54:50 +00:00
Dan Gohman
2c3f7ae384
Re-introduce LeakDetector support for MachineInstrs and MachineBasicBlocks.
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Fix a leak that this turned up in LowerSubregs.cpp.
And, comment a leak in LiveIntervalAnalysis.cpp.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53746 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-17 23:49:46 +00:00
Evan Cheng
95350b9cd2
It's not safe to remove SUBREG_TO_REG that looks like identity copies, e.g. movl %eax, %eax on x86-64 actually does a zero-extend.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52421 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-17 17:59:16 +00:00
Evan Cheng
c3de802ad9
Do not issue identity copies.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52373 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-16 22:52:53 +00:00
Evan Cheng
7a315e865a
Revert this.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51949 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-04 17:21:44 +00:00
Evan Cheng
d8a46e3a74
LowerSubregs should not clobber any analysis.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51933 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-04 09:17:16 +00:00
Christopher Lamb
c929823525
Make insert_subreg a two-address instruction, vastly simplifying LowerSubregs pass. Add a new TII, subreg_to_reg, which is like insert_subreg except that it takes an immediate implicit value to insert into rather than a register.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48412 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-16 03:12:01 +00:00
Christopher Lamb
6634e26aa1
Get rid of a pseudo instruction and replace it with subreg based operation on real instructions, ridding the asm printers of the hack used to do this previously. In the process, update LowerSubregs to be careful about eliminating copies that have side affects.
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Note: the coalescer will have to be careful about this too, when it starts coalescing insert_subreg nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48329 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-13 05:47:01 +00:00
Christopher Lamb
1fab4a6bbb
Recommitting parts of r48130. These do not appear to cause the observed failures.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48223 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-11 10:09:17 +00:00
Evan Cheng
ea2378138f
Use TargetRegisterInfo::getPhysicalRegisterRegClass. Remove duplicated code.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48221 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-11 07:55:13 +00:00
Evan Cheng
4499e495ea
Revert 48125, 48126, and 48130 for now to unbreak some x86-64 tests.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48167 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-10 19:31:26 +00:00
Christopher Lamb
3feb0170a8
Allow insert_subreg into implicit, target-specific values.
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Change insert/extract subreg instructions to be able to be used in TableGen patterns.
Use the above features to reimplement an x86-64 pseudo instruction as a pattern.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48130 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-10 06:12:08 +00:00
Dan Gohman
6f0d024a53
Rename MRegisterInfo to TargetRegisterInfo.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46930 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-10 18:45:23 +00:00
Owen Anderson
d10fd9791c
Move copyRegToReg from MRegisterInfo to TargetInstrInfo. This is part of the
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Machine-level API cleanup instigated by Chris.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45470 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-31 06:32:00 +00:00
Chris Lattner
84bc5427d6
Rename SSARegMap -> MachineRegisterInfo in keeping with the idea
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that "machine" classes are used to represent the current state of
the code being compiled. Given this expanded name, we can start
moving other stuff into it. For now, move the UsedPhysRegs and
LiveIn/LoveOuts vectors from MachineFunction into it.
Update all the clients to match.
This also reduces some needless #includes, such as MachineModuleInfo
from MachineFunction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45467 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-31 04:13:23 +00:00
Chris Lattner
4ee451de36
Remove attribution from file headers, per discussion on llvmdev.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45418 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-29 20:36:04 +00:00
Evan Cheng
e11fb34381
isSubRegOf() is a dup of isSubRegister.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43249 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-23 06:51:50 +00:00
Evan Cheng
9efce638d3
Allow copyRegToReg to emit cross register classes copies.
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Tested with "make check"!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42346 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-26 06:25:56 +00:00
Dan Gohman
92dfe2001e
Remove isReg, isImm, and isMBB, and change all their users to use
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isRegister, isImmediate, and isMachineBasicBlock, which are equivalent,
and more popular.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41958 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-14 20:33:02 +00:00
Christopher Lamb
8b165731bc
Move isSubRegOf into MRegisterInfo. Fix a missed move elimination in LowerSubregs and add more debugging output there.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41005 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-10 21:11:55 +00:00
Christopher Lamb
98363225a3
Implement review feedback. No functionality change.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40863 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-06 16:33:56 +00:00
Christopher Lamb
bab2474b64
Add a MachineFunction pass, which runs post register allocation, that turns subreg insert/extract instruction into register copies. This ensures correct code gen if the coalescer isn't able to remove all subreg instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40521 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-26 08:18:32 +00:00