47714 Commits

Author SHA1 Message Date
Jakob Stoklund Olesen
79c890f64f Add TargetRegisterInfo::getRawAllocationOrder().
This virtual function will replace allocation_order_begin/end as the one
to override when implementing custom allocation orders. It is simpler to
have one function return an ArrayRef than having two virtual functions
computing different ends of the same array.

Use getRawAllocationOrder() in place of allocation_order_begin() where
it makes sense, but leave some clients that look like they really want
the filtered allocation orders from RegisterClassInfo.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133170 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-16 17:42:25 +00:00
Dan Gohman
a0697a7ef5 Add a comment describing why transforming (shl x, 1) to (add x, x) is to be
considered safe enough in this context.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133159 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-16 15:55:48 +00:00
Justin Holewinski
ec3141b27f PTX: Fix whitespace errors
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133158 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-16 15:17:11 +00:00
Bruno Cardoso Lopes
d381a7a91e Add AVX suport for fpextend.
Original patch by Syoyo Fujita with more comments by me.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133153 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-16 07:03:21 +00:00
Chad Rosier
689edc8b28 Revision r128665 added an optimization to make use of NEON multiplier
accumulator forwarding.  Specifically (from SVN log entry):

Distribute (A + B) * C to (A * C) + (B * C) to make use of NEON multiplier
accumulator forwarding:
vadd d3, d0, d1
vmul d3, d3, d2
=>
vmul d3, d0, d2
vmla d3, d1, d2

Make sure it catches cases where operand 1 is add/fadd/sub/fsub, which was
intended in the original revision.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133127 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-16 01:21:54 +00:00
Nick Lewycky
c06b5bf340 Add a DAGCombine for (ext (binop (load x), cst)).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133124 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-16 01:15:49 +00:00
Bruno Cardoso Lopes
e0b5cfcae8 Silence warnings in non assert builds. Patch by David Blaikie
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133118 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-16 00:40:02 +00:00
Anna Zaks
3c397eb741 Function::getNumBlockIDs() should be used instead of Function::size() to set the upper limit on the block IDs since basic blocks might get removed (simplified away) after being initially numbered. Plus the test case, in which SelectionDAGBuilder::visitBr() calls llvm::MachineFunction::removeFromMBBNumbering(), which introduces the hole in numbering leading to an assert in llc (prior to the fix).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133113 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-16 00:03:21 +00:00
Eli Friedman
992205ac71 Add a limit to the number of instructions memdep will scan in a single block. This prevents (at least in some cases) O(N^2) runtime in passes like DSE.
The limit in this patch is probably too high, but it is enough to stop DSE from going completely insane on a testcase I have (which has a single block with around 50,000 non-aliasing stores in it).

rdar://9471075



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133111 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-15 23:59:25 +00:00
John McCall
9fbd318d36 The ARC language-specific optimizer. Credit to Dan Gohman.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133108 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-15 23:37:01 +00:00
Owen Anderson
77b4b13c2a Add a new MVT::untyped. This will be used in future work for modelling ISA features like register pairs and lists with "interesting" constraints (such as ARM NEON contiguous register lists or even-odd paired registers). We need to be able to generate these instructions (often from intrinsics), but don't want to have to assign a legal type to them. Instead, we'll use an "untyped" edge to bypass the type-checking and simply ensure that the register classes match.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133106 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-15 23:35:18 +00:00
Jakob Stoklund Olesen
f28987b76e Use set operations instead of plain lists to enumerate register classes.
This simplifies many of the target description files since it is common
for register classes to be related or contain sequences of numbered
registers.

I have verified that this doesn't change the files generated by TableGen
for ARM and X86. It alters the allocation order of MBlaze GPR and Mips
FGR32 registers, but I believe the change is benign.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133105 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-15 23:28:14 +00:00
Eli Friedman
b53c7937c5 Simplify; no significant functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133086 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-15 21:08:25 +00:00
Rafael Espindola
0ad2dc46d9 Fix cmake build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133085 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-15 21:03:04 +00:00
Rafael Espindola
aeb6da46ce Handle jump tables. Test to follow soon.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133083 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-15 21:00:28 +00:00
John McCall
3a3465b71d Add a new function attribute, nonlazybind, which inhibits lazy-loading
optimizations when emitting calls to the function;  instead those calls may
use faster relocations which require the function to be immediately resolved
upon loading the dynamic object featuring the call.  This is useful when it
is known that the function will be called frequently and pervasively and
therefore there is no merit in delaying binding of the function.

Currently only implemented for x86-64, where it turns into a call through
the global offset table.

Patch by Dan Gohman, who assures me that he's going to add LangRef documentation
for this once it's committed.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133080 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-15 20:36:13 +00:00
Eli Friedman
e97c7da59d Remove unused code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133078 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-15 19:58:09 +00:00
Jim Grosbach
e82b8eeaa2 Diagnostic for undefined assembler local symbols.
Re-apply 133010, with fixes for inline assembler.

Original commit message:
"When an assembler local symbol is used but not defined in a module, a
Darwin assembler wants to issue a diagnostic to that effect."

Added fix to only perform the check when finalizing, as otherwise we're not
done and undefined symbols may simply not have been encountered yet.

Passes "make check" and a self-host check on Darwin.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133071 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-15 18:33:28 +00:00
Jakob Stoklund Olesen
b79e30cc9e Remove custom allocation orders in SystemZ.
Note that this actually changes code generation, and someone who
understands this target better should check the changes.

- R12Q is now allocatable. I think it was omitted from the allocation
  order by mistake since it isn't reserved. It as apparently used as a
  GOT pointer sometimes, and it should probably be reserved if that is
  the case.

- The GR64 registers are allocated in a different order now. The
  register allocator will automatically put the CSRs last. There were
  other changes to the order that may have been significant.

The test fix is because r0 and r1 swapped places in the allocation order.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133067 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-15 18:02:56 +00:00
Evan Cheng
f60ceac9cd Another revsh pattern. rdar://9609059
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133064 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-15 17:17:48 +00:00
Andrew Trick
4cb971ce1c Added -stress-sched flag in the Asserts build.
Added a test case for handling physreg aliases during pre-RA-sched.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133063 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-15 17:16:12 +00:00
Roman Divacky
e355b80194 Make PPC64CompilationCallback compilable no non-darwin platforms.
Patch by Nathan Whitehorn!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133059 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-15 15:29:47 +00:00
Nadav Rotem
8e61432249 getZeroExtendInReg needs to get a scalar type
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133057 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-15 14:37:18 +00:00
Nadav Rotem
baff46f192 Enable the simplification of truncating-store after fixing the usage of
GetDemandBits (which must operate on the vector element type).

Fix the a usage of getZeroExtendInReg which must also be done on scalar types.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133052 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-15 11:19:12 +00:00
Owen Anderson
1e56a2a85f Replace the statically generated hashtables for checking register relationships with just scanning the (typically tiny) static lists.
At the time I wrote this code (circa 2007), TargetRegisterInfo was using a std::set to perform these queries.  Switching to the static hashtables was an obvious improvement, but in reality there's no reason to do anything other than scan.
With this change, total LLC time on a whole-program 403.gcc is reduced by approximately 1.5%, almost all of which comes from a 15% reduction in LiveVariables time.  It also reduces the binary size of LLC by 86KB, thanks to eliminating a bunch of very large static tables.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133051 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-15 06:53:50 +00:00
Nick Lewycky
9100a78bce Teach the .ll parser to handle named metadata with non-simple names.
Unfortunately we can't follow what the rest of the language does (wrapping it
in double-quotes) because that would cause an ambiguity with metadata strings,
so instead we escape any unusual characters with \xx escaping.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133050 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-15 06:37:58 +00:00
Bob Wilson
7a10ab7d6f A minor simplification: no functional change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133047 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-15 06:04:34 +00:00
Eli Friedman
5d40ef2b1d Stop using memdep for a check that didn't really make sense with memdep. In terms of specific issues, using memdep here checks irrelevant instructions and won't work properly once we start returning "unknown" more aggressively from memdep.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133035 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-15 01:25:56 +00:00
Evan Cheng
bf188aeae7 PerformBFICombine - (bfi A, (and B, Mask1), Mask2) -> (bfi A, B, Mask2) iff
the bits being cleared by the AND are not demanded by the BFI.

The previous BFI dag combine rule was actually incorrect (or used to be
correct until BFI representation changed).

rdar://9609030


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133034 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-15 01:12:31 +00:00
Ted Kremenek
cf886188fb add option for literal formatting to APInt::toString()
toString() now takes an optional bool argument that,
depending on the radix, adds the appropriate prefix
to the integer's string representation that makes it into a
meaningful C literal, e.g.:

hexademical: '-f' becomes '-0xf'
octal: '77' becomes '077'
binary: '110' becomes '0b110'

Patch by nobled@dreamwidth.org!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133032 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-15 00:51:55 +00:00
Eli Friedman
a990e071f2 Add "unknown" results for memdep, which mean "I don't know whether a dependence for the given instruction exists in the given block". This cleans up all the existing hacks in memdep which represent this concept by returning clobber with various unrelated instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133031 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-15 00:47:34 +00:00
Tanya Lattner
189531f317 Add an optimization that looks for a specific pair-wise add pattern and generates a vpaddl instruction instead of scalarizing the add.
Includes a test case.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133027 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-14 23:48:48 +00:00
Anna Zaks
8d10f6d77b Anna's test commit (#2).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133023 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-14 22:40:29 +00:00
Chad Rosier
92bcd96bbc When pattern matching during instruction selection make sure shl x,1 is not
converted to add x,x if x is a undef.  add undef, undef does not guarantee
that the resulting low order bit is zero.
Fixes <rdar://problem/9453156> and <rdar://problem/9487392>.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133022 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-14 22:29:10 +00:00
Eli Friedman
4e3adfde65 PR10136: fix PPCTargetLowering::LowerCall_SVR4 so that a necessary CopyToReg doesn't appear to be dead.
Roman, since you're writing tests for other PPC-SVR4 vararg-related stuff, would you mind writing a test for this?



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133018 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-14 22:16:20 +00:00
Anna Zaks
7bc5632218 Anna's test commit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133017 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-14 22:10:12 +00:00
Jim Grosbach
6c3044db28 Revert 133010. Self-hosted buildbot unhappy.
Apparently llvm itself generates undefined assembler local labels, causing
self-hosting problems with this patch. Reverting until that's sorted out.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133013 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-14 21:51:20 +00:00
Jim Grosbach
c35dd25ab8 Diagnostic for undefined assembler local symbols.
When an assembler local symbol is used but not defined in a module, a
Darwin assembler wants to issue a diagnostic to that effect.

rdar://9559714


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133010 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-14 21:13:25 +00:00
Eli Friedman
0fc3015ae8 Revert r133004 ; it's breaking nightly tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133007 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-14 19:30:33 +00:00
Rafael Espindola
b8018d8f88 Partial revert of 132882.
Dan noted that this would work on the case shown on the commit message. I think
the case that was failing was a bb ending with a redundant conditional jump:

...
jne foo

foo:
...

I was unable to find any such case in the tests or in a debug build of clang,
so I will revert this part of the patch and watch the bots.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133004 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-14 18:12:31 +00:00
Evan Cheng
a6eb2562b6 Also recognize ARM v4t and v5e variants.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133002 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-14 18:08:33 +00:00
Rafael Espindola
f924dea8dd Add 132986 back, but avoid non-determinism if a bb address gets reused.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132995 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-14 15:31:54 +00:00
Rafael Espindola
7a07083c25 revert 132986 to see if the bots go green.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132988 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-14 12:48:26 +00:00
Nadav Rotem
c2492c28ef Add a testcase for checking the integer-promotion of many different vector
types (with power of two types such as 8,16,32 .. 512).

Fix a bug in the integer promotion of bitcast nodes. Enable integer expanding
only if the target of the conversion is an integer (when the type action is
scalarize).

Add handling to the legalization of vector load/store in cases where the saved
vector is integer-promoted.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132985 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-14 08:11:52 +00:00
Nadav Rotem
c7cb7ed013 Disable trunc-store simplification on vectors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132984 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-14 07:18:26 +00:00
Cameron Zwarich
5b93d3ca6f Be more obvious about what is being tested.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132982 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-14 06:33:51 +00:00
Rafael Espindola
f5b5c5156c Implement Jakob's suggestion on how to detect fall thought without calling
AnalyzeBranch.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132981 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-14 06:08:32 +00:00
Bruno Cardoso Lopes
9a767330f5 Add one more argument to the prefetch intrinsic to indicate whether it's a data
or instruction cache access. Update the targets to match it and also teach
autoupgrade.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132976 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-14 04:58:37 +00:00
Rafael Espindola
3a42565ccb Make the threshold used by branch folding softer. Before we would get a
sharp all or nothing transition when one extra predecessor was added. Now
we still test first ones for merging.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132974 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-14 04:41:17 +00:00
Nick Lewycky
3c2f0a11cc Fit banner in 80-col and adjust whitespace. No functionality changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132964 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-14 03:23:52 +00:00