Commit Graph

27392 Commits

Author SHA1 Message Date
Colin LeMahieu
7b9be18636 [Hexagon] Adding xtype parity, min, minu, max, maxu instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223693 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-08 21:19:18 +00:00
Colin LeMahieu
a321bd4f19 [Hexagon] Adding xtype halfword add/sub ll/hl/lh/hh/sat/<<16 instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223692 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-08 20:33:01 +00:00
David Majnemer
8eef439528 ConstantFold: Zero-sized globals might land on top of another global
A zero sized array is zero sized and might share its address with
another global.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223684 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-08 19:35:31 +00:00
Rafael Espindola
7fd7effa37 Lazily link GlobalVariables and GlobalAliases.
We were already lazily linking functions, but all GlobalValues can be treated
uniformly for this.

The test updates are to ensure that a given GlobalValue is still linked in.

This fixes pr21494.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223681 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-08 18:45:16 +00:00
Colin LeMahieu
4772502317 [Hexagon] Adding add/sub with saturation. Removing unused def. Cleaning up shift patterns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223680 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-08 18:33:49 +00:00
David Majnemer
fca9c7b21c InstSimplify: Try to bring back the rest of r223583
This reverts r223624 with a small tweak, hopefully this will make stage3
equivalent.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223679 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-08 18:30:43 +00:00
Bruno Cardoso Lopes
43edafcc07 [CompactUnwind] Fix register encoding logic
Fix a compact unwind encoding logic bug which would try to encode
more callee saved registers than it should, leading to early bail out
in the encoding logic and abusive use of DWARF frame mode unnecessarily.

Also remove no-compact-unwind.ll which was testing the wrong thing
based on this bug and move it to valid 'compact unwind' tests. Added
other few more tests too.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223676 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-08 18:18:32 +00:00
Rafael Espindola
dcc44c64c1 Don't crash when the key of a comdat is lazily linked.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223673 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-08 18:05:48 +00:00
Justin Bogner
70b0751080 InstrProf: An intrinsic and lowering for instrumentation based profiling
Introduce the ``llvm.instrprof_increment`` intrinsic and the
``-instrprof`` pass. These provide the infrastructure for writing
counters for profiling, as in clang's ``-fprofile-instr-generate``.

The implementation of the instrprof pass is ported directly out of the
CodeGenPGO classes in clang, and with the followup in clang that rips
that code out to use these new intrinsics this ends up being NFC.

Doing the instrumentation this way opens some doors in terms of
improving the counter performance. For example, this will make it
simple to experiment with alternate lowering strategies, and allows us
to try handling profiling specially in some optimizations if we want
to.

Finally, this drastically simplifies the frontend and puts all of the
lowering logic in one place.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223672 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-08 18:02:35 +00:00
Tim Northover
811474b929 AArch64: treat HFAs containing "half" types as blocks too.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223669 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-08 17:54:58 +00:00
Andrea Di Biagio
eafdf26d89 [X86] Improved tablegen patters for matching TZCNT/LZCNT.
Teach ISel how to match a TZCNT/LZCNT from a conditional move if the
condition code is X86_COND_NE.
Existing tablegen patterns only allowed to match TZCNT/LZCNT from a
X86cond with condition code equal to X86_COND_E. To avoid introducing
extra rules, I added an 'ImmLeaf' definition that checks if the
condition code is COND_E or COND_NE.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223668 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-08 17:47:18 +00:00
Colin LeMahieu
cf2daa3671 [Hexagon] Adding combine reg, reg with predicated forms.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223667 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-08 17:33:06 +00:00
Rafael Espindola
83fbd8dcd2 Simplify the test. NFC.
Since the main file was empty, we can just copy the content of the Input file
into it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223666 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-08 17:22:06 +00:00
Rafael Espindola
bc1055c76d Simplify test. NFC.
This is just testing the largest merge mode for comdats. No need to use
hard to read names and fancy types.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223665 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-08 17:02:50 +00:00
Colin LeMahieu
5c7adadf6d [Hexagon] Adding packhl instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223664 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-08 17:01:18 +00:00
Rafael Espindola
e77177b3ae Use CHECK-DAG to reduce the noise in an upcoming patch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223663 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-08 16:46:52 +00:00
Andrea Di Biagio
ae16ff1c42 [X86] Improved lowering of packed v8i16 vector shifts by non-constant count.
Before this patch, the backend sub-optimally expanded the non-constant shift
count of a v8i16 shift into a sequence of two 'movd' plus 'movzwl'.

With this patch the backend checks if the target features sse4.1. If so, then
it lets the shuffle legalizer deal with the expansion of the shift amount.

Example:
;;
define <8 x i16> @test(<8 x i16> %A, <8 x i16> %B) {
  %shamt = shufflevector <8 x i16> %B, <8 x i16> undef, <8 x i32> zeroinitializer
  %shl = shl <8 x i16> %A, %shamt
  ret <8 x i16> %shl
}
;;

Before (with -mattr=+avx):
  vmovd  %xmm1, %eax
  movzwl  %ax, %eax
  vmovd  %eax, %xmm1
  vpsllw  %xmm1, %xmm0, %xmm0
  retq

Now:
  vpxor  %xmm2, %xmm2, %xmm2
  vpblendw  $1, %xmm1, %xmm2, %xmm1
  vpsllw  %xmm1, %xmm0, %xmm0
  retq


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223660 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-08 14:36:51 +00:00
Rafael Espindola
7779b87b25 Fix linking of prologue data.
It would crash when the function was lazy linked.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223656 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-08 13:44:38 +00:00
Sonam Kumari
a585ec7f7f Removal Of Duplicate Test Case from shift.ll file
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223648 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-08 09:40:43 +00:00
NAKAMURA Takumi
e4a5390406 Revert a part of r223583, for now. It seems causing different emission between stage2(gcc-clang) and stage3 clang. Investigating.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223624 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-08 02:07:22 +00:00
Duncan P. N. Exon Smith
47a14eae5a IR: Fix bitcode compatability filenames
As a fixup to r223616, follow the convention of naming the files after
the LLVM release whose bitcode they're maintaining compatability with.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223623 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-08 00:41:39 +00:00
Duncan P. N. Exon Smith
a77df65a84 IR: Add missing tests for function-local metadata
Add assembly and bitcode tests that I neglected to add in r223564 (IR:
Disallow complicated function-local metadata) and r223574 (IR: Disallow
function-local metadata attachments).

Found a couple of bugs:

  - The error message for function-local attachments gave the wrong line
    number -- it indicated the next token (typically on the next line)
    instead of the token that started the attachment.  Fixed.

  - Metadata arguments of the form `!{i32 0, i32 %v}` (or with the
    arguments reversed) fired an assertion in `ValueEnumerator` in LLVM
    v3.5, so I suppose this never really worked.  I suppose this was
    "fixed" by r223564.

(Thanks to dblaikie for pointing out my omission.)

Part of PR21532.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223616 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-07 17:56:16 +00:00
Chandler Carruth
67a6b29f1f [x86] Clean up the SSE1 test to use a slightly different pattern for
matching offsets. I don't expect this to really matter, but its what the
latest incarnation of my script for maintaining these tests happens to
produce, and so its simpler for me if everything matches.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223613 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-07 17:16:00 +00:00
Chandler Carruth
b2c7673442 [x86] Switch a constant selection test to use positive assertions and to
store to real pointers so that its clear that the right code is in fact
being generated.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223612 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-07 17:15:58 +00:00
Chandler Carruth
d4b678fb76 [x86] Cleanup the combining vector shuffle tests a bit by merging
identical checks for different SSE variants into a single block.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223611 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-07 17:15:56 +00:00
Chandler Carruth
48a08feeea [x86] Clean up the shift lowering vector shuffle tests a bit using my
script. Notably this folds all the SSE cases together into a single
FileCheck block. It also adds a vex prefix.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223610 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-07 17:15:53 +00:00
David Majnemer
278bbacd27 ConstantFold: Don't optimize comparisons with weak linkage objects
Consider:
void f() {}
void __attribute__((weak)) g() {}
bool b = &f != &g;

It's possble for g to resolve to f if --defsym=g=f is passed on to the
linker.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223585 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-06 11:58:33 +00:00
David Majnemer
620e8763ec InstSimplify: Optimize away useless unsigned comparisons
Code like X < Y && Y == 0 should always be folded away to false.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223583 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-06 10:51:40 +00:00
Tom Stellard
1ba81462d0 R600/SI: Restore PrivateGlobalPrefix to the default ELF value of ".L"
This was changed in r223323.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223579 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-06 05:34:34 +00:00
Duncan P. N. Exon Smith
09ba28c27c IR: Disallow function-local metadata attachments
Metadata attachments to instructions cannot be function-local.

This is part of PR21532.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223574 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-06 02:29:44 +00:00
Hans Wennborg
d7c9f76cee Add a proper triple to switch-jump-table.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223571 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-06 02:08:16 +00:00
NAKAMURA Takumi
2dd9af9feb llvm/test/CodeGen/X86/switch-jump-table.ll: Add explicit triple. Local labels have a prefix "." for targeting i686-cygming.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223570 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-06 02:03:49 +00:00
Ahmed Bougacha
3b9ac8c7c3 [X86] Refactor PMOV[SZ]Xrm to add missing AVX2 patterns.
Most patterns will go away once the extload legalization changes land.

Differential Revision: http://reviews.llvm.org/D6125


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223567 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-06 01:31:07 +00:00
Hans Wennborg
a421ac689f SelectionDAG switch lowering: Replace unreachable default with most popular case.
This can significantly reduce the size of the switch, allowing for more
efficient lowering.

I also worked with the idea of exploiting unreachable defaults by
omitting the range check for jump tables, but always ended up with a
non-neglible binary size increase. It might be worth looking into some more.

SimplifyCFG currently does this transformation, but I'm working towards changing
that so we can optimize harder based on unreachable defaults.

Differential Revision: http://reviews.llvm.org/D6510

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223566 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-06 01:28:50 +00:00
Duncan P. N. Exon Smith
30596886ed IR: Disallow complicated function-local metadata
Disallow complex types of function-local metadata.  The only valid
function-local metadata is an `MDNode` whose sole argument is a
non-metadata function-local value.

Part of PR21532.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223564 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-06 01:26:49 +00:00
Peter Collingbourne
a1d9932027 Add target triples to all dfsan tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223536 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-05 22:32:30 +00:00
Kuba Brecka
0a12d8211e Recommit of r223513 and r223514.
Reviewed at http://reviews.llvm.org/D6488



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223532 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-05 22:19:18 +00:00
Colin LeMahieu
ec51bc6f3a [Hexagon] Adding sub/and/or reg, imm forms
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223522 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-05 21:38:29 +00:00
Sanjay Patel
ab4ad4f98e Optimize merging of scalar loads for 32-byte vectors [X86, AVX]
Fix the poor codegen seen in PR21710 ( http://llvm.org/bugs/show_bug.cgi?id=21710 ).
Before we crack 32-byte build vectors into smaller chunks (and then subsequently
glue them back together), we should look for the easy case where we can just load
all elements in a single op.

An example of the codegen change is:

From:

vmovss  16(%rdi), %xmm1
vmovups (%rdi), %xmm0
vinsertps       $16, 20(%rdi), %xmm1, %xmm1
vinsertps       $32, 24(%rdi), %xmm1, %xmm1
vinsertps       $48, 28(%rdi), %xmm1, %xmm1
vinsertf128     $1, %xmm1, %ymm0, %ymm0
retq

To:

vmovups (%rdi), %ymm0
retq

Differential Revision: http://reviews.llvm.org/D6536



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223518 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-05 21:28:14 +00:00
Colin LeMahieu
5db47f1376 [Hexagon] Updating mux_ir/ri/ii/rr with encoding bits
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223515 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-05 21:09:27 +00:00
Jan Wen Voung
a44126f432 Use 32-bit ebp for NaCl64 in a limited case: llvm.frameaddress.
Summary:
Follow up to [x32] "Use ebp/esp as frame and stack pointer":
http://reviews.llvm.org/D4617

In that earlier patch, NaCl64 was made to always use rbp.
That's needed for most cases because rbp should hold a full
64-bit address within the NaCl sandbox so that load/stores
off of rbp don't require sandbox adjustment (zeroing the top
32-bits, then filling those by adding r15).

However, llvm.frameaddress returns a pointer and pointers
are 32-bit for NaCl64. In this case, use ebp instead, which
will make the register copy type check. A similar mechanism
may be needed for llvm.eh.return, but is not added in this change.

Test Plan: test/CodeGen/X86/frameaddr.ll

Reviewers: dschuff, nadav

Subscribers: jfb, llvm-commits

Differential Revision: http://reviews.llvm.org/D6514

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223510 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-05 20:55:53 +00:00
Bill Seurer
8dcc5c0996 [PowerPC]Update Power VSX test cases to also test fast-isel
Update of some of the VSX test cases for Power to check fast-isel codegen as well as the regular codegen.

http://reviews.llvm.org/D6357


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223509 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-05 20:32:05 +00:00
Colin LeMahieu
4fda99f866 [Hexagon] Adding tfrih/l instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223506 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-05 20:07:19 +00:00
Andrea Di Biagio
6a9a49d7ab [X86] Improved lowering of packed vector shifts to vpsllq/vpsrlq.
SSE2/AVX non-constant packed shift instructions only use the lower 64-bit of
the shift count. 

This patch teaches function 'getTargetVShiftNode' how to deal with shifts
where the shift count node is of type MVT::i64.

Before this patch, function 'getTargetVShiftNode' only knew how to deal with
shift count nodes of type MVT::i32. This forced the backend to wrongly
truncate the shift count to MVT::i32, and then zero-extend it back to MVT::i64.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223505 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-05 20:02:22 +00:00
Colin LeMahieu
189606dbfe [Hexagon] Adding add reg, imm form with encoding bits and test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223504 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-05 19:51:23 +00:00
Duncan P. N. Exon Smith
1a283409bc BFI: Saturate when combining edges to a successor
When a loop gets bundled up, its outgoing edges are quite large, and can
just barely overflow 64-bits.  If one successor has multiple incoming
edges -- and that successor is getting all the incoming mass --
combining just its edges can overflow.  Handle that by saturating rather
than asserting.

This fixes PR21622.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223500 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-05 19:13:42 +00:00
Colin LeMahieu
78ec9010c5 [Hexagon] Adding DoubleRegs decoder. Moving C2_mux and A2_nop. Adding combine imm-imm form.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223494 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-05 18:24:06 +00:00
Adrian Prantl
33ada85735 Fix a bug when pretty-printing DW_OP_deref.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223493 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-05 18:19:38 +00:00
Adrian Prantl
bb3e8dc693 Regenerate this stale testcase from source.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223492 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-05 18:19:32 +00:00
Colin LeMahieu
0785bdf107 [Hexagon] Adding combine reg-reg forms.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223485 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-05 17:38:36 +00:00