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Author SHA1 Message Date
Craig Topper
2713d045e3 Remove code to enable execution dependency fix pass on VR256. VR128 is sufficient after r144636. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144777 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-11-16 05:02:04 +00:00
Evan Cheng
0a405ae78a Revert r144568 now that r144730 has fixed the fast-isel kill marker bug. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144776 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-11-16 04:55:01 +00:00
Nick Lewycky
f8f558d9e1 Fix typo in test. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144774 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-11-16 03:56:38 +00:00
Nick Lewycky
ae10dd2859 Merge isObjectPointerWithTrustworthySize with getPointerSize. Use it when 
looking at the size of the pointee. Fixes PR11390!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144773 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-11-16 03:49:48 +00:00
Evan Cheng
9bad88a9de If the 2addr instruction has other kills, don't move it below any other uses since we don't want to extend other live ranges. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144772 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-11-16 03:47:42 +00:00
Evan Cheng
2bee6a8bb7 RescheduleKillAboveMI() must backtrack to before the rescheduled DBG_VALUE instructions. rdar://10451185 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144771 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-11-16 03:33:08 +00:00
Evan Cheng
ae7db7af44 Process all uses first before defs to accurately capture register liveness. rdar://10449480 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144770 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-11-16 03:05:12 +00:00
Eli Friedman
ee94dc212e Fix testcase. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144769 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-11-16 03:03:52 +00:00
Eli Friedman
d577df8e5a CONCAT_VECTORS can have more than two operands. PR11389. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144768 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-11-16 02:52:39 +00:00
Eli Friedman
b91b6001a6 Add a couple asserts so it will be easier to debug if we accidentally pass indexed loads/stores to the legalizer. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144767 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-11-16 02:43:15 +00:00
Michael J. Spencer
a9a4f5eda8 Remove extra ,. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144759 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-11-16 01:36:50 +00:00
Kostya Serebryany
800e03f598 AddressSanitizer, first commit (compiler module only) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144758 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-11-16 01:35:23 +00:00
Michael J. Spencer
8a2549febc Object/Archive: Give Child a operator < for map. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144757 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-11-16 01:25:13 +00:00
Michael J. Spencer
dc296639d9 Support/COFF: Add structs and enums from the standard for image files. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144756 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-11-16 01:24:57 +00:00
Michael J. Spencer
f81285c0c5 llvm-objdump: Ignore non-objects in archives. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144755 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-11-16 01:24:41 +00:00
Kostya Serebryany
a2a2d1fddd test commit to verify that commit access works (added blank line) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144748 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-11-16 01:14:38 +00:00
Owen Anderson
99aa14ff64 Rename MVT::untyped to MVT::Untyped to match similar nomenclature. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144747 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-11-16 01:02:57 +00:00
Andrew Trick
79f0bfcc20 Fix SCEV overly optimistic back edge taken count for multi-exit loops. 
Fixes PR11375: Different results for 'clang++ huh.cpp'...


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144746 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-11-16 00:52:40 +00:00
Chad Rosier
f56c60b571 Add FIXME comment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144743 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-11-16 00:32:20 +00:00
Jakob Stoklund Olesen
3805d85e38 Enable -widen-vmovs by default. 
This will widen 32-bit register vmov instructions to 64-bit when
possible.  The 64-bit vmovd instructions can then be translated to NEON
vorr instructions by the execution dependency fix pass.

The copies are only widened if they are marked as clobbering the whole
D-register.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144734 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-11-15 23:53:18 +00:00
Eric Christopher
8368f74c43 Stabilize the output of the dwarf accelerator tables. Fixes a comparison 
failure during bootstrap with it turned on.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144731 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-11-15 23:37:17 +00:00
Chad Rosier
22b34cce4d GEPs with all zero indices are trivially coalesced by fast-isel. For example, 
%arrayidx135 = getelementptr inbounds [4 x [4 x [4 x [4 x i32]]]]* %M0, i32 0, i64 0
%arrayidx136 = getelementptr inbounds [4 x [4 x [4 x i32]]]* %arrayidx135, i32 0, i64 %idxprom134

Prior to this commit, the GEP instruction that defines %arrayidx136 thought that 
%arrayidx135 was a trivial kill.  The GEP that defines %arrayidx135 doesn't 
generate any code and thus %M0 gets folded into the second GEP.  Thus, we need
to look through GEPs with all zero indices.
rdar://10443319

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144730 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-11-15 23:34:05 +00:00
Jim Grosbach
e43862b6a6 ARM assembly parsing for register range syntax for VLD/VST register lists. 
For example,
vld1.f64 {d2-d5}, [r2,:128]!

Should be equivalent to:
vld1.f64 {d2,d3,d4,d5}, [r2,:128]!

It's not documented syntax in the ARM ARM, but it is consistent with what's
accepted for VLDM/VSTM and is unambiguous in meaning, so it's a good thing to
support.

rdar://10451128


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144727 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-11-15 23:19:15 +00:00
Devang Patel
6ac5b165d4 Merge ObjCPropertyDebugInfo.html into SourceLevelDebugging.html 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144724 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-11-15 22:59:54 +00:00
Jim Grosbach
5b2fb2083c ARM assembly parsing for data type suffices on NEON VMOV aliases. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144722 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-11-15 22:54:42 +00:00
Nadav Rotem
de631128d6 Fix MSVC warnings by adding a cast. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144721 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-11-15 22:54:21 +00:00
Nadav Rotem
f8c10e5cb1 AVX: Add support for vbroadcast from BUILD_VECTOR and refactor some of the vbroadcast code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144720 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-11-15 22:50:37 +00:00
Chris Lattner
62f009af41 jakob fixed X87 inline asm! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144719 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-11-15 22:48:24 +00:00
Chris Lattner
2fdd005d97 add ImmutableSet/Map dox, patch by Caitlin Sadowski! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144716 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-11-15 22:40:14 +00:00
NAKAMURA Takumi
ec0af2f4e1 test/CodeGen/X86/dec-eflags-lower.ll: Relax expression for win32 x64. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144714 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-11-15 22:30:37 +00:00
Jim Grosbach
9f302c4fb3 ARM assembly parsing two operand forms for shift instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144713 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-11-15 22:27:54 +00:00
Chris Lattner
7b95c38813 add PTX backend info 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144711 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-11-15 22:23:46 +00:00
Jim Grosbach
88d012a9c3 ARM VFP assembly parsing for VADD and VSUB two-operand forms. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144710 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-11-15 22:15:10 +00:00
Jim Grosbach
6cb4b08182 ARM accept an immediate offset in memory operands w/o the '#'. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144709 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-11-15 22:14:41 +00:00
Chris Lattner
dec23b679e some notes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144708 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-11-15 22:13:27 +00:00
Pete Cooper
2d49689793 Added custom lowering for load->dec->store sequence in x86 when the EFLAGS registers is used 
by later instructions.

Only done for DEC64m right now.

Fixes <rdar://problem/6172640>


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144705 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-11-15 21:57:53 +00:00
Jim Grosbach
5c984e451d ARM enclosing curly braces optional on one-register VLD/VST instruction lists. 
'vld1.f32 d4, [r7]' should be parsed as equivalent to 'vld1.f32 {d4}, [r7]'

rdar://10450488.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144701 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-11-15 21:45:55 +00:00
Akira Hatanaka
5381cbf4f4 Update section "MIPS Target Improvements" in the llvm 3.0 release notes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144699 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-11-15 21:33:05 +00:00
Jim Grosbach
eaf2056709 ARM size suffix on VFP single-precision 'vmov' is optional. 
rdar://10435114

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144698 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-11-15 21:18:35 +00:00
Devang Patel
d2df64f569 Insert modified DBG_VALUE into LiveDbgValueMap. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144696 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-11-15 21:03:58 +00:00
Jim Grosbach
25e0a87e91 Fix typo. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144695 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-11-15 21:01:30 +00:00
Jim Grosbach
19885de61d ARM alternate size suffices for VTRN instructions. 
rdar://10435076

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144694 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-11-15 20:49:46 +00:00
Owen Anderson
22925d93e9 Fix a misplaced paren bug. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144692 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-11-15 20:30:41 +00:00
Jim Grosbach
a68e90c36e ARM assembly parsing for optional datatype suffix on VFP VMOV GPR<->VFP insns. 
Yet more of rdar://10435076.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144691 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-11-15 20:29:42 +00:00
Jim Grosbach
bfb0a1717b ARM assembly parsing for two-operand form of 'mul' instruction. 
rdar://10449856.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144689 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-11-15 20:14:51 +00:00
Jim Grosbach
d2586daf06 ARM assembly parsing for two-operand form of 'mul' instruction. 
Ongoing rdar://10435114.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144688 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-11-15 20:02:06 +00:00
Jim Grosbach
908f923cfc Testcase for r144684. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144685 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-11-15 19:56:17 +00:00
Jim Grosbach
7f1ec9570d Thumb2 two-operand 'mul' instruction wide encoding parsing. 
rdar://10449724

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144684 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-11-15 19:55:16 +00:00
Owen Anderson
b589be9334 Fix an ambiguous decoding where we failed to properly decode VMOVv2f32 and VMOVv4f32. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144683 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-11-15 19:55:00 +00:00
Jim Grosbach
1de0bd1945 Thumb2 assembly parsing for mul.w in IT block fix. 
When the 3rd operand is not a low-register, and the first two operands are
the same low register, the parser was incorrectly trying to use the 16-bit
instruction encoding.

rdar://10449281

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144679 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-11-15 19:29:45 +00:00