Commit Graph

69604 Commits

Author SHA1 Message Date
Andrew Trick
f697c8a19a Support for precise scheduling of the instruction selection DAG,
disabled in this checkin. Sorry for the large diffs due to
refactoring. New functionality is all guarded by EnableSchedCycles.

Scheduling the isel DAG is inherently imprecise, but we give it a best
effort:
- Added MayReduceRegPressure to allow stalled nodes in the queue only
  if there is a regpressure need.
- Added BUHasStall to allow checking for either dependence stalls due to
  latency or resource stalls due to pipeline hazards.
- Added BUCompareLatency to encapsulate and standardize the heuristics
  for minimizing stall cycles (vs. reducing register pressure).
- Modified the bottom-up heuristic (now in BUCompareLatency) to
  prioritize nodes by their depth rather than height. As long as it
  doesn't stall, height is irrelevant. Depth represents the critical
  path to the DAG root.
- Added hybrid_ls_rr_sort::isReady to filter stalled nodes before
  adding them to the available queue.

Related Cleanup: most of the register reduction routines do not need
to be templates.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123468 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-14 21:11:41 +00:00
Chris Lattner
d0f56132cf switch SRoA to use LoadAndStorePromoter instead of its own copy of the code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123457 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-14 19:50:47 +00:00
Chris Lattner
a2d845a3ff Add a new LoadAndStorePromoter class, which implements the general
"promote a bunch of load and stores" logic, allowing the code to
be shared and reused.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123456 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-14 19:36:13 +00:00
Jay Foad
f18e4c3ab4 OperandTraits<>::Layout isn't used for anything. Remove it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123452 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-14 18:41:56 +00:00
Rafael Espindola
04b9a4331c Update llvm-gcc's tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123447 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-14 17:01:20 +00:00
Oscar Fuentes
da7e2870eb Reorder macros on config.h.cmake to easily compare it against
config.h.in.

Patch by arrowdodger!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123445 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-14 16:41:03 +00:00
Devang Patel
3f84a4537d Disable debug mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123443 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-14 15:55:50 +00:00
Duncan Sands
c087e20331 Turn X-(X-Y) into Y. According to my auto-simplifier this is the most common
simplification present in fully optimized code (I think instcombine fails to
transform some of these when "X-Y" has more than one use).  Fires here and
there all over the test-suite, for example it eliminates 8 subtractions in
the final IR for 445.gobmk, 2 subs in 447.dealII, 2 in paq8p etc.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123442 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-14 15:26:10 +00:00
Duncan Sands
cf80bc1d4a Factorize common code out of the InstructionSimplify shift logic. Add in
threading of shifts over selects and phis while there.  This fires here and
there in the testsuite, to not much effect.  For example when compiling spirit
it fires 5 times, during early-cse, resulting in 6 more cse simplifications,
and 3 more terminators being folded by jump threading, but the final bitcode
doesn't change in any interesting way: other optimizations would have caught
the opportunity anyway, only later.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123441 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-14 14:44:12 +00:00
Duncan Sands
62becca681 Rename this test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123440 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-14 14:16:33 +00:00
Chris Lattner
998ef4a92d switch the second scalarrepl pass to use SSAUpdater. We run two scalarrepl passes: one
early in the cleanup code and one late interlaced with the inliner.  The second one is
important because inlining and other scalar optzns can unpin allocas, allowing them to 
be split up and promoted.  While important for performance, this is also relatively
rare, and we would previously force a (non-lazy) computation of DomFrontiers, which 
happened even if nothing became unpinned.

With this patch, the first pass of scalarrepl still promotes the vast bulk of allocas
in programs, but hte second pass has changed to use SSAUpdater, which is more "sparse"
and lazy.  This speeds up opt -O3 time on kimwitu++ (a c++ app) by about 1%.  The
numbers are interesting: the first pass promotes ~17500 allocas.  The second pass
promotes about 1600.  For non-C++ codes, the compile time win should be greater, 
because the second pass of scalarrepl does less.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123437 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-14 08:21:08 +00:00
Chris Lattner
b352d6eb49 split SROA into two passes: one that uses DomFrontiers (-scalarrepl)
and one that uses SSAUpdater (-scalarrepl-ssa)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123436 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-14 08:13:00 +00:00
Jay Foad
25052d8d64 Remove casts between Value** and Constant**, which won't work if a
static_cast from Constant* to Value* has to adjust the "this" pointer.
This is groundwork for PR889.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123435 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-14 08:07:43 +00:00
Chris Lattner
e0a1a5ba91 Implement full support for promoting allocas to registers using SSAUpdater
instead of DomTree/DomFrontier.  This may be interesting for reducing compile 
time.  This is currently disabled, but seems to work just fine.

When this is enabled, we eliminate two runs of dominator frontier, one in the
"early per-function" optimizations and one in the "interlaced with inliner"
function passes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123434 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-14 07:50:47 +00:00
Chris Lattner
bdb6b7f9c7 relax testcase a bit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123433 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-14 07:46:33 +00:00
Jakob Stoklund Olesen
04223909b7 Try for the third time to teach getFirstTerminator() about debug values.
This time let's rephrase to trick gcc-4.3 into not miscompiling.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123432 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-14 06:33:45 +00:00
Chris Lattner
d357e88740 revert my fastisel patch again which apparently still gives the
llvm-gcc-i386-linux-selfhost buildbot heartburn...


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123431 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-14 06:14:33 +00:00
Chris Lattner
9e27cc8049 reapply r123414 now that the botz are calmed down and the fix is already in.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123427 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-14 04:24:28 +00:00
Chris Lattner
70e5e222db indentation
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123426 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-14 04:23:53 +00:00
Evan Cheng
f3eb3bba16 Completed :lower16: / :upper16: support for movw / movt pairs on Darwin.
- Fixed :upper16: fix up routine. It should be shifting down the top 16 bits first.
- Added support for Thumb2 :lower16: and :upper16: fix up.
- Added :upper16: and :lower16: relocation support to mach-o object writer.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123424 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-14 02:38:49 +00:00
Jakob Stoklund Olesen
b6436e5be1 Revert r123419. It still breaks llvm-gcc-i386-linux-selfhost.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123423 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-14 02:12:54 +00:00
Chris Lattner
a899d1c264 r123414 broke llvm-gcc bootstrap apparently, revert
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123422 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-14 02:07:32 +00:00
Chris Lattner
67d9891690 Set the insertion point correctly for instructions generated by load folding:
they should go *before* the new instruction not after it. 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123420 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-14 01:33:40 +00:00
Jakob Stoklund Olesen
09befe9036 Try again to teach getFirstTerminator() about debug values.
Fix some callers to better deal with debug values.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123419 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-14 01:17:53 +00:00
Owen Anderson
c5f608b49c Rather than doing early instcombine, try doing early CSE instead. This should still handle
most important simplifications, as well as resolving phase ordering issues where instcombine
would inhibit important CSE'ing opportunities, for instance on BitBench/drop3.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123418 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-14 00:41:11 +00:00
Duncan Sands
c43cee3fbb Move some shift transforms out of instcombine and into InstructionSimplify.
While there, I noticed that the transform "undef >>a X -> undef" was wrong.
For example if X is 2 then the top two bits must be equal, so the result can
not be anything.  I fixed this in the constant folder as well.  Also, I made
the transform for "X << undef" stronger: it now folds to undef always, even
though X might be zero.  This is in accordance with the LangRef, but I must
admit that it is fairly aggressive.  Also, I added "i32 X << 32 -> undef"
following the LangRef and the constant folder, likewise fairly aggressive.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123417 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-14 00:37:45 +00:00
Owen Anderson
68a659d423 Don't bother conditionalizing the use of SROA in -O1 mode. We're already running it unconditionally
later in the pipeline.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123416 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-14 00:36:40 +00:00
Chris Lattner
d754041493 fix PR8961 - a fast isel miscompilation where we'd insert a new instruction
after sext's generated for addressing that got folded.  Previously we compiled
test5 into:

_test5:                                 ## @test5
## BB#0:
        movq    -8(%rsp), %rax          ## 8-byte Reload
        movq    (%rdi,%rax), %rdi
        addq    %rdx, %rdi
        movslq  %esi, %rax
        movq    %rax, -8(%rsp)          ## 8-byte Spill
        movq    %rdi, %rax
        ret

which is insane and wrong.  Now we produce:

_test5:                                 ## @test5
## BB#0:
	movslq	%esi, %rax
	movq	(%rdi,%rax), %rax
	addq	%rdx, %rax
	ret



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123414 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-14 00:01:01 +00:00
Jakob Stoklund Olesen
eea666f216 Better terminator avoidance.
This approach also works when the terminator doesn't have a slot index. (Which
can happen??)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123413 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-13 23:35:53 +00:00
Evan Cheng
8fbbd1c03d Add comment about Thumb2 fixup comments being completely bogus.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123411 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-13 23:27:39 +00:00
Tobias Grosser
21d842c353 Add single entry / single exit accessors.
Add methods for accessing the (single) entry / exit edge of a region. If no such
edge exists, null is returned.  Both accessors return the start block of the
corresponding edge. The edge can finally be formed by utilizing
Region::getEntry() or Region::getExit();

Contributed by: Andreas Simbuerger <simbuerg@fim.uni-passau.de>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123410 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-13 23:18:04 +00:00
Owen Anderson
0c9f250d54 Recognize alternative register names like ip -> r12.
Fixes <rdar://problem/8857982>.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123409 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-13 22:50:36 +00:00
Jakob Stoklund Olesen
f7ca976e74 Fix a few more places that should use MBB::getLastNonDebugInstr().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123408 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-13 22:47:43 +00:00
Owen Anderson
0fba714359 As far as I can tell, unified syntax uses c0-c15 instead of cr0-cr15 for mcr and friends.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123407 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-13 22:38:16 +00:00
Chris Lattner
4c5456a56f typo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123406 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-13 22:11:56 +00:00
Chris Lattner
4cd18f98f7 memcpy + metadata = bliss :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123405 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-13 22:08:15 +00:00
Owen Anderson
e4e5e2aae7 Add support to the ARM MC infrastructure to support mcr and friends. This requires supporting
the symbolic immediate names used for these instructions, fixing their pretty-printers, and
adding proper encoding information for them.

With this, we can properly pretty-print and encode assembly like:
	mrc p15, #0, r3, c13, c0, #3

Fixes <rdar://problem/8857858>.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123404 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-13 21:46:02 +00:00
Evan Cheng
82caf1a867 Relax an assertion. On archs like ARM, an immediate field may be scattered. So it's possible for some bits of every 8 bits to be encoded already, and the rest still needs to be fixed up.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123403 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-13 21:45:26 +00:00
Jakob Stoklund Olesen
a6ada9f725 Temporary workaround for an i386 crash in LiveDebugVariables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123400 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-13 21:28:55 +00:00
Jakob Stoklund Olesen
4f28c1c714 Teach frame lowering to ignore debug values after the terminators.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123399 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-13 21:28:52 +00:00
Bob Wilson
422578547e Tidy comments, indentation, and 80-column violations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123397 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-13 21:10:12 +00:00
Bob Wilson
6974302e3f Fix whitespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123396 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-13 20:59:44 +00:00
Kevin Enderby
67b212e03b Fix ARMAsmParser::ParseOperand() to allow it to parse . as a branch target and
directional local labels like 1f and 2b.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123393 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-13 20:32:36 +00:00
Devang Patel
bc8d5f11e7 Little help to debug the bugpoint itself.
Patch by Bob Wilson.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123390 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-13 19:48:54 +00:00
Devang Patel
a851fd8cd8 Speculatively revert r123384 to make llvm-gcc-i386-linux-selfhost buildbot happy.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123389 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-13 19:27:50 +00:00
Oscar Fuentes
006bfeba06 Add some platform tests.
Patch by arrowdodger!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123388 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-13 19:17:28 +00:00
Jim Grosbach
5f3e2be7c9 When updating a tSpill/tRestore instruction to be a tSTRr/tLDRr, correctly
set up the source operands. The original instr has an immediate operand that
should be replaced with the frame reg operand rather than just adding the
reg operand. Previously, the instruction ended up with too many operands
causing an assert() when adding the default predicate. rdar://8825456

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123387 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-13 19:16:48 +00:00
Jakob Stoklund Olesen
64f865ceca Teach MachineBasicBlock::getFirstTerminator to ignore debug values.
It will still return an iterator that points to the first terminator or end(),
but there may be DBG_VALUE instructions following the first terminator.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123384 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-13 18:41:05 +00:00
Bob Wilson
f0908aeade Check for empty structs, and for consistency, zero-element arrays.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123383 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-13 18:26:59 +00:00
Bob Wilson
704d1347c5 Extend SROA to handle arrays accessed as homogeneous structs and vice versa.
This is a minor extension of SROA to handle a special case that is
important for some ARM NEON operations.  Some of the NEON intrinsics
return multiple values, which are handled as struct types containing
multiple elements of the same vector type.  The corresponding return
types declared in the arm_neon.h header have equivalent arrays.  We
need SROA to recognize that it can split up those arrays and structs
into separate vectors, even though they are not always accessed with
the same type.  SROA already handles loads and stores of an entire
alloca by using insertvalue/extractvalue to access the individual
pieces, and that code works the same regardless of whether the type
is a struct or an array.  So, all that needs to be done is to check
for compatible arrays and homogeneous structs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123381 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-13 17:45:11 +00:00