Also, have tools output -help-hidden rather than refer to --help-hidden,
for consistency, and likewise adjust documentation. This doesn't change
every mention of --help, only those which seemed clearly safe.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96578 91177308-0d34-0410-b5e6-96231b3b80d8
since it has no pattern, there's not much point in distinguishing an "N2VS"
class for intrinsics anyway.
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* Use "S" abbreviation for scalar single FP registers in class and pattern
names, instead of keeping the "D" (for "double") abbreviation and tacking on
an "s" elsewhere in the name.
* Move the scalar single FP register classes and patterns to be more
consistent with other definitions in the file.
* Rename "VNEGf32d" definition to "VNEGfd" for consistency.
* Deleted the N2VDIntsPat pattern; N2VSPat is good enough.
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B6.1.8 RFE Return From Exception loads the PC and the CPSR from the word at the
specified address and the following word respectively.
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Renamed PIC16FrameOverlay namespace to PIC16OVERLAY.
Renamed PIC16FrameOverlay class to PIC16Overlay.
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case where there are loop-invariant instructions somehow left
inside the loop, and in a position where they won't dominate
the IV increment position.
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It's not clear why this is really required, but it was explicitly
added in r48808 with no real explanation or rdar #.
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This pass is supposed to be run on the linked .bc module.
It traveses the module call graph twice. Once starting from the main function
and marking each reached function as "ML". Again, starting from the ISR
and cloning any reachable function that was marked as "ML". After cloning
the function, it remaps all the call sites in IL functions to call the
cloned functions.
Currently only marking is being done.
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into a roundss intrinsic, producing a cyclic dag. The root cause
of this is badness handling ComplexPattern nodes in the old dagisel
that I noticed through inspection. Eliminate a copy of the of the
code that handled ComplexPatterns by making EmitChildMatchCode call
into EmitMatchCode.
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If there exists a use of a build_vector that's the bitwise complement of the mask,
then transform the node to
(and (xor x, (build_vector -1,-1,-1,-1)), (build_vector ~c1,~c2,~c3,~c4)).
Since this transformation is only useful when 1) the given build_vector will
become a load from constpool, and 2) (and (xor x -1), y) matches to a single
instruction, I decided this is appropriate as a x86 specific transformation.
rdar://7323335
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non-temporal. Fix from r96241 for botched encoding of MOVNTDQ.
Add documentation for !nontemporal metadata.
Add a simpler movnt testcase.
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to have the predicate on the pattern itself instead. Support for the new
ISel. Remove definitions of CarryDefIsUnused and CarryDefIsUsed since they are
no longer used anywhere.
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