Commit Graph

161 Commits

Author SHA1 Message Date
Chris Lattner
8048ebe91d the latest assembler that runs on powerpc 10.4 machines doesn't
support aligned comm.  Detect when compiling for 10.4 and don't
emit an alignment for comm.  THis will hopefully fix PR8198.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114817 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-27 06:44:54 +00:00
Evan Cheng
3ef1c8759a Teach if-converter to be more careful with predicating instructions that would
take multiple cycles to decode.
For the current if-converter clients (actually only ARM), the instructions that
are predicated on false are not nops. They would still take machine cycles to
decode. Micro-coded instructions such as LDM / STM can potentially take multiple
cycles to decode. If-converter should take treat them as non-micro-coded
simple instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113570 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-10 01:29:16 +00:00
Anton Korobeynikov
8c64b9766e Add hook to insert late LLVM=>LLVM passes just before isel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109354 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-24 20:48:54 +00:00
Evan Cheng
70017e44cd Add an ILP scheduler. This is a register pressure aware scheduler that's
appropriate for targets without detailed instruction iterineries.
The scheduler schedules for increased instruction level parallelism in
low register pressure situation; it schedules to reduce register pressure
when the register pressure becomes high.

On x86_64, this is a win for all tests in CFP2000. It also sped up 256.bzip2
by 16%.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109300 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-24 00:39:05 +00:00
Eric Christopher
ed2b84087f Warnings patrol.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109174 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-22 21:51:30 +00:00
Reid Kleckner
c96a82a534 Initial modifications to MCAssembler and TargetMachine for the MCJIT.
Patch by Olivier Meurant!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109080 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-22 05:58:53 +00:00
Daniel Dunbar
cb8326dc09 MC: Add TargetMachine support for setting the value of MCRelaxAll with
-filetype=obj.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104747 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-26 21:48:55 +00:00
Evan Cheng
1cc3984148 Allow targets more controls on what nodes are scheduled by reg pressure, what for latency in hybrid mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104293 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-20 23:26:43 +00:00
Evan Cheng
15a16def6e Add a hybrid bottom up scheduler that reduce register usage while avoiding
pipeline stall. It's useful for targets like ARM cortex-a8. NEON has a lot
of long latency instructions so a strict register pressure reduction
scheduler does not work well.
Early experiments show this speeds up some NEON loops by over 30%.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104216 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-20 06:13:19 +00:00
Evan Cheng
211ffa1351 Code refactoring: pull SchedPreference enum from TargetLowering.h to TargetMachine.h and put it in its own namespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104147 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-19 20:19:50 +00:00
Dan Gohman
99dca4fde7 Remove the "WantsWholeFile" concept, as it's no longer needed. CBE
and the others use the regular addPassesToEmitFile hook now, and
llc no longer needs a bunch of redundant code to handle the
whole-file case.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103492 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-11 19:57:55 +00:00
Dan Gohman
d858e90f03 Use const qualifiers with TargetLowering. This eliminates several
const_casts, and it reinforces the design of the Target classes being
immutable.

SelectionDAGISel::IsLegalToFold is now a static member function, because
PIC16 uses it in an unconventional way. There is more room for API
cleanup here.

And PIC16's AsmPrinter no longer uses TargetLowering.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101635 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-17 15:26:15 +00:00
Dan Gohman
abf0c3475a Add a getSelectionDAGInfo member to TargetMachine.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101567 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-16 23:09:10 +00:00
Chris Lattner
43ac721e3b add llvm codegen support for -ffunction-sections and -fdata-sections,
patch by Sylvere Teissier!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101106 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-13 00:36:43 +00:00
Anton Korobeynikov
4b38debf59 Remove late ARM codegen optimization pass committed by accident.
It is not ready for public yet.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100673 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-07 18:23:27 +00:00
Anton Korobeynikov
977dfcefa1 Add hook to insert late LLVM=>LLVM passes just before isel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100640 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-07 18:18:42 +00:00
Eric Christopher
1f2ae40efd Fix unused parameter warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99463 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-25 00:59:51 +00:00
Chris Lattner
11d53c129f rearrange MCContext ownership. Before LLVMTargetMachine created it
and passing off ownership to AsmPrinter.  Now MachineModuleInfo
creates it and owns it by value.  This allows us to use MCSymbols
more consistently throughout the rest of the code generator, and
simplifies a bit of code.  This also allows MachineFunction to 
keep an MCContext reference handy, and cleans up the TargetRegistry
interfaces for AsmPrinters.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98450 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-13 20:55:24 +00:00
Daniel Dunbar
1f3e445184 MC: Provide MCAssembler with a TargetAsmBackend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98222 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-11 01:34:27 +00:00
Dan Gohman
8772f5041c Add a flag to addPassesToEmit* to disable the Verifier pass run
after LSR, so that clients can opt in.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97357 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-28 00:41:59 +00:00
Eric Christopher
49cf3a7173 Fix a few unused parameter warnings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96533 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-17 23:55:26 +00:00
Anton Korobeynikov
9184b25fa5 Preliminary patch to improve dwarf EH generation - Hooks to return Personality / FDE / LSDA / TType encoding depending on target / options (e.g. code model / relocation model) - MCIzation of Dwarf EH printer to use encoding information - Stub generation for ELF target (needed for indirect references) - Some other small changes here and there
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96285 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-15 22:35:59 +00:00
Chris Lattner
5669e30097 change addPassesToEmitFile to return true on failure instead of its input,
add -filetype=null for performance testing and remove -filetype=dynlib,
which isn't planned to be implemented.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95202 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-03 05:55:08 +00:00
Chris Lattner
3813d8adf3 Remove a bunch of stuff around the edges of the ELF writer.
Now the only use of the ELF writer is the JIT, which won't be
easy to fix in the short term. :( :(



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95148 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-02 22:31:11 +00:00
Chris Lattner
f1d6b107d2 eliminate all the dead addSimpleCodeEmitter implementations.
eliminate random "code emitter" stuff in Alpha, except for
the JIT path.  Next up, remove the template cruft.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95131 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-02 21:31:47 +00:00
Chris Lattner
211edae484 eliminate FileModel::Model, just use CodeGenFileType. The client
of the code generator shouldn't care what object format a target
uses.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95124 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-02 21:06:45 +00:00
Chris Lattner
4db361395b remove the remnants of TargetMachOWriterInfo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95114 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-02 19:41:23 +00:00
Chris Lattner
b5c5160a55 eliminate all forms of addPassesToEmitMachineCode except
the one used by the JIT.  Remove all forms of
addPassesToEmitFileFinish except the one used by the static
code generator.  Inline the remaining version of
addPassesToEmitFileFinish into its only caller.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95109 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-02 19:14:27 +00:00
Chris Lattner
0823d2a654 Inline addAssemblyEmitter into its one real caller and delete
the -print-emitted-asm option.  The JIT shouldn't have to pull
in the asmprinter.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95100 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-02 18:44:12 +00:00
Nate Begeman
39bdc78e6f Kill the Mach-O writer, and temporarily make filetype=obj an error.
The MCStreamer based assemblers will take over for this functionality.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95033 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-01 23:56:58 +00:00
Chris Lattner
1548b863ce remove a couple of asserts that use RTTI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94068 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-21 06:11:03 +00:00
Bill Wendling
48814681d7 - Add getLSDAEncoding to the PowerPC backend.
- Greatly improve the comments to the getLSDAEncoding method.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93796 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-18 22:36:35 +00:00
Bill Wendling
a8c18890da - Add a comment to the callback indicating that it's *extremely* not a good
idea, but unfortunately necessary.
- Default to using 4-bytes for the LSDA pointer encoding to agree with the
  encoded value in the CIE.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93753 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-18 19:36:27 +00:00
Bill Wendling
d58e9cb42d Retrying r91337:
The CIE says that the LSDA point in the FDE section is an "sdata4". That's fine,
but we need it to actually be 4-bytes in the FDE for some platforms. Allow
individual platforms to decide for themselves.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93616 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-16 01:40:55 +00:00
Nate Begeman
3fe980b127 Hook up llc's -filetype=obj to use MCStreamer if an MCCodeEmitter is available.
Remove most of old Mach-O Writer support, it has been replaced by MCMachOStreamer

Further refactoring to completely remove MachOWriter and drive the object file
writer with the AsmPrinter MCInst/MCSection logic is forthcoming.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93527 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-15 18:51:18 +00:00
Eric Christopher
f4f43cb501 Fix setting and default setting of code model for jit. Do this
by allowing backends to override routines that will default
the JIT and Static code generation to an appropriate code model
for the architecture.

Should fix PR 5773.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91824 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-21 08:15:29 +00:00
Evan Cheng
bf57b52ba4 Add a CodeGenOpt::Less level to match -O1. It'll be used by clients which do not want post-regalloc scheduling.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84272 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-16 21:02:20 +00:00
Evan Cheng
629adde699 Add a target hook to add pre- post-regalloc scheduling passes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83144 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-30 08:49:50 +00:00
Chris Lattner
af76e592c7 Rename TargetAsmInfo (and its subclasses) to MCAsmInfo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79763 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-22 20:48:53 +00:00
Chris Lattner
a7ac47cee1 Change TargetAsmInfo to be constructed via TargetRegistry from a Target+Triple
pair instead of from a virtual method on TargetMachine.  This cuts the final
ties of TargetAsmInfo to TargetMachine, meaning that MC can now use 
TargetAsmInfo.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78802 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-12 07:22:17 +00:00
Chris Lattner
0a31d2f645 pass the TargetTriple down from each target ctor to the
LLVMTargetMachine ctor.  It is currently unused.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78711 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-11 20:42:37 +00:00
Dan Gohman
892fe182c8 Delete an obsolete sentance from a comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78206 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-05 16:39:42 +00:00
Chris Lattner
05e5fcab09 move an enum from TM -> TargetOptions. This makes TargetOptions.h
be self contained, and it isn't used from TM.h


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77857 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-02 04:08:52 +00:00
Chris Lattner
8f4e22ff9a remove dead forward decl
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76433 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-20 17:23:00 +00:00
Daniel Dunbar
5d77cad60b Lift addAssemblyEmitter into LLVMTargetMachine.
- No functionality change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75859 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-15 23:34:19 +00:00
Daniel Dunbar
cfe9a605ee Lift DumpAsm / -print-emitted-asm functionality into LLVMTargetMachine.
- No intended functionality change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75848 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-15 22:33:19 +00:00
Daniel Dunbar
51b198af83 Reapply TargetRegistry refactoring commits.
--- Reverse-merging r75799 into '.':
 U   test/Analysis/PointerTracking
U    include/llvm/Target/TargetMachineRegistry.h
U    include/llvm/Target/TargetMachine.h
U    include/llvm/Target/TargetRegistry.h
U    include/llvm/Target/TargetSelect.h
U    tools/lto/LTOCodeGenerator.cpp
U    tools/lto/LTOModule.cpp
U    tools/llc/llc.cpp
U    lib/Target/PowerPC/PPCTargetMachine.h
U    lib/Target/PowerPC/AsmPrinter/PPCAsmPrinter.cpp
U    lib/Target/PowerPC/PPCTargetMachine.cpp
U    lib/Target/PowerPC/PPC.h
U    lib/Target/ARM/ARMTargetMachine.cpp
U    lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp
U    lib/Target/ARM/ARMTargetMachine.h
U    lib/Target/ARM/ARM.h
U    lib/Target/XCore/XCoreTargetMachine.cpp
U    lib/Target/XCore/XCoreTargetMachine.h
U    lib/Target/PIC16/PIC16TargetMachine.cpp
U    lib/Target/PIC16/PIC16TargetMachine.h
U    lib/Target/Alpha/AsmPrinter/AlphaAsmPrinter.cpp
U    lib/Target/Alpha/AlphaTargetMachine.cpp
U    lib/Target/Alpha/AlphaTargetMachine.h
U    lib/Target/X86/X86TargetMachine.h
U    lib/Target/X86/X86.h
U    lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.h
U    lib/Target/X86/AsmPrinter/X86AsmPrinter.cpp
U    lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.h
U    lib/Target/X86/X86TargetMachine.cpp
U    lib/Target/MSP430/MSP430TargetMachine.cpp
U    lib/Target/MSP430/MSP430TargetMachine.h
U    lib/Target/CppBackend/CPPTargetMachine.h
U    lib/Target/CppBackend/CPPBackend.cpp
U    lib/Target/CBackend/CTargetMachine.h
U    lib/Target/CBackend/CBackend.cpp
U    lib/Target/TargetMachine.cpp
U    lib/Target/IA64/IA64TargetMachine.cpp
U    lib/Target/IA64/AsmPrinter/IA64AsmPrinter.cpp
U    lib/Target/IA64/IA64TargetMachine.h
U    lib/Target/IA64/IA64.h
U    lib/Target/MSIL/MSILWriter.cpp
U    lib/Target/CellSPU/SPUTargetMachine.h
U    lib/Target/CellSPU/SPU.h
U    lib/Target/CellSPU/AsmPrinter/SPUAsmPrinter.cpp
U    lib/Target/CellSPU/SPUTargetMachine.cpp
U    lib/Target/Mips/AsmPrinter/MipsAsmPrinter.cpp
U    lib/Target/Mips/MipsTargetMachine.cpp
U    lib/Target/Mips/MipsTargetMachine.h
U    lib/Target/Mips/Mips.h
U    lib/Target/Sparc/AsmPrinter/SparcAsmPrinter.cpp
U    lib/Target/Sparc/SparcTargetMachine.cpp
U    lib/Target/Sparc/SparcTargetMachine.h
U    lib/ExecutionEngine/JIT/TargetSelect.cpp
U    lib/Support/TargetRegistry.cpp


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75820 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-15 20:24:03 +00:00
Stuart Hastings
2286f8dc4c Revert 75762, 75763, 75766..75769, 75772..75775, 75778, 75780, 75782 to repair broken LLVM-GCC build.
Will revert 75770 in the llvm-gcc trunk.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75799 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-15 17:27:11 +00:00
Daniel Dunbar
6c05796294 Kill off old (TargetMachine level, not Target level) match quality functions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75780 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-15 12:26:05 +00:00
Daniel Dunbar
03f4bc5d6c Provide TargetMachine implementations with reference to Target they were created
from.
 - This commit is almost entirely propogating the reference through the
   TargetMachine subclasses' constructor calls.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75778 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-15 12:11:05 +00:00