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pass the TargetTriple down from each target ctor to the

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LLVMTargetMachine ctor.  It is currently unused.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78711 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2009-08-11 20:42:37 +00:00
parent 92319e2454
commit 0a31d2f645
13 changed files with 18 additions and 18 deletions
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4
include/llvm/Target/TargetMachine.h
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@ -16,6 +16,7 @@
#include "llvm/Target/TargetInstrItineraries.h"
#include <cassert>
#include <string>
namespace llvm {
@ -290,7 +291,8 @@ public:
///
class LLVMTargetMachine : public TargetMachine {
protected: // Can only create subclasses.
LLVMTargetMachine(const Target &T) : TargetMachine(T) { }
LLVMTargetMachine(const Target &T, const std::string &TargetTriple)
: TargetMachine(T) { }
/// addCommonCodeGenPasses - Add standard LLVM codegen passes used for
/// both emitting to assembly files or machine code output.

2
lib/Target/ARM/ARMTargetMachine.cpp
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@ -39,7 +39,7 @@ ARMBaseTargetMachine::ARMBaseTargetMachine(const Target &T,
const std::string &TT,
const std::string &FS,
bool isThumb)
: LLVMTargetMachine(T),
: LLVMTargetMachine(T, TT),
Subtarget(TT, FS, isThumb),
FrameInfo(Subtarget),
JITInfo(),

2
lib/Target/Alpha/AlphaTargetMachine.cpp
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@ -31,7 +31,7 @@ const TargetAsmInfo *AlphaTargetMachine::createTargetAsmInfo() const {
AlphaTargetMachine::AlphaTargetMachine(const Target &T, const std::string &TT,
const std::string &FS)
: LLVMTargetMachine(T),
: LLVMTargetMachine(T, TT),
DataLayout("e-f128:128:128"),
FrameInfo(TargetFrameInfo::StackGrowsDown, 16, 0),
JITInfo(*this),

2
lib/Target/Blackfin/BlackfinTargetMachine.cpp
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@ -29,7 +29,7 @@ const TargetAsmInfo* BlackfinTargetMachine::createTargetAsmInfo() const {
BlackfinTargetMachine::BlackfinTargetMachine(const Target &T,
const std::string &TT,
const std::string &FS)
: LLVMTargetMachine(T),
: LLVMTargetMachine(T, TT),
DataLayout("e-p:32:32-i64:32-f64:32"),
Subtarget(TT, FS),
TLInfo(*this),

2
lib/Target/CellSPU/SPUTargetMachine.cpp
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@ -39,7 +39,7 @@ const TargetAsmInfo *SPUTargetMachine::createTargetAsmInfo() const {
SPUTargetMachine::SPUTargetMachine(const Target &T, const std::string &TT,
const std::string &FS)
: LLVMTargetMachine(T),
: LLVMTargetMachine(T, TT),
Subtarget(TT, FS),
DataLayout(Subtarget.getTargetDataString()),
InstrInfo(*this),

2
lib/Target/MSP430/MSP430TargetMachine.cpp
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@ -22,7 +22,7 @@ using namespace llvm;
MSP430TargetMachine::MSP430TargetMachine(const Target &T,
const std::string &TT,
const std::string &FS) :
LLVMTargetMachine(T),
LLVMTargetMachine(T, TT),
Subtarget(TT, FS),
// FIXME: Check TargetData string.
DataLayout("e-p:16:8:8-i8:8:8-i16:8:8-i32:8:8"),

5
lib/Target/Mips/MipsTargetMachine.cpp
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@ -38,14 +38,13 @@ const TargetAsmInfo *MipsTargetMachine::createTargetAsmInfo() const {
MipsTargetMachine::
MipsTargetMachine(const Target &T, const std::string &TT, const std::string &FS,
bool isLittle=false):
LLVMTargetMachine(T),
LLVMTargetMachine(T, TT),
Subtarget(TT, FS, isLittle),
DataLayout(isLittle ? std::string("e-p:32:32:32-i8:8:32-i16:16:32") :
std::string("E-p:32:32:32-i8:8:32-i16:16:32")),
InstrInfo(*this),
FrameInfo(TargetFrameInfo::StackGrowsUp, 8, 0),
TLInfo(*this)
{
TLInfo(*this) {
// Abicall enables PIC by default
if (getRelocationModel() == Reloc::Default) {
if (Subtarget.isABI_O32())

2
lib/Target/PIC16/PIC16TargetMachine.cpp
View File

@ -23,7 +23,7 @@ using namespace llvm;
// PIC16TargetMachine - Traditional PIC16 Machine.
PIC16TargetMachine::PIC16TargetMachine(const Target &T, const std::string &TT,
const std::string &FS, bool Cooper)
: LLVMTargetMachine(T),
: LLVMTargetMachine(T, TT),
Subtarget(TT, FS, Cooper),
DataLayout("e-p:16:8:8-i8:8:8-i16:8:8-i32:8:8"),
InstrInfo(*this), TLInfo(*this),

7
lib/Target/PowerPC/PPCTargetMachine.cpp
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@ -29,13 +29,12 @@ extern "C" void LLVMInitializePowerPCTarget() {
const TargetAsmInfo *PPCTargetMachine::createTargetAsmInfo() const {
if (Subtarget.isDarwin())
return new PPCDarwinTargetAsmInfo(*this);
else
return new PPCLinuxTargetAsmInfo(*this);
return new PPCLinuxTargetAsmInfo(*this);
}
PPCTargetMachine::PPCTargetMachine(const Target&T, const std::string &TT,
PPCTargetMachine::PPCTargetMachine(const Target &T, const std::string &TT,
const std::string &FS, bool is64Bit)
: LLVMTargetMachine(T),
: LLVMTargetMachine(T, TT),
Subtarget(TT, FS, is64Bit),
DataLayout(Subtarget.getTargetDataString()), InstrInfo(*this),
FrameInfo(*this, is64Bit), JITInfo(*this, is64Bit), TLInfo(*this),

2
lib/Target/Sparc/SparcTargetMachine.cpp
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@ -31,7 +31,7 @@ const TargetAsmInfo *SparcTargetMachine::createTargetAsmInfo() const {
///
SparcTargetMachine::SparcTargetMachine(const Target &T, const std::string &TT,
const std::string &FS)
: LLVMTargetMachine(T),
: LLVMTargetMachine(T, TT),
DataLayout("E-p:32:32-f128:128:128"),
Subtarget(TT, FS), TLInfo(*this), InstrInfo(Subtarget),
FrameInfo(TargetFrameInfo::StackGrowsDown, 8, 0) {

2
lib/Target/SystemZ/SystemZTargetMachine.cpp
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@ -31,7 +31,7 @@ const TargetAsmInfo *SystemZTargetMachine::createTargetAsmInfo() const {
SystemZTargetMachine::SystemZTargetMachine(const Target &T,
const std::string &TT,
const std::string &FS)
: LLVMTargetMachine(T),
: LLVMTargetMachine(T, TT),
Subtarget(TT, FS),
DataLayout("E-p:64:64:64-i8:8:16-i16:16:16-i32:32:32-i64:64:64-f32:32:32"
"-f64:64:64-f128:128:128-a0:16:16"),

2
lib/Target/X86/X86TargetMachine.cpp
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@ -58,7 +58,7 @@ X86_64TargetMachine::X86_64TargetMachine(const Target &T, const std::string &TT,
///
X86TargetMachine::X86TargetMachine(const Target &T, const std::string &TT,
const std::string &FS, bool is64Bit)
: LLVMTargetMachine(T),
: LLVMTargetMachine(T, TT),
Subtarget(TT, FS, is64Bit),
DataLayout(Subtarget.getDataLayout()),
FrameInfo(TargetFrameInfo::StackGrowsDown,

2
lib/Target/XCore/XCoreTargetMachine.cpp
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@ -25,7 +25,7 @@ const TargetAsmInfo *XCoreTargetMachine::createTargetAsmInfo() const {
///
XCoreTargetMachine::XCoreTargetMachine(const Target &T, const std::string &TT,
const std::string &FS)
: LLVMTargetMachine(T),
: LLVMTargetMachine(T, TT),
Subtarget(TT, FS),
DataLayout("e-p:32:32:32-a0:0:32-f32:32:32-f64:32:32-i1:8:32-i8:8:32-"
"i16:16:32-i32:32:32-i64:32:32"),