Commit Graph

12505 Commits

Author SHA1 Message Date
Torok Edwin
d398bae0e0 Comment grammar fixes.
thanks to Duncan.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140850 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-30 13:07:47 +00:00
Torok Edwin
10a11ecb59 Instead of crashing when MCAsmInfo is NULL, add an assert.
This helps with porting code from 2.9 to 3.0 as TargetSelect.h changed location,
and if you include the old one by accident you will trigger this assert.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140848 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-30 12:31:57 +00:00
Eli Friedman
bb5a7442e3 Clean up uses of switch instructions so they are not dependent on the operand ordering. Patch by Stepan Dyatkovskiy.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140803 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-29 20:21:17 +00:00
Duncan Sands
9a7d48ae67 Place this bracket according to the LLVM style.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140784 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-29 16:01:46 +00:00
Jakob Stoklund Olesen
cc84cda919 Remove NumImplicitOps which is now unused.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140767 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-29 01:47:36 +00:00
Eric Christopher
12eb3ad5d6 Use the local we already set up.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140745 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-29 00:50:59 +00:00
Jakob Stoklund Olesen
3627a46293 Rewrite MachineInstr::addOperand() to avoid NumImplicitOps.
The function needs to scan the implicit operands anyway, so no
performance is won by caching the number of implicit operands added to
an instruction.

This also fixes a bug when adding operands after an implicit operand has
been added manually.  The NumImplicitOps count wasn't kept up to date.

MachineInstr::addOperand() will now consistently place all explicit
operands before all the implicit operands, regardless of the order they
are added.  It is possible to change an MI opcode and add additional
explicit operands.  They will be inserted before any existing implicit
operands.

The only exception is inline asm instructions where operands are never
reordered.  This is because of a hack that marks explicit clobber regs
on inline asm as <implicit-def> to please the fast register allocator.
This hack can go away when InstrEmitter and FastIsel can add exact
<dead> flags to physreg defs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140744 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-29 00:40:51 +00:00
Bill Wendling
cc8cf97be4 Have the SjLjEHPrepare pass do some more heavy lifting.
Upon further review, most of the EH code should remain written at the IR
level. The part which breaks SSA form is the dispatch table, so that part will
be moved to the back-end.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140730 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-28 21:56:53 +00:00
Duncan Sands
42e5c799b6 A typeid of zero means a cleanup, not a catch. This case occurs
when there is both a catch and a cleanup.  Correct the comment.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140686 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-28 09:13:02 +00:00
Bill Wendling
adbf7b2c56 Strip off pointer casts when looking at the eh.sjlj.functioncontext's argument.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140678 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-28 03:52:41 +00:00
Bill Wendling
eef108d560 Bitcast the alloca to an i8* to match the intrinsic's signature.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140677 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-28 03:47:11 +00:00
Bill Wendling
6ef94175d1 Create and use an llvm.eh.sjlj.functioncontext intrinsic.
This intrinsic is used to pass the index of the function context to the back-end
for further processing. The back-end is in charge of filling in the rest of the
entries.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140676 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-28 03:36:43 +00:00
Bill Wendling
2b6bd7ba58 In the new EH model, setup the function context and the call site info.
The DWARF exception pass uses the call site information, which is set up here. A
pre-RA pass is too late for it to use this information. So create and setup the
function context here, and then insert the call site values here (and map the
call sites for the DWARF EH pass). This is simpler than the original pass, and
doesn't make the CFG lose its SSA-ness.

It's a win-win-win-win-lose-win-win situation.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140675 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-28 03:14:05 +00:00
Bill Wendling
4b6736bdb0 Don't conditionalize execution of the SjLj EH prepare pass.
We may need an SjLj EH preparation pass for some call site information, at least
in the short term.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140674 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-28 03:07:34 +00:00
Jakob Stoklund Olesen
56ab875e55 Rename class and clean up source.
No functional change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140664 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-28 00:01:56 +00:00
Jakob Stoklund Olesen
d4d4fca9c3 Rename SSEDomainFix -> lib/CodeGen/ExecutionDepsFix.
I'll clean up the source in the next commit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140663 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-28 00:01:54 +00:00
Bill Wendling
0481d29d49 This is the start of the new SjLj EH preparation pass, which will replace the
current IR-level pass.

The old SjLj EH pass has some problems, especially with the new EH model. Most
significantly, it violates some of the new restrictions the new model has. For
instance, the 'dispatch' table wants to jump to the landing pad, but we cannot
allow that because only an invoke's unwind edge can jump to a landing pad. This
requires us to mangle the code something awful. In addition, we need to keep the
now dead landingpad instructions around instead of CSE'ing them because the
DWARF emitter uses that information (they are dead because no control flow edge
will execute them - the control flow edge from an invoke's unwind is superceded
by the edge coming from the dispatch).

Basically, this pass belongs not at the IR level where SSA is king, but at the
code-gen level, where we have more flexibility.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140646 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-27 22:14:12 +00:00
Cameron Zwarich
d6d9dd647f Remove an invalid assert that is really just asserting when the scheduler emits
a suboptimal schedule.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140643 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-27 21:59:16 +00:00
Jim Grosbach
5405d58e21 Rename AddSelectionDAGCSEId() to addSelectionDAGCSEId().
Naming conventions consistency. No functional change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140636 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-27 20:59:33 +00:00
Nadav Rotem
a3c42f3d4e Cleanup PromoteIntOp_EXTRACT_VECTOR_ELT and PromoteIntRes_SETCC.
Add a new method: getAnyExtOrTrunc and use it to replace the manual check.




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140603 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-27 11:16:47 +00:00
Nadav Rotem
a1c415cfc2 Revert r140463; The patch assumes that <4 x i1> is saved to memory as 4 x i8,
while the decision is to bit-pack small values.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140601 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-27 10:48:29 +00:00
James Molloy
439780eeae Fix emission of debug data for global variables. getContext() on DIGlobalVariables is not valid any more.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140539 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-26 17:40:42 +00:00
Jakob Stoklund Olesen
c291e2f578 Add target hook for pseudo instruction expansion.
Many targets use pseudo instructions to help register allocation.  Like
the COPY instruction, these pseudos can be expanded after register
allocation.  The early expansion can make life easier for PEI and the
post-ra scheduler.

This patch adds a hook that is called for all remaining pseudo
instructions from the ExpandPostRAPseudos pass.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140472 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-25 19:21:35 +00:00
Nadav Rotem
0eba4fe292 [vector-select] Address one of the issues in pr10902. EXTRACT_VECTOR_ELEMENT
SDNodes may return values which are wider than the incoming element types. In
this patch we fix the integer promotion of these nodes.

Fixes spill-q.ll when running -promote-elements.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140471 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-25 18:59:42 +00:00
Jakob Stoklund Olesen
74e2d6ea66 Clean up code after renaming LowerSubregs -> ExpandPostRAPseudos.
No functional change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140470 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-25 16:46:08 +00:00
Jakob Stoklund Olesen
fb96574fca Rename LowerSubregs to ExpandPostRAPseudos.
I'll fix the file contents in the next commit.

This pass is currently expanding the COPY and SUBREG_TO_REG pseudos. I
am going to add a hook so targets can expand more pseudo-instructions
after register allocation.

Many targets have pseudo-instructions that assist the register
allocator.  They can be expanded after register allocation, before PEI
and PostRA scheduling.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140469 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-25 16:46:00 +00:00
Nadav Rotem
17e76bda55 Implement Duncan's suggestion to use the result of getSetCCResultType if it is legal
(this is always the case for scalars), otherwise use the promoted result type.

Fix test/CodeGen/X86/vsplit-and.ll when promote-elements is enabled.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140464 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-24 19:48:19 +00:00
Nadav Rotem
0d5357e3d5 [Vector-Select] Address one of the problems in 10902.
When generating the trunc-store of i1's, we need to use the vector type and not
the scalar type.

This patch fixes the assertion in CodeGen/Generic/bool-vector.ll when
running with -promote-elements.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140463 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-24 18:32:19 +00:00
Jakob Stoklund Olesen
5adc07ebe8 Verify that terminators follow non-terminators.
This exposes a -segmented-stacks bug.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140429 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-23 22:45:39 +00:00
Eli Friedman
bde81d5be9 PR10998: It is not legal to sink an instruction past the terminator of a block; make sure we don't do that.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140428 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-23 22:41:57 +00:00
Duncan Sands
4c19e12d28 Tweak the handling of MERGE_VALUES nodes: remove the need for
DecomposeMERGE_VALUES to "know" that results are legalized in
a particular order, by passing it the number of the result
being legalized (the type legalization core provides this, it
just needs to be passed on).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140373 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-23 13:59:22 +00:00
Nadav Rotem
c56d65f63c Vector-Select: Address one of the problems in pr10902. Add handling for the
integer-promotion of CONCAT_VECTORS.

Test: test/CodeGen/X86/widen_shuffle-1.ll

This patch fixes the above tests (when running in with -promote-elements).



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140372 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-23 09:33:24 +00:00
Dan Gohman
7b316c9327 Fix SimplifySelectCC to add newly created nodes to the DAGCombiner
worklist, as it may be possible to perform further optimization on them.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140349 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-22 23:01:29 +00:00
Jakob Stoklund Olesen
08f5cdf5b3 Constrain register classes instead of emitting copies.
Sometimes register class constraints are trivial, like GR32->GR32_NOSP,
or GPR->rGPR.  Teach InstrEmitter to simply constrain the virtual
register instead of emitting a copy in these cases.

Normally, these copies are handled by the coalescer.  This saves some
coalescer work.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140340 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-22 21:39:34 +00:00
Jakob Stoklund Olesen
91fb536a34 Add a MinNumRegs argument to MRI::constrainRegClass().
The function will refuse to use a register class with fewer registers
than MinNumRegs.  This can be used by clients to avoid accidentally
increase register pressure too much.

The default value of MinNumRegs=0 doesn't affect how constrainRegClass()
works.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140339 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-22 21:39:31 +00:00
Bill Wendling
711395527e Use the C personality function instead of the C++ personality function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140318 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-22 17:56:40 +00:00
Devang Patel
1dd4e56d55 Do not unnecessarily use AT_specification DIE because it does not add any value.
Few weeks ago, llvm completely inverted the debug info graph. Earlier each debug info node used to keep track of its compile unit, now compile unit keeps track of important nodes. One impact of this change is that the global variable's do not have any context, which should be checked before deciding to use AT_specification DIE.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140282 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-21 23:41:11 +00:00
Bill Wendling
3ca2ad1156 Attempt to update the shadow stack GC pass to the new EH model.
This inserts a cleanup landingpad instruction and a resume to mimic the old
unwind instruction.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140277 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-21 22:14:28 +00:00
Jim Grosbach
fe59d853c6 Tidy up. Whitepsace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140275 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-21 21:36:53 +00:00
Nadav Rotem
1147248e6f [VECTOR-SELECT] Address one of the bugs in pr10902.
Vector SetCC result types need to be type-legalized.
This code worked before because scalar result types are known to be legal.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140249 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-21 14:34:38 +00:00
Andrew Trick
3be654f808 Lower ARM adds/subs to add/sub after adding optional CPSR operand.
This is still a hack until we can teach tblgen to generate the
optional CPSR operand rather than an implicit CPSR def. But the
strangeness is now limited to the selection DAG. ADD/SUB MI's no
longer have implicit CPSR defs, nor do we allow flag setting variants
of these opcodes in machine code. There are several corner cases to
consider, and getting one wrong would previously lead to nasty
miscompilation. It's not the first time I've debugged one, so this
time I added enough verification to ensure it won't happen again.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140228 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-21 02:20:46 +00:00
Bruno Cardoso Lopes
e97190fdf8 Add a DAGCombine for subvector extracts to remove useless chains of
subvector inserts and extracts. Initial patch by Rackover, Zvi with
some tweak done by me.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140204 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-20 23:19:33 +00:00
Andrew Trick
83a8031336 Restore hasPostISelHook tblgen flag.
No functionality change. The hook makes it explicit which patterns
require "special" handling. i.e. it self-documents tblgen
deficiencies. I plan to add verification in ExpandISelPseudos and
Thumb2SizeReduce to catch any missing hasPostISelHooks. Otherwise it's
too fragile.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140160 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-20 18:22:31 +00:00
Andrew Trick
4815d56bb2 ARM isel bug fix for adds/subs operands.
Modified ARMISelLowering::AdjustInstrPostInstrSelection to handle the
full gamut of CPSR defs/uses including instructins whose "optional"
cc_out operand is not really optional. This allowed removal of the
hasPostISelHook to simplify the .td files and make the implementation
more robust.
Fixes rdar://10137436: sqlite3 miscompile


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140134 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-20 03:17:40 +00:00
Andrew Trick
3af7a67629 whitespace
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140133 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-20 03:06:13 +00:00
Nadav Rotem
b6266fb602 white space cleanups
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139994 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-18 10:29:29 +00:00
Benjamin Kramer
76f58d2031 Namespacify.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139892 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-16 00:35:06 +00:00
Jakob Stoklund Olesen
ebac0c1747 Spill mode: Hoist back-copies locally.
The leaveIntvAfter() function normally inserts a back-copy after the
requested instruction, making the back-copy kill the live range.

In spill mode, try to insert the back-copy before the last use instead.
That means the last use becomes the kill instead of the back-copy.  This
lowers the register pressure because the last use can now redefine the
same register it was reading.

This will also improve compile time: The back-copy isn't a kill, so
hoisting it in hoistCopiesForSize() won't force a recomputation of the
source live range.  Similarly, if the back-copy isn't hoisted by the
splitter, the spiller will not attempt hoisting it locally.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139883 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-16 00:03:35 +00:00
Jakob Stoklund Olesen
69cf1cac3f Disable local spill hoisting for non-killing copies.
If the source register is live after the copy being spilled, there is no
point to hoisting it.  Hoisting inside a basic block only serves to
resolve interferences by shortening the live range of the source.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139882 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-16 00:03:33 +00:00
Eli Friedman
331120b1a4 Some legalization fixes for atomic load and store.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139851 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-15 21:20:49 +00:00