Commit Graph

76627 Commits

Author SHA1 Message Date
Jakob Stoklund Olesen
845d2c0c77 Add TRI::getSubClassWithSubReg(RC, Idx) function.
This function is used to constrain a register class to a sub-class that
supports the given sub-register index.

For example, getSubClassWithSubReg(GR32, sub_8bit) -> GR32_ABCD.

The function will be used to compute register classes when emitting
INSERT_SUBREG and EXTRACT_SUBREG nodes and for register class inflation
of sub-register operations.

The version provided by TableGen is usually adequate, but targets can
override.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141142 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-05 00:35:49 +00:00
Bill Wendling
2a85015313 Checkpoint for SJLJ EH code.
This is a first pass at generating the jump table for the sjlj dispatch. It
currently generates something plausible, but hasn't been tested thoroughly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141140 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-05 00:02:33 +00:00
Jakob Stoklund Olesen
200a8cef25 Also add <imp-use,kill> flags for redefined super-registers.
For example:

  %vreg10:dsub_0<def,undef> = COPY %vreg1
  %vreg10:dsub_1<def> = COPY %vreg2

is rewritten as:

  %D2<def> = COPY %D0, %Q1<imp-def>
  %D3<def> = COPY %D1, %Q1<imp-use,kill>, %Q1<imp-def>

The first COPY doesn't care about the previous value of %Q1, so it
doesn't read that register.

The second COPY is a partial redefinition of %Q1, so it implicitly kills
and redefines that register.

This makes it possible to recognize instructions that can harmlessly
clobber the full super-register.  The write and don't read the
super-register.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141139 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-05 00:01:48 +00:00
Jakob Stoklund Olesen
b077cf338b Also add <def,undef> flags when coalescing sub-registers.
RegisterCoalescer can create sub-register defs when it is joining a
register with a sub-register.  Add <undef> flags to these new
sub-register defs where appropriate.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141138 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-05 00:01:46 +00:00
Owen Anderson
2fec6c5ff1 Teach the MC to output code/data region marker labels in MachO and ELF modes. These are used by disassemblers to provide better disassembly, particularly on targets like ARM Thumb that like to intermingle data in the TEXT segment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141135 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-04 23:26:17 +00:00
Kevin Enderby
9e5887b17e Adding back support for printing operands symbolically to ARM's new disassembler
using llvm's public 'C' disassembler API now including annotations.

Hooked this up to Darwin's otool(1) so it can again print things like branch
targets for example this:
 blx _puts
instead of this:
 blx #-36
and includes support for annotations for branches to symbol stubs like:
 bl	0x40 @ symbol stub for: _puts
and annotations for pc relative loads like this:
 ldr	r3, #8 @ literal pool for: Hello, world!
Also again can print the expression encoded in the Mach-O relocation entries for
things like this:
 movt r0, :upper16:((_foo-_bar)+1234)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141129 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-04 22:44:48 +00:00
Bill Wendling
a8512edb6d Create a mapping between the landing pad basic block and the call site index for later use.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141125 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-04 22:00:35 +00:00
Jakob Stoklund Olesen
7016cf66ee Allow <undef> flags on def operands as well as uses.
The <undef> flag says that a MachineOperand doesn't read its register,
or doesn't depend on the previous value of its register.

A full register def never depends on the previous register value.  A
partial register def may depend on the previous value if it is intended
to update part of a register.

For example:

  %vreg10:dsub_0<def,undef> = COPY %vreg1
  %vreg10:dsub_1<def> = COPY %vreg2

The first copy instruction defines the full %vreg10 register with the
bits not covered by dsub_0 defined as <undef>.  It is not considered a
read of %vreg10.

The second copy modifies part of %vreg10 while preserving the rest.  It
has an implicit read of %vreg10.

This patch adds a MachineOperand::readsReg() method to determine if an
operand reads its register.

Previously, this was modelled by adding a full-register <imp-def>
operand to the instruction.  This approach makes it possible to
determine directly from a MachineOperand if it reads its register.  No
scanning of MI operands is required.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141124 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-04 21:49:33 +00:00
Jim Grosbach
0ebefdf834 Tidy up formatting.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141123 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-04 21:43:51 +00:00
Bill Wendling
fbc6e404c4 Doxygen-ize comments. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141122 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-04 21:25:01 +00:00
Daniel Dunbar
168d135028 Remove unused web page.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141118 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-04 21:17:19 +00:00
Jim Grosbach
fdf6bb41a4 Un-XFAIL file. Comment out individual failing instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141117 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-04 21:16:42 +00:00
Francois Pichet
11ad7e5d58 Replace snprintf with raw_string_ostream.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141116 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-04 21:08:56 +00:00
Jim Grosbach
20f8eb2fc1 Tidy up formatting.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141115 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-04 20:52:57 +00:00
Jim Grosbach
e5c933848a Un-XFAIL file. Fix incorrect CHECK lines. General format cleanup.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141114 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-04 20:50:05 +00:00
Jim Grosbach
dc6c93531d Un-XFAIL file. Fix incorrect CHECK line. General format cleanup.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141113 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-04 20:46:49 +00:00
Jim Grosbach
100902c6da Tidy up formatting.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141111 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-04 20:42:35 +00:00
Jim Grosbach
0c0cf47ed5 Un-XFAIL file. Fix incorrect CHECK line.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141110 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-04 20:42:09 +00:00
Jim Grosbach
62ea269b9a Un-XFAIL the file. Disable only the individual tests that aren't working yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141108 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-04 20:34:11 +00:00
Bill Wendling
58d3548ea4 Add method to determine if a begin label has a call site number associated with it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141107 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-04 20:31:56 +00:00
Jakob Stoklund Olesen
dae7909be3 Properly use const_iterator.
This should unbreak the Windows build.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141105 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-04 20:18:39 +00:00
Devang Patel
1e97def44a Update cmake list.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141104 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-04 19:38:16 +00:00
David Chisnall
c7d93bec47 Tell people using the tutorial how to make it actually work.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141103 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-04 19:36:30 +00:00
David Greene
764b29e1c8 Test Operand Arguments
Add a test to do list manipulation and pass the result as arguments.
This tests the new list element operator resolve code and provides an
example of using list manipulation to do instruction pattern
substitution.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141102 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-04 18:55:40 +00:00
David Greene
cedaae125e Allow Operator Arguments
When resolving an operator list element reference, resolve all
operator operands and try to fold the operator first.  This allows the
operator to collapse to a list which may then be indexed.

Before, it was not possible to do this:
class D<int a, int b> { ... }
class C<list<int> A> : D<A[0], A[1]>;
class B<list<int> b> : C<!foreach(...,b)>;

Now it is.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141101 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-04 18:55:36 +00:00
Jim Grosbach
a02dfe7a6b Un-XFAIL the file. Disable only the individual tests that aren't working yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141099 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-04 18:43:15 +00:00
Ted Kremenek
a589b1fa2b Unbreak CMake build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141097 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-04 18:22:24 +00:00
Jim Grosbach
36db6fbe57 Tidy up. Formatting.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141096 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-04 17:49:45 +00:00
Devang Patel
58c620024a Put GCOVFile and other related interface in a common header so that llvm-cov tool can share it with GCOV writer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141095 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-04 17:24:48 +00:00
Francois Pichet
1f121e844f Unbreak MSVC build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141093 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-04 16:28:07 +00:00
David Dean
8a567f1fb9 Fix PR9833/PR11054 (patch provided by Patrik Hägglund)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141092 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-04 16:26:41 +00:00
Jakob Stoklund Olesen
babf0569e2 Teach TableGen to infer missing register classes.
The set of register classes should be closed under sub-register
operations and intersections. That will allow the register allocator to
model combinations of constraints accurately.

This patch implements the easiest form of register class inference:  For
every register class, and for every sub-register SubIdx, the subset of
registers in RC that have a SubIdx sub-register should also be a register
class.

This does create some new register classes for the targets in the tree:

ARM gets a new QQQQPR_with_ssub_0.  This class was omitted from the .td
file on purpose because it only has two registers.  InstrEmitter and
RegisterCoalescer have safeguards against selecting too small register
classes, so it is harmless.

PowerPC gets a G8RC_with_sub_32 class because LR is not a sub_32
sub-register of LR8.  I think that might be an omission?

X86 puts RIP in the GR64 class, and since that register doesn't have
8-bit sub-registers, we get:

  GR64_with_sub_8bit
  GR64_TC_with_sub_8bit
  GR64_NOREX_with_sub_8bit
  GR64_TC_with_sub_8bit_hi

The various CodeGen classes have already been fixed so adding new
register classes should not affect compile time.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141084 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-04 15:28:49 +00:00
Jakob Stoklund Olesen
01faf432d9 Teach PPCInstrInfo to handle sub-classes.
This has already been done for most other targets.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141083 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-04 15:28:47 +00:00
Jakob Stoklund Olesen
cc0c975b7d TableGen: Store all allocation orders together.
There is no need to keep the primary order separate.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141082 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-04 15:28:44 +00:00
Jakob Stoklund Olesen
6fea31e730 TableGen: Privatize CodeGenRegisterClass::TheDef and Name.
When TableGen starts creating its own register classes, the synthesized
classes won't have a Record reference.  All register classes must have a
name, though.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141081 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-04 15:28:08 +00:00
Jakob Stoklund Olesen
877b6d43d4 TableGen: Don't add synthetic Records to the RecordKeeper.
The RecordKeeper could be shared by multiple target instances, causing
duplicate record errors.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141080 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-04 15:27:53 +00:00
Che-Liang Chiou
f987425657 tblgen: add preprocessor as a separate mode
This patch adds a preprocessor that can expand nested for-loops for
saving some copy-n-paste in *.td files.

The preprocessor is not yet integrated with TGParser, and so it has
no direct effect on *.td inputs.  However, you may preprocess an td
input (and only preprocess it).

To test the proprecessor, type:
  tblgen -E -o $@ $<



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141079 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-04 15:14:51 +00:00
Nadav Rotem
34804c4f47 Set operation actions to legal types only.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141075 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-04 12:05:35 +00:00
Nadav Rotem
e8783096d2 Operations should be custom lowered only if their type is legal.
Test: CellSPU/v2i32.ll when running with -promote-elements



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141074 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-04 10:03:32 +00:00
Nick Lewycky
e97728ecf8 The product of two chrec's can always be represented as a chrec.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141066 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-04 06:51:26 +00:00
Craig Topper
6744a17dcf Add support in the disassembler for ignoring the L-bit on certain VEX instructions. Mark instructions that have this behavior. Fixes PR10676.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141065 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-04 06:30:42 +00:00
Andrew Trick
f143b79b78 LSR should avoid redundant edge splitting.
This handles the case in which LSR rewrites an IV user that is a phi and
splits critical edges originating from a switch.
Fixes <rdar://problem/6453893> LSR is not splitting edges "nicely"


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141059 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-04 03:50:44 +00:00
Andrew Trick
2aeb8027d6 whitespace
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141058 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-04 03:34:49 +00:00
Rafael Espindola
b3c4e26dc5 Remove last references to hotpatch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141057 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-04 03:08:43 +00:00
Peter Collingbourne
e97552e850 Exclude libLLVMTableGen.a from the shared library
Unbreaks tools for --enable-shared build.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141052 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-04 00:30:34 +00:00
Bill Wendling
da7e6a9c88 Generic cleanup.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141050 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-04 00:16:40 +00:00
Andrew Trick
d974ea22a5 Unit test for r140919, loop unroll heuristics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141049 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-04 00:07:02 +00:00
Jim Grosbach
3207e6c6b7 Tidy up. These tests are covered in the .s file tests now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141047 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-03 23:40:13 +00:00
Jim Grosbach
9d39036f62 ARM assembly parsing and encoding for VMOV immediate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141046 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-03 23:38:36 +00:00
Jim Grosbach
2a3f19d7e3 Tidy up. 80 columns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141043 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-03 23:03:26 +00:00