Commit Graph

9070 Commits

Author SHA1 Message Date
Chris Lattner
9e4ff94ff7 Switch from generating the int128 typedefs based on targetdata to generating
them based on the end-compiler's capabilities.  This fixes PR2453


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52297 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-16 04:25:29 +00:00
Andrew Lenharth
507a58ac9b add missing atomic intrinsic from gcc
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52270 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-14 05:48:15 +00:00
Duncan Sands
d4b9c17fb7 Disable some DAG combiner optimizations that may be
wrong for volatile loads and stores.  In fact this
is almost all of them!  There are three types of
problems: (1) it is wrong to change the width of
a volatile memory access.  These may be used to
do memory mapped i/o, in which case a load can have
an effect even if the result is not used.  Consider
loading an i32 but only using the lower 8 bits.  It
is wrong to change this into a load of an i8, because
you are no longer tickling the other three bytes.  It
is also unwise to make a load/store wider.  For
example, changing an i16 load into an i32 load is
wrong no matter how aligned things are, since the
fact of loading an additional 2 bytes can have
i/o side-effects.  (2) it is wrong to change the
number of volatile load/stores: they may be counted
by the hardware.  (3) it is wrong to change a volatile
load/store that requires one memory access into one
that requires several.  For example on x86-32, you
can store a double in one processor operation, but to
store an i64 requires two (two i32 stores).  In a
multi-threaded program you may want to bitcast an i64
to a double and store as a double because that will
occur atomically, and be indivisible to other threads.
So it would be wrong to convert the store-of-double
into a store of an i64, because this will become two
i32 stores - no longer atomic.  My policy here is
to say that the number of processor operations for
an illegal operation is undefined.  So it is alright
to change a store of an i64 (requires at least two
stores; but could be validly lowered to memcpy for
example) into a store of double (one processor op).
In short, if the new store is legal and has the same
size then I say that the transform is ok.  It would
also be possible to say that transforms are always
ok if before they were illegal, whether after they
are illegal or not, but that's more awkward to do
and I doubt it buys us anything much.
However this exposed an interesting thing - on x86-32
a store of i64 is considered legal!  That is because
operations are marked legal by default, regardless of
whether the type is legal or not.  In some ways this
is clever: before type legalization this means that
operations on illegal types are considered legal;
after type legalization there are no illegal types
so now operations are only legal if they really are.
But I consider this to be too cunning for mere mortals.
Better to do things explicitly by testing AfterLegalize.
So I have changed things so that operations with illegal
types are considered illegal - indeed they can never
map to a machine operation.  However this means that
the DAG combiner is more conservative because before
it was "accidentally" performing transforms where the
type was illegal because the operation was nonetheless
marked legal.  So in a few such places I added a check
on AfterLegalize, which I suppose was actually just
forgotten before.  This causes the DAG combiner to do
slightly more than it used to, which resulted in the X86
backend blowing up because it got a slightly surprising
node it wasn't expecting, so I tweaked it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52254 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-13 19:07:40 +00:00
Anton Korobeynikov
096b461b2e Properly lower DYNAMIC_STACKALLOC - bracket all black magic with
CALLSEQ_BEGIN & CALLSEQ_END.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52225 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-11 20:16:42 +00:00
Dan Gohman
75146a6725 CPPBackend support for extractvalue and insertvalue.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52147 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-09 14:12:10 +00:00
Dan Gohman
26825a84e9 Abort on an unrecognized opcode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52146 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-09 14:09:13 +00:00
Dan Gohman
e8e3b5585a Update the CPP backend for the ConstantFP::get API change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52144 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-09 14:08:11 +00:00
Rafael Espindola
d674b4e87d add support for PIC on linux x86-64
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52139 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-09 09:52:31 +00:00
Duncan Sands
8e4eb09b1e Remove comparison methods for MVT. The main cause
of apint codegen failure is the DAG combiner doing
the wrong thing because it was comparing MVT's using
< rather than comparing the number of bits.  Removing
the < method makes this mistake impossible to commit.
Instead, add helper methods for comparing bits and use
them.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52098 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-08 20:54:56 +00:00
Bruno Cardoso Lopes
e90ea5e81f Added FP instruction formats.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52086 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-08 01:39:36 +00:00
Bill Wendling
a8a8f427d6 Temporarily reverting r52056. It's causing PPC to fail to bootstrap.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52085 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-08 01:36:24 +00:00
Bruno Cardoso Lopes
dfac7cb306 Added support for FP Registers
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52079 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-07 21:32:41 +00:00
Evan Cheng
3e3aa86b68 Revert r52046. It broke cbe on x86 / Mac OS X.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52071 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-07 07:50:29 +00:00
Evan Cheng
929b39f0a0 Typo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52062 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-06 21:00:10 +00:00
Evan Cheng
6b4a65f4e7 PPC preferred loop alignment is 16.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52056 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-06 19:50:46 +00:00
Anton Korobeynikov
001c73e3a1 Handle assembler identifiers specially in CBE. This fixes PR2418.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52046 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-06 16:08:26 +00:00
Duncan Sands
83ec4b6711 Wrap MVT::ValueType in a struct to get type safety
and better control the abstraction.  Rename the type
to MVT.  To update out-of-tree patches, the main
thing to do is to rename MVT::ValueType to MVT, and
rewrite expressions like MVT::getSizeInBits(VT) in
the form VT.getSizeInBits().  Use VT.getSimpleVT()
to extract a MVT::SimpleValueType for use in switch
statements (you will get an assert failure if VT is
an extended value type - these shouldn't exist after
type legalization).
This results in a small speedup of codegen and no
new testsuite failures (x86-64 linux).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52044 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-06 12:08:01 +00:00
Bruno Cardoso Lopes
0af5e095ad Added custom isel for MUL, SDIVREM, UDIVREM, SMUL_LOHI and UMUL_LOHI nodes
MUL is not anymore directly matched because its a pseudoinstruction.
LogicI class fixed to zero-extend immediates. 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52036 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-06 06:37:31 +00:00
Bruno Cardoso Lopes
07cec75913 Added custom SELECT_CC lowering
Added special isel for ADDE,SUBE and new patterns to match SUBC,ADDC


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52031 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-06 00:58:26 +00:00
Evan Cheng
1b022cf688 Don't break strict aliasing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52026 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-05 22:59:21 +00:00
Chris Lattner
67f631dfd5 Rewrite a bunch of the CBE's inline asm code, giving it the
ability to handle indirect input operands.  This fixes PR2407.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51952 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-04 18:03:28 +00:00
Duncan Sands
a0fcc08e65 Change packed struct layout so that field sizes
are the same as in unpacked structs, only field
positions differ.  This only matters for structs
containing x86 long double or an apint; it may
cause backwards compatibility problems if someone
has bitcode containing a packed struct with a
field of one of those types.
The issue is that only 10 bytes are needed to
hold an x86 long double: the store size is 10
bytes, but the ABI size is 12 or 16 bytes (linux/
darwin) which comes from rounding the store size
up by the alignment.  Because it seemed silly not
to pack an x86 long double into 10 bytes in a
packed struct, this is what was done.  I now
think this was a mistake.  Reserving the ABI size
for an x86 long double field even in a packed
struct makes things more uniform: the ABI size is
now always used when reserving space for a type.
This means that developers are less likely to
make mistakes.  It also makes life easier for the
CBE which otherwise could not represent all LLVM
packed structs (PR2402).
Front-end people might need to adjust the way
they create LLVM structs - see following change
to llvm-gcc.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51928 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-04 08:21:45 +00:00
Bruno Cardoso Lopes
d2947ee33e Some Mips minor fixes
Added support for mips little endian arch => mipsel



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51923 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-04 01:45:25 +00:00
Dale Johannesen
428ac54894 Add StringConstantPrefix to control what the
assembler names of string constants look like.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51909 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-03 18:09:06 +00:00
Scott Michel
8bf61e8c2a Add necessary 64-bit support so that gcc frontend compiles (mostly). Current
issue is operand promotion for setcc/select... but looks like the fundamental
stuff is implemented for CellSPU.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51884 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-02 22:18:03 +00:00
Dan Gohman
193c235850 Implement CBE support for first-class structs and array values,
and insertvalue and extractvalue instructions.

First-class array values are not trivial because C doesn't
support them. The approach I took here is to wrap all arrays
in structs. Feedback is welcome.

The 2007-01-15-NamedArrayType.ll test needed to be modified
because it has a "not grep" for a string that now exists,
because array types now have associated struct types, and
those struct types have names.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51881 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-02 21:30:49 +00:00
Rafael Espindola
da5860fa8b Don't use the GOT for symbols that are not externally visible.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51865 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-02 07:52:43 +00:00
Bruno Cardoso Lopes
bdbb750afe Fixed flag issue that was generating infinite loop while in list scheduling.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51833 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-01 03:49:39 +00:00
Nick Lewycky
517e1f5cd7 Peer through sext/zext when looking for not(cmp).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51819 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-31 19:01:33 +00:00
Nick Lewycky
4914db09a5 Yay us! Every one of these examples turns into icmp/zext/ret.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51818 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-31 18:20:26 +00:00
Chris Lattner
e56d946a38 Fix the CBE's handling of instructions whose result is an i1. Previously,
we did not truncate the value down to i1 with (x&1).  This caused a problem
when the computation of x was nontrivial, for example, "add i1 1, 1" would 
return 2 instead of 0.

This makes the testcase compile into:

...
  llvm_cbe_t = (((llvm_cbe_r == 0u) + (llvm_cbe_r == 0u))&1);
  llvm_cbe_u = (((unsigned int )(bool )llvm_cbe_t));
...

instead of:

...
  llvm_cbe_t = ((llvm_cbe_r == 0u) + (llvm_cbe_r == 0u));
  llvm_cbe_u = (((unsigned int )(bool )llvm_cbe_t));
...

This fixes a miscompilation of mediabench/adpcm/rawdaudio/rawdaudio and
403.gcc with the CBE, regressions from LLVM 2.2. Tanya, please pull 
this into the release branch.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51813 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-31 09:23:55 +00:00
Dan Gohman
e4c67cdab4 Teach the DAGISelEmitter to not compute the variable_ops operand
index for the input pattern in terms of the output pattern. Instead
keep track of how many fixed operands the input pattern actually
has, and have the input matching code pass the output-emitting
function that index value. This simplifies the code, disentangles
variables_ops from the support for predication operations, and
makes variable_ops more robust.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51808 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-31 02:11:25 +00:00
Evan Cheng
89df08c8a0 Fix indentation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51792 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-30 22:39:18 +00:00
Bill Wendling
37a6134165 Add the "AsCheapAsAMove" flag to some 64-bit xor instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51761 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-30 06:47:04 +00:00
Dan Gohman
b4106170dd Add patterns for CALL32m and CALL64m. They aren't matched in most
cases due to an isel deficiency already noted in
lib/Target/X86/README.txt, but they can be matched in this fold-call.ll
testcase, for example.

This is interesting mainly because it exposes a tricky tblgen bug;
tblgen was incorrectly computing the starting index for variable_ops
in the case of a complex pattern.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51706 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-29 21:50:34 +00:00
Bill Wendling
eecfa369eb Remove more iostream header includes. Needed to implement a "FlushStream"
function to flush a specified std::ostream.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51705 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-29 21:46:33 +00:00
Dan Gohman
d35121ad00 Fix a tblgen problem handling variable_ops in tblgen instruction
definitions. This adds a new construct, "discard", for indicating
that a named node in the input matching pattern is to be discarded,
instead of corresponding to a node in the output pattern. This
allows tblgen to know where the arguments for the varaible_ops are
supposed to begin.

This fixes "rdar://5791600", whatever that is ;-).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51699 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-29 19:57:41 +00:00
Dan Gohman
21323f3a82 Expand small memmovs using inline code. Set the X86 threshold for expanding
memmove to a more plausible value, now that it's actually being used.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51696 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-29 19:42:22 +00:00
Evan Cheng
f26ffe987c Implement vector shift up / down and insert zero with ps{rl}lq / ps{rl}ldq.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51667 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-29 08:22:04 +00:00
Bill Wendling
75cf88f1fe XOR?RI instructions aren't as cheap as moves.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51664 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-29 03:46:36 +00:00
Bill Wendling
bd0879d7d9 Implement "AsCheapAsAMove" for some obviously cheap instructions: xor and the
like.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51662 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-29 01:02:09 +00:00
Bill Wendling
8370d38ade Add a flag to indicate that an instruction is as cheap (or cheaper) than a move
instruction to execute. This can be used for transformations (like two-address
conversion) to remat an instruction instead of generating a "move"
instruction. The idea is to decrease the live ranges and register pressure and
all that jazz.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51660 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-28 22:54:52 +00:00
Nate Begeman
73e4d594e7 Update some comments noticed in a recent checkin
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51644 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-28 16:31:36 +00:00
Chris Lattner
e5ab3355ba Add chain inputs for loads.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51635 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-28 04:25:57 +00:00
Chris Lattner
3f1891ca6d Fix CodeGen/Generic/2005-10-21-longlonggtu.ll on ia64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51634 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-28 04:14:30 +00:00
Chris Lattner
b0349bfe72 loads should get chains. THis helps but does not solve CodeGen/Generic/2003-05-27-phifcmpd.ll
on ia64.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51633 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-28 04:06:52 +00:00
Chris Lattner
9b07d3d378 Fix 2006-04-28-Sign-extend-bool.ll for ia64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51632 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-28 04:00:06 +00:00
Chris Lattner
aec8d823fb reindent.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51631 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-28 03:59:32 +00:00
Dan Gohman
c2ecdc5a26 Fix the encoding for two more "rm" instructions that were using MRMSrcReg.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51630 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-28 01:50:19 +00:00
Mon P Wang
bfbbd4d221 Fixed X86 encoding error CVTPS2PD and CVTPD2PS when the source operand
is a memory location


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51626 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-28 00:42:27 +00:00