Commit Graph

77541 Commits

Author SHA1 Message Date
Nick Lewycky
88c0514ec5 Oops! Fix test I forgot to submit as part of r142735.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142736 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-22 22:07:31 +00:00
Nick Lewycky
4d882aae2a A non-escaping malloc in the entry block is not unlike an alloca. Do dead-store
elimination on them too.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142735 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-22 21:59:35 +00:00
Nick Lewycky
614fef6d5a Make SCEV's brute force analysis stronger in two ways. Firstly, we should be
able to constant fold load instructions where the argument is a constant.
Second, we should be able to watch multiple PHI nodes through the loop; this
patch only supports PHIs in loop headers, more can be done here.

With this patch, we now constant evaluate:
  static const int arr[] = {1, 2, 3, 4, 5};
  int test() {
    int sum = 0;
    for (int i = 0; i < 5; ++i) sum += arr[i];
    return sum;
  }


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142731 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-22 19:58:20 +00:00
Nadav Rotem
5eebf6ff20 Fix a typo.w
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142729 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-22 18:44:51 +00:00
Jim Grosbach
6083d81e4e Minor updates.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142728 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-22 18:17:32 +00:00
Nadav Rotem
02b4bdb9e0 Added my name to CREDITS.TXT
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142727 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-22 17:51:04 +00:00
Benjamin Kramer
1a2f9886a2 Move various generated tables into read-only memory, fixing up const correctness along the way.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142726 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-22 16:50:00 +00:00
Nadav Rotem
5b2bba6122 Fix pr11193.
SHL inserts zeros from the right, thus even when the original
sign_extend_inreg value was of 1-bit, we need to sra.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142724 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-22 12:39:25 +00:00
Bill Wendling
b8dcb314f7 The different flavors of ARM have different valid subsets of registers. Check
that the set of callee-saved registers is correct for the specific platform.
<rdar://problem/10313708> & ctor_dtor_count & ctor_dtor_count-2


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142706 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-22 00:29:28 +00:00
Jim Grosbach
224180e81b Assembly parsing for 4-register sequential variant of VLD2.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142704 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-21 23:58:57 +00:00
Jim Grosbach
4661d4cac3 Assembly parsing for 2-register sequential variant of VLD2.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142691 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-21 22:21:10 +00:00
Bill Wendling
0ad56122e5 Make sure that the landing pads themselves have no PHI instructions in them.
The assumption in the back-end is that PHIs are not allowed at the start of the
landing pad block for SjLj exceptions.
<rdar://problem/10313708>


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142689 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-21 22:08:56 +00:00
Benjamin Kramer
675c02b0b9 Extend the floating point heuristic to consider NaN checks unlikely.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142687 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-21 21:13:47 +00:00
Tanya Lattner
7102b703bf Revert r141657 for now. This has broken css and changed links on llvm.org. I'd like to understand exactly why the links have changed and if a newer doxygen is required. This may be reapplied once we upgrade on llvm.org and it is fully tested.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142686 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-21 20:51:54 +00:00
Eli Friedman
4090e1ce91 Remap blockaddress correctly when inlining a function. Fixes PR10162.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142684 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-21 20:45:19 +00:00
Owen Anderson
ca7eb3e171 Use LLVMBool for a function that logically returns a boolean value.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142683 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-21 20:35:58 +00:00
Jim Grosbach
b6310316db Assembly parsing for 4-register variant of VLD1.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142682 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-21 20:35:01 +00:00
Owen Anderson
65f73abf07 Fix typo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142681 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-21 20:28:19 +00:00
Benjamin Kramer
c888aa47bd BranchProbabilityInfo: floating point equality is unlikely.
This is from the same paper from Ball and Larus as the rest of the currently implemented heuristics.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142677 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-21 20:12:47 +00:00
Jim Grosbach
cdcfa28056 Assembly parsing for 3-register variant of VLD1.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142675 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-21 20:02:19 +00:00
Owen Anderson
a48aab924d STABS symbols are debug symbols.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142673 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-21 19:26:54 +00:00
Eli Friedman
8d992f5c2c Minor simplification: use ShuffleVectorInst::getMaskValue instead of a more expensive helper.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142672 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-21 19:11:34 +00:00
Eli Friedman
d2822e7572 Extend instcombine's shufflevector simplification to handle more cases where the input and output vectors have different sizes. Patch by Xiaoyi Guo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142671 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-21 19:06:29 +00:00
Jim Grosbach
280dfad489 ARM VLD parsing and encoding.
Next step in the ongoing saga of NEON load/store assmebly parsing. Handle
VLD1 instructions that take a two-register register list.

Adjust the instruction definitions to only have the single encoded register
as an operand. The super-register from the pseudo is kept as an implicit def,
so passes which come after pseudo-expansion still know that the instruction
defines the other subregs.




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142670 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-21 18:54:25 +00:00
Owen Anderson
7784f1d2d8 Don't automatically set the "fc" bits on MSR instructions if the user didn't ask for them. This is a divergence from gas' behavior, but it is correct per the documentation and allows us to forge ahead with roundtrip testing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142669 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-21 18:43:28 +00:00
Owen Anderson
e2fa64ef22 Bind libObject API for obtaining the section containing a Symbol.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142667 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-21 18:21:22 +00:00
Owen Anderson
3cb056797b Expand the coverage of the libObject C bindings to include more SectionRef accessors as well as Symbol iterators.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142661 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-21 17:50:59 +00:00
Nadav Rotem
a054bcb4cf Fix pr11194. When promoting and splitting integers we need to use
ZExtPromotedInteger and SExtPromotedInteger based on the operation we legalize.

SetCC return type needs to be legalized via PromoteTargetBoolean.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142660 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-21 17:35:19 +00:00
Jim Grosbach
7926db8268 Nuke an #if0 that got accidentally left in.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142658 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-21 16:59:08 +00:00
Jim Grosbach
293a5f69fa whitespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142657 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-21 16:56:40 +00:00
Chandler Carruth
7555c40c48 Don't hard code the desired alignment for loops -- it isn't 16-bytes on
all x86 systems. Sorry for the breakage.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142656 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-21 16:41:39 +00:00
Jim Grosbach
fe7b4998c6 Remove some outdated comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142653 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-21 16:14:12 +00:00
Nadav Rotem
4bd222ae26 1. Fix the widening of SETCC in WidenVecOp_SETCC. Use the correct return CC type.
2. Fix a typo in CONCAT_VECTORS which exposed the bug in #1.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142648 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-21 11:42:07 +00:00
Duncan Sands
58fba239e4 Ensure timestamps are not embedded into files when doing a release build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142647 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-21 09:47:14 +00:00
Anton Korobeynikov
cda065df61 Fix build on mingw-w64.
Patch by Ruben Van Boxem!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142646 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-21 09:38:50 +00:00
Chandler Carruth
4a85cc982a Add loop aligning to MachineBlockPlacement based on review discussion so
it's a bit more plausible to use this instead of CodePlacementOpt. The
code for this was shamelessly stolen from CodePlacementOpt, and then
trimmed down a bit. There doesn't seem to be much utility in returning
true/false from this pass as we may or may not have rewritten all of the
blocks. Also, the statistic of counting how many loops were aligned
doesn't seem terribly important so I removed it. If folks would like it
to be included, I'm happy to add it back.

This was probably the most egregious of the missing features, and now
I'm going to start gathering some performance numbers and looking at
specific loop structures that have different layout between the two.

Test is updated to include both basic loop alignment and nested loop
alignment.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142645 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-21 08:57:37 +00:00
Chandler Carruth
4162eced73 Add a very basic test for MachineBlockPlacement. This is essentially the
canonical example I used when developing it, and is one of the primary
motivating real-world use cases for __builtin_expect (when burried under
a macro).

I'm working on more test cases here, but I'm trying to make sure both
that the pass is doing the right thing with the test cases and that they
aren't too brittle to changes elsewhere in the code generation pipeline.

Feedback and/or suggestions on how to test this are very welcome.
Especially feedback on whether testing the block comments is a good
strategy; I couldn't find any good examples to steal from but all the
other ideas I had were a lot uglier or more fragile.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142644 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-21 08:01:56 +00:00
Bill Wendling
b9ad624fcd Modify the script to output the regressions and passes into categories. My Python-fu could use some improving...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142643 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-21 06:58:01 +00:00
Craig Topper
b4c945716f Remove intrinsics for X86 BLSI, BLSMSK, and BLSR intrinsics and replace with custom isel lowering code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142642 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-21 06:55:01 +00:00
Chandler Carruth
db35087d21 Implement a block placement pass based on the branch probability and
block frequency analyses. This differs substantially from the existing
block-placement pass in LLVM:

1) It operates on the Machine-IR in the CodeGen layer. This exposes much
   more (and more precise) information and opportunities. Also, the
   results are more stable due to fewer transforms ocurring after the
   pass runs.
2) It uses the generalized probability and frequency analyses. These can
   model static heuristics, code annotation derived heuristics as well
   as eventual profile loading. By basing the optimization on the
   analysis interface it can work from any (or a combination) of these
   inputs.
3) It uses a more aggressive algorithm, both building chains from tho
   bottom up to maximize benefit, and using an SCC-based walk to layout
   chains of blocks in a profitable ordering without O(N^2) iterations
   which the old pass involves.

The pass is currently gated behind a flag, and not enabled by default
because it still needs to grow some important features. Most notably, it
needs to support loop aligning and careful layout of loop structures
much as done by hand currently in CodePlacementOpt. Once it supports
these, and has sufficient testing and quality tuning, it should replace
both of these passes.

Thanks to Nick Lewycky and Richard Smith for help authoring & debugging
this, and to Jakob, Andy, Eric, Jim, and probably a few others I'm
forgetting for reviewing and answering all my questions. Writing
a backend pass is *sooo* much better now than it used to be. =D

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142641 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-21 06:46:38 +00:00
Bill Wendling
3df9f541a0 Check for divide by zero.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142640 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-21 06:26:01 +00:00
Chandler Carruth
ec0e5475fd Remove a now dead function, fixing -Wunused-function warnings from
Clang.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142631 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-21 01:23:41 +00:00
Richard Smith
ed8db320af Fix unused variable warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142630 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-21 01:22:04 +00:00
Owen Anderson
cd20c58e98 Revert r142618, r142622, and r142624, which were based on an incorrect reading of the ARMv7 docs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142626 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-20 22:23:58 +00:00
Owen Anderson
fe0748d696 Fix decoding tests for fixed MSR encodings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142624 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-20 22:01:48 +00:00
David Meyer
e1d0b4fc25 Remove unused include of sys/uio.h in MemoryBuffer.cpp. It was not correctly protected by ifdef either.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142623 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-20 21:57:46 +00:00
Owen Anderson
5096503184 Fix tests for corrected MSR encodings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142622 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-20 21:53:19 +00:00
Dan Gohman
5bdab4a63c Disable the PPC hazard recognizer. It currently only supports
top-down scheduling and top-down scheduling is going away.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142621 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-20 21:45:36 +00:00
Dan Gohman
ff764815e6 Delete the list-tdrr scheduler. Top-down schedulers are going away
because they don't support physical register dependencies.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142620 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-20 21:44:34 +00:00
Owen Anderson
a3a6f215d0 Separate out ARM MSR instructions into M-class versions and AR-class versions. This fixes some roundtripping failures.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142618 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-20 21:24:38 +00:00