Commit Graph

66171 Commits

Author SHA1 Message Date
Craig Topper
89aeb02b71 Mark some Type and EVT methods as LLVM_READONLY.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198115 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-28 16:17:26 +00:00
Andrea Di Biagio
6ec3395335 [X86] Teach the backend how to fold target specific dag node for packed
vector shift by immedate count (VSHLI/VSRLI/VSRAI) into a build_vector when
the vector in input to the shift is a build_vector of all constants or UNDEFs.

Target specific nodes for packed shifts by immediate count are in
general introduced by function 'getTargetVShiftByConstNode' (in
X86ISelLowering.cpp) when lowering shift operations, SSE/AVX immediate
shift intrinsics and (only in very few cases) SIGN_EXTEND_INREG dag
nodes.

This patch adds extra rules for simplifying vector shifts inside
function 'getTargetVShiftByConstNode'.

Added file test/CodeGen/X86/vec_shift5.ll to verify that packed
shifts by immediate are correctly folded into a build_vector when the
input vector to the shift dag node is a vector of constants or undefs.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198113 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-28 11:11:52 +00:00
Saleem Abdulrasool
14b42a1c92 AsmParser: cleanup diagnostics for .rep/.rept
Avoid double diagnostics for invalid expressions for count.  Improve caret
location for negative count.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198099 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-28 06:39:29 +00:00
Saleem Abdulrasool
b5191e98e8 IAS: support .rep as an alias for .rept
The GNU assembler supports .rep as an alias for .rept.  This simply creates the
alias for it and introduces a test for both .rept and .rep.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198097 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-28 05:54:33 +00:00
Saleem Abdulrasool
b28743fd16 ARMAsmParser: fix typo in comment
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198095 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-28 03:07:12 +00:00
Chandler Carruth
92ffb676af Disable transforms that introduce calls to exp10*() on Linux due to
widespread glibc bugs.

The glibc implementation of exp10 has a very serious precision bug in
version 2.15 (and older versions). This is still very widely used (the
current Ubuntu LTS for example uses it) and so it isn't reasonable to
make transforms that produce these functions. This fixes many
miscompiles introduced when we started transforming pow(10.0, ...) into
exp10, and it may have fixed other latent miscompiles where exp10
provided sufficient precision but exp10f did not.

This is all really horrible. The primary bug has been fixed for over
a year and glibc 2.18 works correctly for the test cases I have, but it
will be 2017 before the LTS using 2.15 is no longer supported by Ubuntu
(and thus reasonable for folks to be relying on). =[ We're either going
to need to live without these optimizations, or find a way to switch
behavior more dynamically than using simply the fact that the OS is
"Linux".

To make matters worse, there appears to be significant testing and
fixing of numerous other bugs in the exp10 family of functions right now
in glibc. While those haven't been causing problems I've seen in the
wild, it gives me concerns that we may need to wait until an even later
release of glibc before we can reliably transform code into exp10.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198093 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-28 02:40:19 +00:00
Eric Christopher
3955d28887 Remove AsmPrinter::needsRelocationsForDwarfStringPool() since it's
just calling into MAI and is only abstracting for a single interface that
we actually need to check in multiple places.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198092 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-28 01:39:17 +00:00
Andrea Di Biagio
b2f47c6a34 Teach DAGCombiner how to fold a SIGN_EXTEND_INREG of a BUILD_VECTOR of
ConstantSDNodes (or UNDEFs) into a simple BUILD_VECTOR.

For example, given the following sequence of dag nodes:

  i32 C = Constant<1>
  v4i32 V = BUILD_VECTOR C, C, C, C
  v4i32 Result = SIGN_EXTEND_INREG V, ValueType:v4i1

The SIGN_EXTEND_INREG node can be folded into a build_vector since
the vector in input is a BUILD_VECTOR of constants.

The optimized sequence is:

  i32 C = Constant<-1>
  v4i32 Result = BUILD_VECTOR C, C, C, C



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198084 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-27 20:20:28 +00:00
David Blaikie
bd75475bfc DebugInfo: Remove dead code, DICompositeType::addMember(DIDescriptor D)
It's no longer necessary to lazily add members to the DICompositeType
member list. Instead any lazy members (special member functions and
member template instantiations) are added to the parent late based on
their context link, the same way that nested types have always been
handled (never being in the member list - just added to the parent DIE
lazily based on context).

Clang's been updated not to use this function anymore as it improves
type unit consistency by never emitting lazy members in type units.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198079 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-27 19:11:52 +00:00
Chandler Carruth
1739b6cc20 Use two variables here rather than reusing (and abusing) one. This is
much more clear to me. I meant to make this change before committing the
original patch, but forgot to merge it in. Sorry.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198069 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-27 04:44:35 +00:00
Chandler Carruth
5ff21b4111 Introduce a simple line-by-line iterator type into the Support library.
This is an iterator which you can build around a MemoryBuffer. It will
iterate through the non-empty, non-comment lines of the buffer as
a forward iterator. It should be small and reasonably fast (although it
could be made much faster if anyone cares, I don't really...).

This will be used to more simply support the text-based sample
profile file format, and is largely based on the original patch by
Diego. I've re-worked the style of it and separated it from the work of
producing a MemoryBuffer from a file which both simplifies the interface
and makes it easier to test.

The style of the API follows the C++ standard naming conventions to fit
in better with iterators in general, much like the Path and FileSystem
interfaces follow standard-based naming conventions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198068 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-27 04:28:57 +00:00
Reid Kleckner
52b162375a TLI: Make exp10* avaiable on Linux/Mac/iOS and unavailable elsewhere
This makes it unavailable on NetBSD, Android, etc.

Patch by Brad Smith!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198056 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-26 19:17:04 +00:00
Joerg Sonnenberger
c01b59658f Recognize armv7a and friends as aliases for armv7-a etc. for the purpose
of architecture naming.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198043 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-26 11:50:28 +00:00
Saleem Abdulrasool
6841860532 ARM IAS: support .even directive
The .even directive aligns content to an evan-numbered address.  This is an ARM
specific directive applicable to any section.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198031 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-26 01:52:28 +00:00
Venkatraman Govindaraju
76a1dca38d [Sparc] Lower and MachineInstr to MC and print assembly using MCInstPrinter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198030 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-26 01:49:59 +00:00
Venkatraman Govindaraju
f3aeebf4c7 [Sparc] Add target specific MCExpr class to handle sparc specific modifiers like %hi, %lo, etc.,
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198029 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-26 00:01:52 +00:00
Venkatraman Govindaraju
dec96eaecf [Sparc] Add MCInstPrinter implementation for SPARC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198028 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-25 23:43:39 +00:00
Simon Atanasyan
f84792ad48 [Mips] Does not take in account 'use-soft-float' attribute's value when
consider to generate stubs for mips16 hard-float mode.

The patch reviewed by Reed Kotler.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198019 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-25 17:00:27 +00:00
Alexander Potapenko
b09f505445 [ASan] Fix the test for __asan_gen_ globals and actually fix http://llvm.org/bugs/show_bug.cgi?id=17976
by setting the correct linkage (as stated in the bug).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198018 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-25 16:46:27 +00:00
Alexander Potapenko
c58d98777c [ASan] Make sure none of the __asan_gen_ global strings end up in the symbol table, add a test.
This should fix http://llvm.org/bugs/show_bug.cgi?id=17976
Another test checking for the global variables' locations and prefixes on Darwin will be committed separately.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198017 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-25 14:22:15 +00:00
Elena Demikhovsky
09a63715ce AVX-512: decoder for AVX-512, made by Alexey Bader.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198013 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-25 11:40:51 +00:00
Zoran Jovanovic
7dc193619e Support for microMIPS load effective address.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198010 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-25 10:14:07 +00:00
Zoran Jovanovic
ae3597c141 Support for microMIPS FPU instructions 2.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198009 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-25 10:09:27 +00:00
Elena Demikhovsky
fab5704cef AVX-512: Result type of scalar SETCC is MVT::i1 for AVX-512.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198008 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-25 10:06:40 +00:00
Hao Liu
0f6ebf1aa3 [AArch64]Fix a problem that the register order of fmls/fmla by element is incorrect.
E.g. the codegen result is 
     fmls v1.2s, v0.2s, v2.s[3]
which is expected to be
     fmls v0.2s, v1.2s, v2.s[3]


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198001 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-25 07:12:34 +00:00
Richard Sandiford
7f7c068388 Fix typo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197986 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-24 15:22:39 +00:00
Richard Sandiford
4c925c60eb [SystemZ] Use interlocked-access 1 instructions for CodeGen
...namely LOAD AND ADD, LOAD AND AND, LOAD AND OR and LOAD AND EXCLUSIVE OR.
LOAD AND ADD LOGICAL isn't really separately useful for LLVM.

I'll look at adding reusing the CC results in new year.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197985 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-24 15:18:04 +00:00
Richard Sandiford
f7e24324ba [SystemZ] Add MC support for interlocked-access 1 instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197984 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-24 15:14:05 +00:00
Elena Demikhovsky
097935cc40 AVX-512: fixed some patterns for MVT::i1
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197981 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-24 14:24:07 +00:00
Hao Liu
dfe4fd9ceb [AArch64]Add patterns to match normal shift nodes: shl, sra and srl.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197969 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-24 09:00:21 +00:00
Kevin Qin
4905226c1c [AArch64 NEON] Fix a bug when lowering BUILD_VECTOR.
DAG.getVectorShuffle() doesn't always return a vector_shuffle node.
If mask is the exact sequence of it's operand(For example, operand_0
is v8i8, and  the mask is 0, 1, 2, 3, 4, 5, 6, 7), it will directly
return that operand. So a check is added here.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197967 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-24 08:16:06 +00:00
Kevin Qin
0e8c1f5ca3 [AArch64 NEON] Fix a pattern match failure with NEON_VDUP.
This failure caused by improper condition when lowering shuffle_vector
to scalar_to_vector. After this patch NEON_VDUP with v1i64 will not
be generated.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197966 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-24 08:11:47 +00:00
Ana Pazos
25f4d51bcb [AArch64] Check fmul node single use in fused multiply patterns
Check for single use of fmul node in fused multiply patterns
to allow generation of fused multiply add/sub instructions.
Otherwise fmul operation ends up being repeated more than
once which does not help peformance on targets with
only one MAC unit, as for example cortex-a53.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197929 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-24 00:47:29 +00:00
Ana Pazos
f5bfe97875 [AArch64 NEON] Fixed fused multiply negate add/sub patterns
The correct pattern matching should be:

- fnmadd is (-Ra) + (-Rn)*Rm  which should be matched as:

  fma (fneg node:$Rn),  node:$Rm, (fneg node:$Ra) and as

  (f32 (fsub (f32 (fneg FPR32:$Ra)), (f32 (fmul FPR32:$Rn, FPR32:$Rm))))

- fnmsub is (-Ra) + Rn*Rm which should be matched as

  fma node:$Rn,  node:$Rm, (fneg node:$Ra) and as

  (f32 (fsub (f32 (fmul FPR32:$Rn, FPR32:$Rm)), FPR32:$Ra))))



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197928 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-24 00:40:10 +00:00
Adrian Prantl
b8a316bfcb Debug info: Add enumerators to the __apple_names accelerator table.
rdar://problem/11516681.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197927 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-23 23:50:20 +00:00
Andrew Trick
c7b0b7dc8f Add support to indvars for optimizing sadd.with.overflow.
Split sadd.with.overflow into add + sadd.with.overflow to allow
analysis and optimization. This should ideally be done after
InstCombine, which can perform code motion (eventually indvars should
run after all canonical instcombines). We want ISEL to recombine the
add and the check, at least on x86.

This is currently under an option for reducing live induction
variables: -liv-reduce. The next step is reducing liveness of IVs that
are live out of the overflow check paths. Once the related
optimizations are fully developed, reviewed and tested, I do expect
this to become default.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197926 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-23 23:31:49 +00:00
Adrian Prantl
7ed2b702a2 Debug info: On ARM ensure that the data sections come before the
(optional) DWARF sections, so compiling with -g does not result in
different code being generated.

rdar://problem/15623193

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197922 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-23 22:24:47 +00:00
Saleem Abdulrasool
8f57233536 ARM: bkpt has an implicit immediate constant 0
The bkpt mnemonic has an implicit immediate constant of 0 unless otherwise
specified.  Add an instruction alias for the unvalued breakpoint mnemonic to
treat it as a 0.  This improves compatibility with GNU AS.

Signed-off-by: Saleem Abdulrasool <compnerd@compnerd.org>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197913 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-23 17:23:58 +00:00
Richard Sandiford
166acc9489 Fix Scalarizer insertion point when replacing PHIs with insertelements
If the Scalarizer scalarized a vector PHI but could not scalarize
all uses of it, it would insert a series of insertelements to reconstruct
the vector PHI value from the scalar ones.  The problem was that it would
emit these insertelements immediately after the PHI, even if there were
other PHIs after it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197909 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-23 14:51:56 +00:00
Richard Sandiford
b09beed540 Fix Scalarizer handling of vector GEPs with multiple index operands
The old code only worked for one index operand.  Also handle "inbounds".


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197908 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-23 14:45:00 +00:00
Kostya Serebryany
26f1d1cbbc [asan] don't unpoison redzones on function exit in use-after-return mode.
Summary:
Before this change the instrumented code before Ret instructions looked like:
  <Unpoison Frame Redzones>
  if (Frame != OriginalFrame) // I.e. Frame is fake
     <Poison Complete Frame>

Now the instrumented code looks like:
  if (Frame != OriginalFrame) // I.e. Frame is fake
     <Poison Complete Frame>
  else
     <Unpoison Frame Redzones>

Reviewers: eugenis

Reviewed By: eugenis

CC: llvm-commits

Differential Revision: http://llvm-reviews.chandlerc.com/D2458

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197907 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-23 14:15:08 +00:00
Kostya Serebryany
1fe014e5fc [asan] produce fewer stores when poisoning stack shadow
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197904 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-23 09:24:36 +00:00
Roman Divacky
1a7ebaaa3d Use r2 when encoding tls on ppc32. Fixes PR18305.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197878 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-22 10:45:37 +00:00
Benjamin Kramer
d1469e0560 Dwarf: Fix a copy-paste bug.
This tag isn't emitted by any compiler at the moment. PR18306.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197877 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-22 10:23:23 +00:00
Elena Demikhovsky
cd70023007 AVX512: SETCC returns i1 for AVX-512 and i8 for all others
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197876 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-22 10:13:18 +00:00
Roman Divacky
e6a866cfa3 Add some comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197875 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-22 09:48:38 +00:00
Alp Toker
cee93e95a4 TableGen: Generate valid identifiers for anonymous records
Backends like OptParserEmitter assume that record names can be used as valid
identifiers.

The period '.' in generated anonymous names broke that assumption, causing a
build-time error and in practice forcing all records to be named.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197869 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-21 18:51:00 +00:00
Mark Lacey
efe6aa1adb Fix typo in assert message: s/load/store
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197846 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-21 00:00:49 +00:00
Yuchen Wu
5f2ddd6a0c BlockFrequencyInfo: Readded getEntryFreq.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197839 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-20 22:11:11 +00:00
Lang Hames
559e456504 ARM AnalyzeBranch should ignore DEBUG_VALUES while analyzing terminators.
Found by inspection by Julien Lerouge. Thanks Julian!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197833 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-20 20:27:51 +00:00