Commit Graph

62665 Commits

Author SHA1 Message Date
Nadav Rotem
6611eaa32f SLPVectorizer: change the order in which we search for vectorization candidates. Do stores first and PHIs second.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186277 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-14 06:15:46 +00:00
Tobias Grosser
83d63f8a4d Fix build by replacing '>>' with '> >'
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186276 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-14 06:12:01 +00:00
Craig Topper
a0ec3f9b7b Use SmallVectorImpl& instead of SmallVector to avoid repeating small vector size.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186274 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-14 04:42:23 +00:00
Andrew Trick
6f71dd765a Remove a bunch of old SCEVExpander FIXME's for preserving NoWrap.
The great thing about the SCEVAddRec No-Wrap flag (unlike nsw/nuw) is
that is can be preserved while normalizing (reassociating and
factoring).

The bad thing is that is can't be tranfered back to IR, which is one
of the reasons I don't like the concept of SCEVExpander.

Sorry, I can't think of a direct way to test this, which is why these
were FIXMEs for so long. I just think it's a good time to finally
clean it up.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186273 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-14 03:10:08 +00:00
Andrew Trick
409443b1c6 Teach indvars to generate nsw/nuw flags when widening an induction variable.
Fixes PR16600.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186272 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-14 02:50:07 +00:00
Arnold Schwaighofer
ae4e1a94e3 LoopVectorizer: Disallow reductions whose header phi is used outside the loop
If an outside loop user of the reduction value uses the header phi node we
cannot just reduce the vectorized phi value in the vector code epilog because
we would loose VF-1 reductions.

lp:
  p = phi (0, lv)
  lv = lv + 1
  ...
  brcond , lp, outside

outside:
  usr = add 0, p

(Say the loop iterates two times, the value of p coming out of the loop is one).

We cannot just transform this to:

vlp:
  p = phi (<0,0>, lv)
  lv = lv + <1,1>
  ..
  brcond , lp, outside

outside:
  p_reduced = p[0] + [1];
  usr = add 0, p_reduced

(Because the original loop iterated two times the vectorized loop would iterate
one time, but p_reduced ends up being zero instead of one).

We would have to execute VF-1 iterations in the scalar remainder loop in such
cases. For now, just disable vectorization.

PR16522

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186256 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-13 19:09:29 +00:00
Joerg Sonnenberger
0a14e71232 Reduce large list of macros to the primary platform macros. Distingiush
between ELF (Linux, FreeBSD, NetBSD) and OSX as platform for the
assembler dialect.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186252 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-13 17:59:55 +00:00
Craig Topper
6c64fba633 Pass SmallVector by const reference instead of by value.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186243 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-13 07:43:40 +00:00
Andrew Trick
9a26e1320b LoopVectorize fix: LoopInfo must be valid when invoking utils like SCEVExpander.
In general, one should always complete CFG modifications first, update
CFG-based analyses, like Dominatores and LoopInfo, then generate
instruction sequences.

LoopVectorizer was creating a new loop, calling SCEVExpander to
generate checks, then updating LoopInfo. I just changed the order.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186241 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-13 06:20:06 +00:00
Nick Lewycky
75681bb302 Add a microoptimization for urem.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186235 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-13 01:16:47 +00:00
Chandler Carruth
12c74dc2c2 Revert commit r186217 -- this is breaking bots:
http://lab.llvm.org:8013/builders/clang-x86_64-darwin11-nobootstrap-RAincremental/builds/4328

Original commit log:
  Use the function attributes to pass along the stack protector buffer
  size.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186234 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-13 01:00:17 +00:00
Nick Lewycky
8a23270ce6 Fix logic error optimizing "icmp pred (urem X, Y), Y" where pred is signed.
Fixes PR16605.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186229 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-12 23:42:57 +00:00
Akira Hatanaka
434c0bd2a5 [mips] Implement MipsTargetMachine::getInstrItineraryData().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186227 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-12 23:33:22 +00:00
JF Bastien
1b6f5a29ab Fix ARM paired GPR COPY lowering
ARM paired GPR COPY was being lowered to two MOVr without CC. This
patch puts the CC back.

My test is a reduction of the case where I encountered the issue,
64-bit atomics use paired GPRs.

The issue only occurs with selectionDAG, FastISel doesn't encounter it
so I didn't bother calling it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186226 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-12 23:33:03 +00:00
Joey Gouly
ebe1147722 Fix a crash in EvaluateInDifferentElementOrder where it would generate an
undef vector of the wrong type.

LGTM'd by Nick Lewycky on IRC.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186224 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-12 23:08:06 +00:00
Akira Hatanaka
ae24f7d3c6 [mips] Add instruction itinerary classes for mult, seb and slt instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186222 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-12 22:43:20 +00:00
Bill Wendling
8a50013cc2 Use the function attributes to pass along the stack protector buffer size.
Now that we have robust function attributes, don't use a command line option to
specify the stack protecto buffer size.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186217 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-12 22:25:20 +00:00
Andrew Trick
16404cc817 LFTR improvement to avoid truncation.
This is a reimplemntation of the patch originally in r186107.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186215 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-12 22:08:48 +00:00
Andrew Trick
807e6c71a8 Cleanup LFTR logic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186214 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-12 22:08:44 +00:00
Andrew Trick
7137909128 Cleanup: rename a variable to make the logic easier to follow.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186213 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-12 22:08:41 +00:00
Eric Christopher
adde9da01c Remove extraneous braces.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186212 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-12 22:08:24 +00:00
Rafael Espindola
34ac52d937 Change llvm-ar to use lib/Object.
This fixes two bugs is lib/Object that the use in llvm-ar found:
* In OS X created archives, the name can be padded with nulls. Strip them.
* In the constructor, remember the first non special member and use that in
  begin_children. This makes sure we skip all special members, not just the
  first one.

The change to llvm-ar itself consist of
* Using lib/Object for reading archives instead of ArchiveReader.cpp.
* Writing the modified archive directly, instead of creating an in memory
  representation.

The old Archive library was way more general than what is needed, as can
be seen by the diffstat of this patch.

Having llvm-ar using lib/Object now opens the way for creating regular symbol
tables for both native objects and bitcode files so that we can use those
archives for LTO.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186197 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-12 20:21:39 +00:00
Benjamin Kramer
795740b591 R600: Remove unsafe type punning. No intended functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186196 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-12 20:18:05 +00:00
Arnold Schwaighofer
7251a75f6e X86 cost model: Add cost for vectorized gather/scather
radar://14351991

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186189 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-12 19:16:07 +00:00
Arnold Schwaighofer
4a1c764264 ARM cost model: Add cost for gather/scather
Fixes a 35% degradation compared to unvectorized code in
MiBench/automotive-susan and an equally serious regression on a private
image processing benchmark.

radar://14351991

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186188 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-12 19:16:04 +00:00
Arnold Schwaighofer
c0a11edba6 TargetTransformInfo: address calculation parameter for gather/scather
Address calculation for gather/scather in vectorized code can incur a
significant cost making vectorization unbeneficial. Add infrastructure to add
cost.
Tests and cost model for targets will be in follow-up commits.

radar://14351991

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186187 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-12 19:16:02 +00:00
Tom Stellard
c9c322cc39 R600/SI: Add support for f64 kernel arguments
Patch by: Niels Ole Salscheider

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186182 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-12 18:15:26 +00:00
Tom Stellard
97781281ca R600/SI: Implement select and compares for SI
Patch by: Niels Ole Salscheider

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186181 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-12 18:15:19 +00:00
Tom Stellard
513fc45629 R600/SI: Add fsqrt pattern for SI
Patch by: Niels Ole Salscheider

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186180 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-12 18:15:13 +00:00
Tom Stellard
d2442c10f9 R600/SI: Add double precision fsub pattern for SI
Patch by: Niels Ole Salscheider

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186179 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-12 18:15:08 +00:00
Tom Stellard
54453c11b4 R600/SI: SI support for 64bit ConstantFP
Patch by: Niels Ole Salscheider

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186178 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-12 18:15:02 +00:00
Tom Stellard
68e1328662 R600/SI: Add initial double precision support for SI
Patch by: Niels Ole Salscheider

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186177 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-12 18:14:56 +00:00
Benjamin Kramer
b619dd5d5b X86: Shrink certain forms of movsx.
In particular:
movsbw %al, %ax   --> cbtw
movswl %ax, %eax  --> cwtl
movslq %eax, %rax --> cltq

According to Intel's manual those have the same performance characteristics but
come with a smaller encoding.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186174 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-12 18:06:44 +00:00
Stephen Lin
fff967358b X86: fold SSE2/AVX2 logical shift by immediate amount into zero vector when possible
Patch by Andrea Di Biagio


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186165 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-12 15:31:36 +00:00
Rafael Espindola
5e102c6c48 Don't reject an empty archive.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186159 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-12 13:32:28 +00:00
Chandler Carruth
6f0ec20e8f Revert "indvars: Improve LFTR by eliminating truncation when comparing
against a constant."

This reverts commit r186107. It didn't handle wrapping arithmetic in the
loop correctly and thus caused the following C program to count from
0 to UINT64_MAX instead of from 0 to 255 as intended:

  #include <stdio.h>
  int main() {
    unsigned char first = 0, last = 255;
    do { printf("%d\n", first); } while (first++ != last);
  }

Full test case and instructions to reproduce with just the -indvars pass
sent to the original review thread rather than to r186107's commit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186152 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-12 11:18:55 +00:00
Vladimir Medic
dd51a0c1e0 Add support for Mips break and syscall insructions. The corresponding test cases are added.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186151 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-12 09:25:35 +00:00
Richard Sandiford
9bcad42c3a [SystemZ] Optimize sign-extends of vector setccs
Normal (sext (setcc ...)) sequences are optimised into
(select_cc ..., -1, 0) by DAGCombiner::visitSIGN_EXTEND.
However, this is deliberately not done for vectors, and after
vector type legalization we have (sext_inreg (setcc ...)) instead.

I wondered about trying to extend DAGCombiner to handle this case too,
but it seemed to be a loss on some other targets I tried, even those for
which SETCC isn't "legal" and SELECT_CC is.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186149 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-12 09:17:10 +00:00
Richard Sandiford
5e00954197 [SystemZ] Fix parsing of inline asm registers
GPR and FPR constraints like "{r2}" and "{f2}" weren't handled correctly
because the name-to-regno mapping depends on the value type and
(because of that) the internal names in RegStrings are not the
same as the AsmName.

CC constraints like "{cc}" didn't work either because there was no
associated register class.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186148 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-12 09:08:12 +00:00
Richard Sandiford
6cf3cfa0ab [SystemZ] Improve spilling of LGDR and LDGR
If the source of these instructions is spilled we should load the destination.
If the destination is spilled we should store the source.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186147 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-12 08:37:17 +00:00
Shuxin Yang
a10369920f Stylistic change.
Thank Nick for figuring out these problems.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186146 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-12 07:25:38 +00:00
Nadav Rotem
523cd85b50 SLPVectorizer: Sink and enable CSE for ExtractElements.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186145 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-12 06:09:24 +00:00
Charles Davis
ac226bbf45 Target/X86: Add explicit Win64 and System V/x86-64 calling conventions.
Summary:
This patch adds explicit calling convention types for the Win64 and
System V/x86-64 ABIs. This allows code to override the default, and use
the Win64 convention on a target that wants to use SysV (and
vice-versa). This is needed to implement the `ms_abi` and `sysv_abi` GNU
attributes.

Reviewers:

CC:

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186144 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-12 06:02:35 +00:00
NAKAMURA Takumi
99a8b54840 Windows/TimeValue.inc: Mute prefixed '0' on %d to emulate %e.
It fixes compatibility in llvm/test/Object/archive-toc.test.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186142 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-12 02:13:03 +00:00
Manman Ren
da07e9df84 PEI: refactor replaceFrameIndices(MF) to call replaceFrameIndices(BB).
replaceFrameIndices(MF) will iterate over the BBs and call
replaceFrameIndices(BB). No functionality change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186141 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-12 00:37:01 +00:00
Nadav Rotem
931b861e3d SLPVectorize: Replace the code that checks for vectorization candidates in successor blocks with code that scans PHINodes.
Before we could vectorize PHINodes scanning successors was a good way of finding candidates. Now we can vectorize the phinodes which is simpler.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186139 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-12 00:04:18 +00:00
Nadav Rotem
d6f0c34273 Remove an argument that we dont use anymore.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186116 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-11 20:56:13 +00:00
Hal Finkel
e2ff00e117 PPC: Add some missing V_SET0 patterns
We had patterns to match v4i32 immAllZerosV -> V_SET0, but not patterns for
v8i16 (which occurs in the test case) or v16i8. The same was true for
V_SETALLONES (so I added the associated patterns for those as well).

Another bug found by llvm-stress.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186108 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-11 17:43:32 +00:00
Andrew Trick
53b28f8623 indvars: Improve LFTR by eliminating truncation when comparing against a constant.
Patch by Michele Scandale!

Adds a special handling of the case where, during the loop exit
condition rewriting, the exit value is a constant of bitwidth lower
than the type of the induction variable: instead of introducing a
trunc operation in order to match correctly the operand types, it
allows to convert the constant value to an equivalent constant,
depending on the initial value of the induction variable and the trip
count, in order have an equivalent comparison between the induction
variable and the new constant.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186107 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-11 17:08:59 +00:00
Hal Finkel
53c86db25b PPCDAGToDAGISel::isRunOfOnes should return false on zero
This fixes a bug (found by csmith) at -O0 where we attempt to create a RLWIMI
with an out-of-range operand. Most uses of the isRunOfOnes function are guarded
by a condition that the value is not zero. This was not true in two places, and
in both places a zero input would result in an out-of-rage MB value (= 32).

To fix this, isRunOfOnes returns false on a zero input (and I've remove one
now-redundant guard).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186101 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-11 16:31:51 +00:00