Commit Graph

274 Commits

Author SHA1 Message Date
Jeff Cohen
ea3e5e56fd Eliminate tabs and trailing spaces
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21441 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-22 04:13:13 +00:00
Misha Brukman
3da94aec4d Remove trailing whitespace
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21428 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-22 00:00:37 +00:00
Chris Lattner
a6dcd0ef73 ignore generated files
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21362 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-19 15:34:36 +00:00
Chris Lattner
6e19b5b792 fix bogus warning
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21361 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-19 15:32:30 +00:00
Chris Lattner
7dda395004 Major change to tblgen: instead of resolving values every time a class is
finished up, only resolve fully when the def is defined.  This allows things
to be changed and all uses to be propagated through.  This implements
TableGen/LazyChange.td and fixes TemplateArgRename.td in the process.

None of the .td files used in LLVM backends are changed at all by this
patch.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21344 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-19 03:36:21 +00:00
Chris Lattner
577057faaa implementing shifting of literal integers
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21336 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-19 01:17:35 +00:00
Chris Lattner
b9266f880a Add initial lexer and parser support for shifting values. Every use of this
will lead to it being rejected though.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21335 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-19 01:11:03 +00:00
Chris Lattner
131ca38c60 Minor fix.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19761 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-22 20:59:38 +00:00
Chris Lattner
38c0751a12 This is the final big of factoring. This shares cases in suboperand
differences, which means that identical instructions (after stripping off
the first literal string) do not run any different code at all.  On the X86,
this turns this code:

    switch (MI->getOpcode()) {
    case X86::ADC32mi: printOperand(MI, 4, MVT::i32); break;
    case X86::ADC32mi8: printOperand(MI, 4, MVT::i8); break;
    case X86::ADC32mr: printOperand(MI, 4, MVT::i32); break;
    case X86::ADD32mi: printOperand(MI, 4, MVT::i32); break;
    case X86::ADD32mi8: printOperand(MI, 4, MVT::i8); break;
    case X86::ADD32mr: printOperand(MI, 4, MVT::i32); break;
    case X86::AND32mi: printOperand(MI, 4, MVT::i32); break;
    case X86::AND32mi8: printOperand(MI, 4, MVT::i8); break;
    case X86::AND32mr: printOperand(MI, 4, MVT::i32); break;
    case X86::CMP32mi: printOperand(MI, 4, MVT::i32); break;
    case X86::CMP32mr: printOperand(MI, 4, MVT::i32); break;
    case X86::MOV32mi: printOperand(MI, 4, MVT::i32); break;
    case X86::MOV32mr: printOperand(MI, 4, MVT::i32); break;
    case X86::OR32mi: printOperand(MI, 4, MVT::i32); break;
    case X86::OR32mi8: printOperand(MI, 4, MVT::i8); break;
    case X86::OR32mr: printOperand(MI, 4, MVT::i32); break;
    case X86::ROL32mi: printOperand(MI, 4, MVT::i8); break;
    case X86::ROR32mi: printOperand(MI, 4, MVT::i8); break;
    case X86::SAR32mi: printOperand(MI, 4, MVT::i8); break;
    case X86::SBB32mi: printOperand(MI, 4, MVT::i32); break;
    case X86::SBB32mi8: printOperand(MI, 4, MVT::i8); break;
    case X86::SBB32mr: printOperand(MI, 4, MVT::i32); break;
    case X86::SHL32mi: printOperand(MI, 4, MVT::i8); break;
    case X86::SHLD32mrCL: printOperand(MI, 4, MVT::i32); break;
    case X86::SHR32mi: printOperand(MI, 4, MVT::i8); break;
    case X86::SHRD32mrCL: printOperand(MI, 4, MVT::i32); break;
    case X86::SUB32mi: printOperand(MI, 4, MVT::i32); break;
    case X86::SUB32mi8: printOperand(MI, 4, MVT::i8); break;
    case X86::SUB32mr: printOperand(MI, 4, MVT::i32); break;
    case X86::TEST32mi: printOperand(MI, 4, MVT::i32); break;
    case X86::TEST32mr: printOperand(MI, 4, MVT::i32); break;
    case X86::TEST8mi: printOperand(MI, 4, MVT::i8); break;
    case X86::XCHG32mr: printOperand(MI, 4, MVT::i32); break;
    case X86::XOR32mi: printOperand(MI, 4, MVT::i32); break;
    case X86::XOR32mi8: printOperand(MI, 4, MVT::i8); break;
    case X86::XOR32mr: printOperand(MI, 4, MVT::i32); break;
    }

into this:

    switch (MI->getOpcode()) {
    case X86::ADC32mi:
    case X86::ADC32mr:
    case X86::ADD32mi:
    case X86::ADD32mr:
    case X86::AND32mi:
    case X86::AND32mr:
    case X86::CMP32mi:
    case X86::CMP32mr:
    case X86::MOV32mi:
    case X86::MOV32mr:
    case X86::OR32mi:
    case X86::OR32mr:
    case X86::SBB32mi:
    case X86::SBB32mr:
    case X86::SHLD32mrCL:
    case X86::SHRD32mrCL:
    case X86::SUB32mi:
    case X86::SUB32mr:
    case X86::TEST32mi:
    case X86::TEST32mr:
    case X86::XCHG32mr:
    case X86::XOR32mi:
    case X86::XOR32mr: printOperand(MI, 4, MVT::i32); break;
    case X86::ADC32mi8:
    case X86::ADD32mi8:
    case X86::AND32mi8:
    case X86::OR32mi8:
    case X86::ROL32mi:
    case X86::ROR32mi:
    case X86::SAR32mi:
    case X86::SBB32mi8:
    case X86::SHL32mi:
    case X86::SHR32mi:
    case X86::SUB32mi8:
    case X86::TEST8mi:
    case X86::XOR32mi8: printOperand(MI, 4, MVT::i8); break;
    }

After this, the generated asmwriters look pretty much as though they were
generated by hand.  This shrinks the X86 asmwriter.inc files from 55101->39669
and 55429->39551 bytes each, and PPC from 16766->12859 bytes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19760 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-22 20:31:17 +00:00
Chris Lattner
f876668518 Implement *even more* factoring. In particular, if all of the instruction
strings starts out with a constant string, we emit the string first, using
a table lookup (instead of a switch statement).

Because this is usually the opcode portion of the asm string, the differences
between the instructions have now been greatly reduced.  This allows many
more case statements to be grouped together.

This patch also allows instruction cases to be grouped together when the
instruction patterns are exactly identical (common after the opcode string
has been ripped off), and when the differing operand is a MachineInstr
operand that needs to be formatted.

The end result of this is a mean and lean generated AsmPrinter!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19759 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-22 19:22:23 +00:00
Chris Lattner
d648867173 Refactor code for numbering instructions into CodeGenTarget.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19758 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-22 18:58:51 +00:00
Jeff Cohen
615ed993e1 Fix VC++ compilation error
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19757 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-22 18:50:10 +00:00
Chris Lattner
870c016934 Implement factoring of instruction pattern strings. In particular, instead of
emitting code like this:

  case PPC::ADD: O  << "add ";  printOperand(MI, 0, MVT::i64); O  << ", ";  prin
tOperand(MI, 1, MVT::i64); O  << ", ";  printOperand(MI, 2, MVT::i64); O  << '\n
'; break;
  case PPC::ADDC: O  << "addc ";  printOperand(MI, 0, MVT::i64); O  << ", ";  pr
intOperand(MI, 1, MVT::i64); O  << ", ";  printOperand(MI, 2, MVT::i64); O  << '
\n'; break;
  case PPC::ADDE: O  << "adde ";  printOperand(MI, 0, MVT::i64); O  << ", ";  pr
intOperand(MI, 1, MVT::i64); O  << ", ";  printOperand(MI, 2, MVT::i64); O  << '
\n'; break;
...

Emit code like this:

  case PPC::ADD:
  case PPC::ADDC:
  case PPC::ADDE:
  ...
    switch (MI->getOpcode()) {
    case PPC::ADD: O << "add "; break;
    case PPC::ADDC: O << "addc "; break;
    case PPC::ADDE: O << "adde "; break;
    ...
    }
    printOperand(MI, 0, MVT::i64);
    O << ", ";
    printOperand(MI, 1, MVT::i64);
    O << ", ";
    printOperand(MI, 2, MVT::i64);
    O << "\n";
    break;

This shrinks the PPC asm writer from 24785->15205 bytes (even though the new
asmwriter has much more whitespace than the old one), and the X86 printers shrink
quite a bit too.  The important implication of this is that GCC no longer hits swap
when building the PPC backend in optimized mode.  Thus this fixes PR448.

-Chris


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19755 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-22 18:38:13 +00:00
Chris Lattner
f11ad9ef46 Fix the ::: problem
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19754 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-22 18:18:59 +00:00
Chris Lattner
5765dba5ce Minor refactoring, no functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19753 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-22 17:40:38 +00:00
Chris Lattner
b0b55e74a0 Seperate asmstring parsing from emission. This allows the code to be simpler
and more understandable.  It also allows us to do simple things like fold
consequtive literal strings together.  For example, instead of emitting this
for the X86 backend:

  O  << "adc" << "l" << " ";

we now generate this:

  O << "adcl ";

*whoa* :)

This shrinks the X86 asmwriters from 62729->58267 and 65176->58644 bytes
for the intel/att asm writers respectively.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19749 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-22 17:32:42 +00:00
Andrew Lenharth
2202bfa5a3 make double-dollar properly escape asmstrings
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19740 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-22 00:35:22 +00:00
Chris Lattner
aad75aa1a2 Expose isConvertibleToThreeAddress and isCommutable bits to the code generator.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19243 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-02 02:29:04 +00:00
Reid Spencer
ead87b6712 For PR387:
Make this compile without warning when -Woverloaded-virtual is used.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18588 91177308-0d34-0410-b5e6-96231b3b80d8
2004-12-06 23:42:37 +00:00
Reid Spencer
227b6d00dd Fix usage of changed function prototype
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17798 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-14 22:30:54 +00:00
Chris Lattner
141e3fd81d Quiet VC++ warnings
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17484 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-05 04:50:59 +00:00
Reid Spencer
cc2d1e25f3 Internalize variable names to prevent recursive assignment. Cleanup docs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17359 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-30 09:19:36 +00:00
Reid Spencer
6cb21d443e Change Library Names Not To Conflict With Others When Installed
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17286 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-27 23:18:45 +00:00
Chris Lattner
1fca5ff62b Convert 'struct' to 'class' in various places to adhere to the coding standards
and work better with VC++.  Patch contributed by Morten Ofstad!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17281 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-27 16:14:51 +00:00
Chris Lattner
89e0f74094 Make VC happier, patch contributed by Morten Ofstad
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17179 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-23 04:58:50 +00:00
Reid Spencer
40a955ab05 We're not doing automake any more
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17168 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-22 21:02:23 +00:00
Reid Spencer
cac731ecbe We won't use automake
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17155 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-22 03:35:04 +00:00
Reid Spencer
86d341b204 Initial automake generated Makefile template
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17136 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-18 23:55:41 +00:00
Misha Brukman
28eefa5464 * Factor out (into new fn) a loop emitting operand shifts into the instruction
* Reverse instruction bit components for a LittleEndian-style encoding
* Fix some comments and spacing


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16975 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-14 05:53:01 +00:00
Misha Brukman
35e83cc970 * Add option to read isLittleEndianEncoding for InstrInfo classes
* Doxygen-ify some function comments


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16974 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-14 05:50:43 +00:00
Chris Lattner
4523709d8e Patch to make VS happier, thanks to Morten Ofstad for pointing this out.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16956 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-13 15:25:46 +00:00
Reid Spencer
36a7d906c3 Updates for changes in Makefile rules.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16951 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-13 11:48:50 +00:00
Chris Lattner
9d990a01a9 Don't emit the method into the llvm namespace, let the #includer decide where it goes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16934 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-12 16:21:18 +00:00
Reid Spencer
9f41a5fe85 Initial version of automake Makefile.am file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16885 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-10 20:43:57 +00:00
Misha Brukman
cf4f810372 Properly `quote' names, and don't forget to add the ending quote!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16838 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-08 14:59:05 +00:00
Chris Lattner
953c6fe112 Correctly parse variant notation
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16637 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-03 20:19:02 +00:00
Chris Lattner
560a79f1ea Add initial support for variants. This just parses the new format, no
functionality is added


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16636 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-03 19:34:31 +00:00
Misha Brukman
231684adb4 #include DataTypes.h to compile on MinGW, patch by Henrik Bach.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16616 91177308-0d34-0410-b5e6-96231b3b80d8
2004-09-30 18:27:39 +00:00
Nate Begeman
cdd66b524f Add support for the isLoad and isStore flags, needed by the instruction scheduler
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16554 91177308-0d34-0410-b5e6-96231b3b80d8
2004-09-28 21:01:45 +00:00
Chris Lattner
5b71d3af35 Turn the hasDelaySlot flag into the M_DELAY_SLOT_FLAG
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16553 91177308-0d34-0410-b5e6-96231b3b80d8
2004-09-28 18:38:01 +00:00
Chris Lattner
b228657acc Revamp the Register class, and allow the use of the RegisterGroup class to
specify aliases directly in register definitions.

Patch contributed by Jason Eckhardt!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16330 91177308-0d34-0410-b5e6-96231b3b80d8
2004-09-14 04:17:02 +00:00
Reid Spencer
40b062fdf8 Clean up some "clean:" targets so they use $(VERB) and don't print anything
by default, like every other "clean" target in LLVM.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16161 91177308-0d34-0410-b5e6-96231b3b80d8
2004-09-03 23:19:53 +00:00
Reid Spencer
23f7d5131c Make tblgen's exception handling a little more robust by printing the
program name and also catching ...


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16160 91177308-0d34-0410-b5e6-96231b3b80d8
2004-09-03 23:17:54 +00:00
Reid Spencer
551ccae044 Changes For Bug 352
Move include/Config and include/Support into include/llvm/Config,
include/llvm/ADT and include/llvm/Support. From here on out, all LLVM
public header files must be under include/llvm/.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16137 91177308-0d34-0410-b5e6-96231b3b80d8
2004-09-01 22:55:40 +00:00
Reid Spencer
0172d09b64 Link with LLVMsystem.a for operating system independence.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16094 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-29 19:31:19 +00:00
Reid Spencer
debb5f085a RemoveFileOnErrorSignal is now in the llvm::sys namespace. Adjust
accordingly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16093 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-29 19:30:41 +00:00
Chris Lattner
037d732e09 Alignment is now in bits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15976 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-21 20:15:25 +00:00
Chris Lattner
98df506e71 Make alignment be in bits, just like size is
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15969 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-21 20:00:36 +00:00
Chris Lattner
987b5cc557 Infer the spillsize/alignment of a register based on the register classes
it is embedded into.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15966 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-21 19:42:03 +00:00
Chris Lattner
5767775505 Support "Methods" in register classes in CodgeGenRegisterClass
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15965 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-21 19:21:21 +00:00