10 Commits

Author SHA1 Message Date
Robert Khasanov
ec4188bad7 [AVX512] Added load/store instructions to Register2Memory opcode tables.
Added lowering tests for load/store.

Reviewed by Elena Demikhovsky <elena.demikhovsky@intel.com>


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214972 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-06 15:40:34 +00:00
Chandler Carruth
1d73b6f8a6 [x86] Rip out some broken test cases for avx512 i1 store support.
It isn't reasonable to test storing things using undef pointers --
storing through those is at best "good luck" and really should be
transformed to "unreachable". Random changes in the combiner can
randomly break these tests for no good reason. I'm following up on the
original commit regarding the right long-term strategy here.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213810 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-23 22:29:19 +00:00
Elena Demikhovsky
b84cc10c3c AVX-512: store and truncstore for i1 values
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206897 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-22 14:13:10 +00:00
Elena Demikhovsky
0d5d656524 AVX-512: insert element to mask vector; store i1 data
Implemented INSERT_VECTOR_ELT operation for v16i1 and v8i1 vectors;
Implemented "store" for i1 type


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205850 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-09 12:37:50 +00:00
Elena Demikhovsky
3bf51cf302 AVX-512: Removed "z" suffix from AVX-512 instructions, since it is incompatible with GCC.
I moved a test from avx512-vbroadcast-crash.ll to avx512-vbroadcast.ll
I defined HasAVX512 predicate as AssemblerPredicate. It means that you should invoke llvm-mc with "-mcpu=knl" to get encoding for AVX-512 instructions. I need this to let AsmMatcher to set different encoding for AVX and AVX-512 instructions that have the same mnemonic and operands (all scalar instructions).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197041 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-11 14:31:04 +00:00
Elena Demikhovsky
ea79feb1a8 AVX-512: aligned / unaligned load and store for 512-bit integer vectors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193156 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-22 09:19:28 +00:00
Elena Demikhovsky
c699417f11 AVX-512: fixed a bug in getLoadStoreRegOpcode() for AVX-512 target
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191818 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-02 12:20:42 +00:00
Elena Demikhovsky
c8d0d00781 AVX-512: Added X86vzmovl patterns
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191733 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-01 08:38:02 +00:00
Elena Demikhovsky
38cd21a3e9 AVX-512: Added more patterns for VMOVSS, VMOVSD, VMOVD, VMOVQ
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188786 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-20 11:00:29 +00:00
Elena Demikhovsky
3491d67d3a AVX-512: Added VMOVD, VMOVQ, VMOVSS, VMOVSD instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188637 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-18 13:08:57 +00:00