Sean Callanan
95a5a7d570
Fixed encodings for invlpg, invept, and invvpid.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96065 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-13 01:48:34 +00:00
Daniel Dunbar
e9a60eb498
MC/AsmParser: Attempt to constant fold expressions up-front. This ensures we avoid fixups for obvious cases like '-(16)'.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96064 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-13 01:28:07 +00:00
Johnny Chen
08b85f371e
Added a bunch of saturating add/subtract instructions for disassembly only.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96063 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-13 01:21:01 +00:00
Chris Lattner
f068304b1f
rip out the 'heinous' x86 MCCodeEmitter implementation.
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We still have the templated X86 JIT emitter, *and* the
almost-copy in X86InstrInfo for getting instruction sizes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96059 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-13 00:49:29 +00:00
Chris Lattner
a599de2410
remove special cases for vmlaunch, vmresume, vmxoff, and swapgs
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fix swapgs to be spelled right.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96058 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-13 00:41:14 +00:00
Bob Wilson
bf9b221c00
Besides removing phi cycles that reduce to a single value, also remove dead
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phi cycles. Adjust a few tests to keep dead instructions from being optimized
away. This (together with my previous change for phi cycles) fixes Apple
radar 7627077.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96057 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-13 00:31:44 +00:00
Dan Gohman
39125d8ef9
Override dominates and properlyDominates for SCEVAddRecExpr, as a
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SCEVAddRecExpr doesn't necessarily dominate blocks merely dominated
by all of its operands. This fixes an abort compiling 403.gcc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96056 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-13 00:19:39 +00:00
Daniel Dunbar
9c60f534cb
MC/X86: Push immediate operands as immediates not expressions when possible.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96055 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-13 00:17:21 +00:00
Jeffrey Yasskin
cfd3072841
Make PassRegistrar thread-safe since it can be modified by code running in
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separate LLVMContexts.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96051 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-13 00:03:17 +00:00
Chris Lattner
eaca5fa8e6
Remove special cases for [LM]FENCE, MONITOR and MWAIT from
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encoder and decoder by using new MRM_ forms.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96048 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-12 23:54:57 +00:00
Chris Lattner
ca3eeb33a8
add some disassemble testcases for weird instructions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96045 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-12 23:46:48 +00:00
Sean Callanan
9492be8d10
Reworked the Intel disassembler to support instructions
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whose opcodes extend into the ModR/M field using the
Form field of the instruction rather than by special
casing each instruction. Commented out the special
casing of VMCALL, which is the first instruction to use
this special form. While I was in the neighborhood,
added a few comments for people modifying the Intel
disassembler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96043 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-12 23:39:46 +00:00
Chris Lattner
4a2e5edb94
implement the rest of correct x86-64 encoder support for
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rip-relative addresses, and add a testcase.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96040 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-12 23:24:09 +00:00
Dale Johannesen
15ce1d71f1
Add the problem I just hacked around in 96015/96020.
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The solution there produces correct code, but is seriously
deficient in several ways.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96039 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-12 23:16:24 +00:00
Chris Lattner
86020e4628
give MCCodeEmitters access to the current MCContext.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96038 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-12 23:12:47 +00:00
Jeffrey Yasskin
3174f6703e
Make JIT::runFunction clean up the generated stub function.
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Patch by Shivram K!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96037 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-12 23:05:31 +00:00
Chris Lattner
835acabce1
implement infrastructure to support fixups for rip-rel
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addressing. This isn't complete because I need an MCContext
to generate new MCExprs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96036 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-12 23:00:36 +00:00
Johnny Chen
f4d81051ff
Add YIELD, WFE, WFI, and SEV instructions for disassembly only.
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Plus add two formats: MiscFrm and ThumbMiscFrm. Some of the for disassembly
only instructions are changed from Pseudo Format to MiscFrm Format.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96032 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-12 22:53:19 +00:00
Chris Lattner
1e35d0e923
pull the rip-relative addressing mode case up early.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96031 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-12 22:47:55 +00:00
Chris Lattner
9cc48eb897
fixme resolved!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96029 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-12 22:39:06 +00:00
Chris Lattner
cf65339b52
start producing reloc_pcrel_4byte/reloc_pcrel_1byte for calls.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96028 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-12 22:36:47 +00:00
Bob Wilson
252968a76f
Fix a comment typo.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96027 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-12 22:34:54 +00:00
Chris Lattner
a0331199fc
enhance the immediate field encoding to know whether the immediate
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is pc relative or not, mark call and branches as pcrel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96026 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-12 22:27:07 +00:00
Evan Cheng
3f7aa79c2a
Load / store multiple instructions cannot load / store sp. Sorry, can't come up with a reasonable test case.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96023 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-12 22:17:21 +00:00
Dale Johannesen
ee25bc2942
This should have gone in with 26015, see comments there.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96020 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-12 22:00:40 +00:00
Johnny Chen
83498e55e2
Add halfword multiply accumulate long SMLALBB/BT/TB/TT for disassembly only.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96019 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-12 21:59:23 +00:00
Chris Lattner
42cefa1ea3
doxygenize some comments, patch by Peter Collingbourne!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96018 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-12 21:54:28 +00:00
Dale Johannesen
c12da8d30a
When save/restoring CR at prolog/epilog, in a large
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stack frame, the prolog/epilog code was using the same
register for the copy of CR and the address of the save slot. Oops.
This is fixed here for Darwin, sort of, by reserving R2 for this case.
A better way would be to do the store before the decrement of SP,
which is safe on Darwin due to the red zone.
SVR4 probably has the same problem, but I don't know how to fix it;
there is no red zone and R2 is already used for something else.
I'm going to leave it to someone interested in that target.
Better still would be to rewrite the CR-saving code completely;
spilling each CR subregister individually is horrible code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96015 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-12 21:35:34 +00:00
Chris Lattner
fdfeb6976f
Add support for a union type in LLVM IR. Patch by Talin!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96011 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-12 20:49:41 +00:00
Johnny Chen
b3e1bf54b2
Add SWP (Swap) and SWPB (Swap Byte) for disassembly only.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96010 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-12 20:48:24 +00:00
Evan Cheng
3922a9ba84
Also recognize armv6t2-* and armv5te-* triplets.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96008 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-12 20:39:35 +00:00
Dan Gohman
0a799ab158
Fix a case of mismatched types in an Add that turned up in 447.dealII.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96007 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-12 20:39:25 +00:00
Evan Cheng
0f8868b171
Add ARM bitcode file magic.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96006 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-12 20:13:44 +00:00
Dan Gohman
68d6da1f33
Reapply 95979, a compile-time speedup, now that the bug it exposed is fixed.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96005 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-12 19:35:25 +00:00
Dan Gohman
cd045c08ca
Fix this code to avoid dereferencing an end() iterator in
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offset distributions it doesn't expect.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96002 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-12 19:20:37 +00:00
Johnny Chen
b98e160318
Add CPS, MRS, MRSsys, MSR, MSRsys for disassembly only.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95999 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-12 18:55:33 +00:00
Dale Johannesen
2d1ec73d94
Rewrite handling of DBG_VALUE; previous algorithm
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didn't handle
X =
Y<dead> = use X
DBG_VALUE(X)
I was hoping to avoid this approach as it's slower,
but I don't think it can be done.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95996 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-12 18:40:17 +00:00
Chris Lattner
c3b6ffc431
1. modernize the constantmerge pass, using densemap/smallvector.
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2. don't bother trying to merge globals in non-default sections,
doing so is quite dubious at best anyway.
3. fix a bug reported by Arnaud de Grandmaison where we'd try to
merge two globals in different address spaces.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95995 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-12 18:17:23 +00:00
Chris Lattner
4b2657a404
rename test
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95993 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-12 18:05:00 +00:00
Daniel Dunbar
ae08625085
Revert "Reverse the order for collecting the parts of an addrec. The order", it
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is breaking llvm-gcc bootstrap.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95988 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-12 17:27:08 +00:00
Anton Korobeynikov
c8f6326c06
Testcases for recent stdcall / fastcall mangling improvements
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95982 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-12 15:29:13 +00:00
Anton Korobeynikov
ebb0c2b287
Setup correct data layout to match gcc's expectations on mingw32.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95981 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-12 15:28:56 +00:00
Anton Korobeynikov
4dd162f394
Cleanup stdcall / fastcall name mangling.
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This should fix alot of problems we saw so far, e.g. PRs 5851 & 2936
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95980 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-12 15:28:40 +00:00
Dan Gohman
f21a2f15aa
Reverse the order for collecting the parts of an addrec. The order
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doesn't matter, except that ScalarEvolution tends to need less time
to fold the results this way.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95979 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-12 11:08:26 +00:00
Dan Gohman
572645cf84
Reapply the new LoopStrengthReduction code, with compile time and
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bug fixes, and with improved heuristics for analyzing foreign-loop
addrecs.
This change also flattens IVUsers, eliminating the stride-oriented
groupings, which makes it easier to work with.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95975 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-12 10:34:29 +00:00
Lang Hames
5cef638855
* Updated the cost matrix normalization proceedure to better handle infinite costs.
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* Enabled R1/R2 application for nodes with infinite spill costs in the Briggs heuristic (made
safe by the changes to the normalization proceedure).
* Removed a redundant header.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95973 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-12 09:43:37 +00:00
Evan Cheng
d19925f48f
Update test to match 95961.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95971 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-12 07:48:46 +00:00
Evan Cheng
e89d578fda
Test for 95961.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95962 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-12 02:35:03 +00:00
Chris Lattner
0d8db8e0a8
add a bunch of mod/rm encoding types for fixed mod/rm bytes.
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This will work better for the disassembler for modeling things
like lfence/monitor/vmcall etc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95960 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-12 02:06:33 +00:00
Evan Cheng
e79562dce0
Test case for 95958.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95959 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-12 02:02:23 +00:00