Commit Graph

58373 Commits

Author SHA1 Message Date
Bill Wendling
979aff6399 Add a few more c'tors:
* One that accepts a single Attribute::AttrKind.

* One that accepts an Attribute::AttrKind plus a list of values. This is for
  attributes defined like this:

    #1 = attributes { align = 4 }

* One that accepts a string, for target-specific attributes like this:

    #2 = attributes { "cpu=cortex-a8" }


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171249 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-30 02:22:16 +00:00
Bill Wendling
529ec718ac Add a few (as yet unused) query methods to determine if the attribute that's
stored here is of a certain kind. This is in preparation for when an Attribute
object represents a single attribute, instead of a bitmask of attributes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171247 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-30 01:38:39 +00:00
Bill Wendling
435654b181 Uniquify the AttributeImpl based on the Constant pointer, since those are
already uniquified.

Note: This will be expanded in the future to add more than just one pointer
value.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171245 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-30 01:23:08 +00:00
Bill Wendling
c966e08a98 s/Raw/getBitMask/g to be more in line with current naming conventions. This method won't be sticking around.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171244 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-30 01:05:42 +00:00
Craig Topper
22d8f0d685 Remove intrinsic specific instructions for (V)SQRTPS/PD. Instead lower to target-independent ISD nodes and use the existing patterns for those.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171237 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-29 18:18:20 +00:00
Craig Topper
6f57f39e4a Merge similar functionality using a nested switch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171229 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-29 17:19:06 +00:00
Craig Topper
6d183e4007 Remove intrinsic specific instructions for SSE/SSE2/AVX floating point max/min instructions. Lower them to target specific nodes and use those patterns instead. This also allows them to be commuted if UnsafeFPMath is enabled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171227 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-29 16:44:25 +00:00
Jakub Staszak
c20323a758 Simplify code, no functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171226 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-29 15:57:26 +00:00
Jakub Staszak
3c0307d760 Delete executive bit on ./lib/Target/Hexagon/HexagonAsmPrinter.h.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171225 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-29 15:23:06 +00:00
Bill Wendling
7c1683d47c Use a 'Constant' object instead of a bit field to store the attribute data.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171221 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-29 12:29:38 +00:00
Bill Wendling
4d5e5e5d61 Use the accessor method instead of the raw ivar to get the bits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171220 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-29 12:10:46 +00:00
Chandler Carruth
a84e7508eb Nuke some dead code that snuck in some how. I thought I had already
deleted this, but apparantly not. Charmingly, Clang didn't warn on it
but GCC did.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171197 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-28 14:50:51 +00:00
Chandler Carruth
73527d30cd Fix a stunning oversight in the inline cost analysis. It was never
propagating one of the values it simplified to a constant across
a myriad of instructions. Notably, ptrtoint instructions when we had
a constant pointer (say, 0) didn't propagate that, blocking a massive
number of down-stream optimizations.

This was uncovered when investigating why we fail to inline and delete
the boilerplate in:

  void f() {
    std::vector<int> v;
    v.push_back(1);
  }

It turns out most of the efforts I've made thus far to improve the
analysis weren't making it far purely because of this. After this is
fixed, the store-to-load forwarding patch enables LLVM to optimize the
above to an empty function. We still can't nuke a second push_back, but
for different reasons.

There is a very real chance this will cause somewhat noticable changes
in inlining behavior, so please let me know if you see regressions (or
improvements!) because of this patch.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171196 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-28 14:43:42 +00:00
Chandler Carruth
ba94204e94 Teach the inline cost analysis about calls that can be simplified and
how to propagate constants through insert and extract value
instructions.

With the recent improvements to instsimplify, this allows inline cost
analysis to constant fold through intrinsic functions, including notably
the with.overflow intrinsic math routines which often show up inside of
STL abstractions. This is yet another piece in the puzzle of breaking
down the code for:

  void f() {
    std::vector<int> v;
    v.push_back(1);
  }

But it still isn't enough. There are a pile of bugs in inline cost still
blocking this.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171195 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-28 14:23:32 +00:00
Chandler Carruth
e949aa1c91 Teach instsimplify to use the constant folder where appropriate for
constant folding calls. Add the initial tests for this which show that
now instsimplify can simplify blindingly obvious code patterns expressed
with both intrinsics and library calls.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171194 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-28 14:23:29 +00:00
Chandler Carruth
c98bd9f1a7 Add entry points to instsimplify for simplifying calls. The entry points
are nice and decomposed so that we can simplify synthesized calls as
easily as actually call instructions. The internal utility still has the
same behavior, it just now operates on a more generic interface so that
I can extend the set of call simplifications that instsimplify knows
about.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171189 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-28 11:30:55 +00:00
Alexey Samsonov
f045df1b8b Add proper support for -fsanitize-blacklist= flag for TSan and MSan. LLVM part.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171183 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-28 09:30:44 +00:00
Nadav Rotem
ae34b4280e CostModel: initial checkin for code that estimates the cost of special shuffles.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171180 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-28 08:19:03 +00:00
Nadav Rotem
40ef8b7548 wrap 80-col lines.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171179 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-28 07:28:43 +00:00
Nadav Rotem
0509db2738 AVX: Move the ZEXT/ANYEXT DAGCo optimizations to the lowering of these optimizations. The old test cases still cover all of these lowering/optimizations. The single change that we have is that now anyext does not need to zero a register, because it does not use the exact code path as the zero_extend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171178 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-28 05:45:24 +00:00
Nadav Rotem
587fb1dd30 Reverse the 'if' condition and reduce the indentation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171172 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-27 23:08:05 +00:00
Craig Topper
cccccabd07 Merge basic_sse12_fp_binop_p_int and basic_sse12_fp_binop_p_y_int multiclasses.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171171 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-27 22:53:47 +00:00
Nadav Rotem
1a330af3b5 AVX/AVX2: Move the SEXT lowering code from a target specific DAGco to a lowering function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171170 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-27 22:47:16 +00:00
Craig Topper
d5fc507ff1 Merge basic_sse12_fp_binop_p and basic_sse12_fp_binop_p_y multiclasses.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171166 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-27 18:51:50 +00:00
Chandler Carruth
7ccc2f7a78 Make this parameter be named consistently with most other
getAnalysisUsage implementations.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171157 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-27 11:17:15 +00:00
Alexey Samsonov
1c8b825c43 [ASan] Fix lifetime intrinsics handling. Now for each intrinsic we check if it describes one of 'interesting' allocas. Assume that allocas can go through casts and phi-nodes before apperaring as llvm.lifetime arguments
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171153 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-27 08:50:58 +00:00
Nadav Rotem
d6fb53adb1 On AVX/AVX2 the type v8i1 is legalized to v8i16, which is an XMM sized
register. In most cases we actually compare or select YMM-sized registers
and mixing the two types creates horrible code. This commit optimizes
some of the transition sequences.

PR14657.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171148 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-27 08:15:45 +00:00
Nadav Rotem
3c22a44400 AVX/AVX2: Move the code that lowers vector-trunc from a DAGCo-hook to custom lowering hook.
The vector truncs were scalarized during LegalizeVectorOps, later vectorized again by some DAGCombine optimization
and finally, lowered by a dagcombing optimization. Now, they are properly lowered during LegalizeVectorOps.
No new testcase because the original testcases still work.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171146 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-27 07:45:10 +00:00
Craig Topper
068aec586d Add hasSideEffects=0 to some forms of ROUND, RCP, and RSQRT.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171143 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-27 07:16:08 +00:00
Nadav Rotem
444b4bf5c8 Refactor DAGCombinerInfo. Change the different booleans that indicate if we are before or after different runs of DAGCo, with the CombineLevel enum.
Also, added a new API for checking if we are running before or after the LegalizeVectorOps phase. 



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171142 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-27 06:47:41 +00:00
Craig Topper
d0f28c0958 Move single letter 'P' prefix out of multiclass now that tablegen allows defm to start with #NAME. This makes instruction names more searchable again.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171141 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-27 06:34:54 +00:00
Craig Topper
025c5de9ba Update tablegen parser to allow defm names to start with #NAME.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171140 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-27 06:32:52 +00:00
Craig Topper
87073aad8f Add hasSideEffects=0 to some shift and rotate instructions. None of which are currently used by code generation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171137 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-27 03:35:44 +00:00
Craig Topper
766cbae4b1 Mark the divide instructions as hasSideEffects=0.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171136 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-27 03:01:18 +00:00
Eric Christopher
64f824c9d1 For the dwarf5 split debug info code split out the string section
per compile unit/skeleton compile unit. Update tests accordingly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171133 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-27 02:14:01 +00:00
Craig Topper
0b9c5e268f Add hasSideEffects=0 to CMP*rr_REV.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171130 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-27 02:08:46 +00:00
Craig Topper
5e6a86c7f0 Add mayLoad, mayStore, and hasSideEffects tags to BT/BTS/BTR/BTC instructions. Shouldn't change any functionality since they don't have patterns to select them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171128 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-27 02:01:33 +00:00
Eric Christopher
32b3768ec1 Right now all of the relocations are 32-bit dwarf, and the relocation
information doesn't return an addend for Rel relocations. Go ahead
and use this information to fix relocation handling inside dwarfdump
for 32-bit ELF REL.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171126 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-27 01:07:07 +00:00
Nadav Rotem
5dd839430c If all of the write objects are identified then we can vectorize the loop even if the read objects are unidentified.
PR14719.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171124 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-26 23:30:53 +00:00
Craig Topper
e9fd6ad567 Fix operands and encoding form for ARPL instruction. Register form had and reversed. Memory form writes memory, but was marked as MRMSrcMem.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171123 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-26 23:27:57 +00:00
Craig Topper
ee5b63cb52 Add hasSideEffects=0 to some atomic instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171122 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-26 23:08:12 +00:00
Craig Topper
b87a5b3a1f Mark the AL/AX/EAX forms of the basic arithmetic operations has never having side effects.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171121 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-26 22:19:23 +00:00
Nick Lewycky
dbf5081a31 80 columns. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171120 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-26 22:00:49 +00:00
Nick Lewycky
1dec62ed43 Remove mid-optimizer warning. This situation should be handled differently,
such as by a compiler warning, a check in clang -fsanitizer=undefined, being
optimized to unreachable, or a combination of the above. PR14722.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171119 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-26 22:00:35 +00:00
Craig Topper
37cb8398c8 Mark all the _REV instructions as not having side effects. They aren't really emitted by the backend, but it reduces the number of instructions in the output files with unmodelled side effects to make auditing easier.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171118 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-26 21:30:22 +00:00
Craig Topper
a85cbfeba7 Remove a special conditional setting of neverHasSideEffects if the instruction didn't have a pattern. This was leftover from when tablegen used to complain if things were already inferred from patterns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171117 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-26 21:04:30 +00:00
Nadav Rotem
13eb1e7817 LoopVectorizer: Optimize the vectorization of consecutive memory access when the iteration step is -1
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171114 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-26 19:08:17 +00:00
Evgeniy Stepanov
b53be53c72 [msan] Raise alignment of origin stores/loads when possible.
Origin alignment is as high as the alignment of the corresponding application
location, but never less than 4.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171110 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-26 11:55:09 +00:00
Evgeniy Stepanov
ab29644a33 [msan] Expand the file comment with track-origins info.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171109 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-26 10:59:00 +00:00
Craig Topper
0a5ead92ff Merge still more SSE/AVX instruction definitions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171103 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-26 07:54:43 +00:00