because if the results from getUnderlyingObject match, the values must
be from the same underlying object, even if we don't know what that
object is.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89434 91177308-0d34-0410-b5e6-96231b3b80d8
careful about crazy methods of capturing pointers using comparisons.
Comparisons of identified objects with null in the default address
space are not captures. And, comparisons of two pointers within the
same identified object are not captures.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89421 91177308-0d34-0410-b5e6-96231b3b80d8
assembly can confuse things utterly, as it's assumed that instructions in
inline assembly are 4 bytes wide. For Thumb mode, that's often not true,
so the calculations for when alignment padding will be present get thrown off,
ultimately leading to out of range constant pool entry references. Making
more conservative assumptions that padding may be necessary when inline asm
is present avoids this situation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89403 91177308-0d34-0410-b5e6-96231b3b80d8
if it is not ultimately captured. Teach BasicAliasAnalysis that a
local object address which does not escape and is never stored does
not alias with a value resulting from a load.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89398 91177308-0d34-0410-b5e6-96231b3b80d8
critical edges in PHIElimination.
This has a huge impact on regalloc performance, and we recover almost all of
the 10% compile time regression that edge splitting introduced.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89381 91177308-0d34-0410-b5e6-96231b3b80d8
fully specified at this level. Subclasses of NLdStLN can specify selective
bit(s) for Inst{7-4}, as is done for VLD[234]LN* and VST[234]LN* inside
ARMInstrNEON.td.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89377 91177308-0d34-0410-b5e6-96231b3b80d8
they are lowered to instruction sequences more complex than a simple
load, such that CodeGen cannot rematerialize them, a reload from a
spill slot is likely to be cheaper than the complex sequence.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89374 91177308-0d34-0410-b5e6-96231b3b80d8
Add a -linearscan-skip-count argument (default to 0) that tells the
allocator to remember the last N registers it allocated and skip them
when looking for a register candidate. This tends to spread out
register usage and free up post-allocation scheduling at the cost of
slightly more register pressure. The primary benefit is the ability
to backschedule reloads.
This is turned off by default.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89356 91177308-0d34-0410-b5e6-96231b3b80d8
4.2.4, 4.3.4, 4.4.2.
The workaround is to use a local min/max implementation that takes an integer
param, and not a reference to integer param (like std::min does).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89352 91177308-0d34-0410-b5e6-96231b3b80d8
All spiller calls in RegAllocLinearScan now go through the new Spiller interface.
The "-new-spill-framework" command line option has been removed. To use the trivial in-place spiller you should now pass "-spiller=trivial -rewriter=trivial".
(Note the trivial spiller/rewriter are only meant to serve as examples of the new in-place modification work. Enabling them will yield terrible, though hopefully functional, code).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89311 91177308-0d34-0410-b5e6-96231b3b80d8
for uses inside the loop. This works better with LSR. Disabled behind
-simplify-iv-users while benchmarking.
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