Commit Graph

18389 Commits

Author SHA1 Message Date
Chris Lattner
fe560b8c85 Fix a nasty bug introduced when apint'ified. This fixes
Transforms/IndVarsSimplify/exit_value_tests.llx


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36081 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-15 19:52:49 +00:00
Owen Anderson
3dc6776b33 Remove ImmediateDominator analysis. The same information can be obtained from DomTree. A lot of code for
constructing ImmediateDominator is now folded into DomTree construction.

This is part of the ongoing work for PR217.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36063 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-15 08:47:27 +00:00
Chris Lattner
83ae2fcacc fix SimplifyLibCalls/IsDigit.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36047 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-15 05:38:40 +00:00
Chris Lattner
31755a024d Extend store merging to support the 'if/then' version in addition to if/then/else.
This sinks the two stores in this example into a single store in cond_next.  In this
case, it allows elimination of the load as well:

        store double 0.000000e+00, double* @s.3060
        %tmp3 = fcmp ogt double %tmp1, 5.000000e-01             ; <i1> [#uses=1]
        br i1 %tmp3, label %cond_true, label %cond_next
cond_true:              ; preds = %entry
        store double 1.000000e+00, double* @s.3060
        br label %cond_next
cond_next:              ; preds = %entry, %cond_true
        %tmp6 = load double* @s.3060            ; <double> [#uses=1]

This implements Transforms/InstCombine/store-merge.ll:test2


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36040 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-15 01:02:18 +00:00
Chris Lattner
3284d1f18a refactor some code, no functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36037 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-15 00:07:55 +00:00
Owen Anderson
9a341ff3c1 Fix some unsafe code. Also, tabs -> spaces.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36035 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-14 23:57:00 +00:00
Owen Anderson
690c684fc6 Make ETForest depend on DomTree rather than IDom. This is the first step
in the long process that will be fixing PR 217.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36034 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-14 23:49:24 +00:00
Chris Lattner
e34e9a29dc fix long lines
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36031 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-14 23:32:02 +00:00
Chris Lattner
7c162645ae add a note
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36028 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-14 23:06:09 +00:00
Chris Lattner
b7300fa8d2 Implement Transforms/InstCombine/vec_extract_elt.ll, transforming:
define i32 @test(float %f) {
        %tmp7 = insertelement <4 x float> undef, float %f, i32 0
        %tmp17 = bitcast <4 x float> %tmp7 to <4 x i32>
        %tmp19 = extractelement <4 x i32> %tmp17, i32 0
        ret i32 %tmp19
}

into:

define i32 @test(float %f) {
        %tmp19 = bitcast float %f to i32                ; <i32> [#uses=1]
        ret i32 %tmp19
}

On PPC, this is the difference between:

_test:
        mfspr r2, 256
        oris r3, r2, 8192
        mtspr 256, r3
        stfs f1, -16(r1)
        addi r3, r1, -16
        addi r4, r1, -32
        lvx v2, 0, r3
        stvx v2, 0, r4
        lwz r3, -32(r1)
        mtspr 256, r2
        blr

and:

_test:
        stfs f1, -4(r1)
        nop
        nop
        nop
        lwz r3, -4(r1)
        blr


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36025 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-14 23:02:14 +00:00
Chris Lattner
6987833651 Implement InstCombine/vec_demanded_elts.ll:test2. This allows us to turn
unsigned test(float f) {
 return _mm_cvtsi128_si32( (__m128i) _mm_set_ss( f*f ));
}

into:

_test:
        movss 4(%esp), %xmm0
        mulss %xmm0, %xmm0
        movd %xmm0, %eax
        ret

instead of:

_test:
        movss 4(%esp), %xmm0
        mulss %xmm0, %xmm0
        xorps %xmm1, %xmm1
        movss %xmm0, %xmm1
        movd %xmm1, %eax
        ret

GCC gets:

_test:
        subl    $28, %esp
        movss   32(%esp), %xmm0
        mulss   %xmm0, %xmm0
        xorps   %xmm1, %xmm1
        movss   %xmm0, %xmm1
        movaps  %xmm1, %xmm0
        movd    %xmm0, 12(%esp)
        movl    12(%esp), %eax
        addl    $28, %esp
        ret


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36020 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-14 22:29:23 +00:00
Chris Lattner
d6b7a1648c avoid copying sets and vectors around.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36017 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-14 22:10:17 +00:00
Jeff Cohen
ac58a16f85 Fix PR1329.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36016 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-14 21:50:21 +00:00
Chris Lattner
1c35968d4d disable switch lowering using shift/and. It still breaks ppc bootstrap for
some reason.  :(  Will investigate.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36011 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-14 19:39:41 +00:00
Chris Lattner
ae143ceb83 avoid iterator invalidation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36002 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-14 18:06:52 +00:00
Jeff Cohen
98a72203d7 An even better fix.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35998 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-14 17:18:29 +00:00
Jeff Cohen
e4aee1d3a4 Fix recent regression that broke several llvm-tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35996 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-14 16:55:19 +00:00
Anton Korobeynikov
e01017bba4 Fix PR1325: Case range optimization was performed in the case it
shouldn't. Also fix some "latent" bug on 64-bit platforms


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35990 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-14 13:25:55 +00:00
Chris Lattner
3ff981749b disable shift/and lowering to work around PR1325 for now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35985 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-14 02:26:56 +00:00
Chris Lattner
35b9b49fd1 Implement a few missing xforms: printf("foo\n") -> puts. printf("x") -> putchar
printf("") -> noop.  Still need to do the xforms for fprintf.

This implements Transforms/SimplifyLibCalls/Printf.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35984 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-14 01:17:48 +00:00
Chris Lattner
8264a9fcca in addition to merging, constantmerge should also delete trivially dead globals,
in order to clean up after simplifylibcalls.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35982 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-14 01:11:54 +00:00
Chris Lattner
6fe5541003 Implement PR1201 and test/Transforms/InstCombine/malloc-free-delete.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35981 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-14 00:20:02 +00:00
Chris Lattner
f25646bfb3 use an accessor to simplify code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35979 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-14 00:17:39 +00:00
Chris Lattner
6f771d4351 add GetElementPtrInst::hasAllZeroIndices, a long-overdue helper method.
Writing it twice in the same day was too much for me.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35978 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-14 00:12:57 +00:00
Reid Spencer
0468ab3025 We want the number of bits needed, not the power of 2.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35977 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-14 00:00:10 +00:00
Jeff Cohen
614408dc48 Silence VC++ warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35975 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-13 22:52:03 +00:00
Chris Lattner
c5494af8a9 Now that codegen prepare isn't defeating me, I can finally fix what I set
out to do! :)

This fixes a problem where LSR would insert a bunch of code into each MBB
that uses a particular subexpression (e.g. IV+base+C).  The problem is that
this code cannot be CSE'd back together if inserted into different blocks.

This patch changes LSR to attempt to insert a single copy of this code and
share it, allowing codegenprepare to duplicate the code if it can be sunk
into various addressing modes.  On CodeGen/ARM/lsr-code-insertion.ll,
for example, this gives us code like:

        add r8, r0, r5
        str r6, [r8, #+4]
..
        ble LBB1_4      @cond_next
LBB1_3: @cond_true
        str r10, [r8, #+4]
LBB1_4: @cond_next
...
LBB1_5: @cond_true55
        ldr r6, LCPI1_1
        str r6, [r8, #+4]

instead of:

        add r10, r0, r6
        str r8, [r10, #+4]
...
        ble LBB1_4      @cond_next
LBB1_3: @cond_true
        add r8, r0, r6
        str r10, [r8, #+4]
LBB1_4: @cond_next
...
LBB1_5: @cond_true55
        add r8, r0, r6
        ldr r10, LCPI1_1
        str r10, [r8, #+4]

Besides being smaller and more efficient, this makes it immediately
obvious that it is profitable to predicate LBB1_3 now :)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35972 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-13 20:42:26 +00:00
Chris Lattner
dd77df3cbc Completely rewrite addressing-mode related sinking of code. In particular,
this fixes problems where codegenprepare would sink expressions into load/stores
that are not valid, and fixes cases where it would miss important valid ones.

This fixes several serious codesize and perf issues, particularly on targets
with complex addressing modes like arm and x86.  For example, now we compile
CodeGen/X86/isel-sink.ll to:

_test:
        movl 8(%esp), %eax
        movl 4(%esp), %ecx
        cmpl $1233, %eax
        ja LBB1_2       #F
LBB1_1: #T
        movl $4, (%ecx,%eax,4)
        movl $141, %eax
        ret
LBB1_2: #F
        movl (%ecx,%eax,4), %eax
        ret

instead of:

_test:
        movl 8(%esp), %eax
        leal (,%eax,4), %ecx
        addl 4(%esp), %ecx
        cmpl $1233, %eax
        ja LBB1_2       #F
LBB1_1: #T
        movl $4, (%ecx)
        movl $141, %eax
        ret
LBB1_2: #F
        movl (%ecx), %eax
        ret


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35970 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-13 20:30:56 +00:00
Reid Spencer
57ae4f5f01 Implement a getBitsNeeded method to determine how many bits are needed to
represent a string in binary form by an APInt.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35968 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-13 19:19:07 +00:00
Devang Patel
4beccb897d Remove use of SlowOperationInformer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35967 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-13 18:58:18 +00:00
Devang Patel
60b0d84594 Undo previous check-in.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35966 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-13 18:35:15 +00:00
Devang Patel
02c768608a Hello uses LLVMSupport.a (SlowerOperationInformer)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35965 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-13 18:28:23 +00:00
Anton Korobeynikov
8085bcfdca Fix PR1323 : we haven't updated phi nodes in good manner :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35963 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-13 06:53:51 +00:00
Chris Lattner
5a3d40d88f arm has r+r*s and r+i addr modes, but no r+i+r*s addr modes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35962 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-13 06:50:55 +00:00
Zhou Sheng
daacf22537 Make the apint construction more effective.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35960 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-13 05:57:32 +00:00
Chris Lattner
7fec90ebf4 CSE simple binary expressions when they are inserted. This makes LSR produce
less huge code that needs to be cleaned up by sdisel.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35959 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-13 05:04:18 +00:00
Reid Spencer
57c5b1815d Implement review feedback .. don't double search a set.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35957 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-12 21:57:15 +00:00
Reid Spencer
df41353497 Make sure intrinsics that are lowered to functions make the function weak
linkage so we only end up with one of them in a program. These are, after
all overloaded and templatish in nature.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35956 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-12 21:53:38 +00:00
Reid Spencer
69f80a63a2 Provide support for intrinsics that lower themselves to a function body.
This can happen for intrinsics that are overloaded.  In such cases it is
necessary to emit a function prototype before the body of the function
that calls the intrinsic and to ensure we don't emit it multiple times.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35954 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-12 21:00:45 +00:00
Lauro Ramos Venancio
26ca64c884 Implement Thread Local Storage (TLS) in CBackend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35951 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-12 18:42:08 +00:00
Lauro Ramos Venancio
c763552299 Implement the "thread_local" keyword.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35950 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-12 18:32:50 +00:00
Reid Spencer
eeedcb6905 Fix bugs in generated code for part_select and part_set so that llc doesn't
barf when CBE is run with a program that contains these intrinsics.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35946 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-12 13:30:14 +00:00
Reid Spencer
37958093c6 Fix a bug in PartSet. The replacement value needs to be zext or trunc to
the size of the value, not just zext. Also, give better names to two BBs.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35945 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-12 12:46:33 +00:00
Chris Lattner
3a508c94a6 the result of an inline asm copy can be an arbitrary VT that the register
class supports.  In the case of vectors, this means we often get the wrong
type (e.g. we get v4f32 instead of v8i16).  Make sure to convert the vector
result to the right type.  This fixes CodeGen/X86/2007-04-11-InlineAsmVectorResult.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35944 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-12 06:00:20 +00:00
Chris Lattner
4829b1c6ab fold noop vbitconvert instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35943 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-12 05:58:43 +00:00
Chris Lattner
c2941779c3 Fix weirdness handling single element vectors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35941 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-12 04:44:28 +00:00
Chris Lattner
6c284d716e Fix mmx paddq, add support for the 'y' register class, though it isn't tested.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35940 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-12 04:14:49 +00:00
Reid Spencer
f75b874957 For PR1284:
Implement the "part_set" intrinsic.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35938 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-12 02:48:46 +00:00
Chris Lattner
69d6f1358c improve the patch for PR1318 to also support grouped options with custom
handlers (like the pass list).  My previous fix only supported *new* command
line options, not additions to old ones.

This fixes test/Feature/load_module.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35935 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-12 00:36:29 +00:00
Chris Lattner
a1b253f58e Fix CodeGen/X86/2007-03-24-InlineAsmPModifier.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35926 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-11 22:29:46 +00:00