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Author SHA1 Message Date
Torok Edwin
a156efdf71 Fix OCaml bindings crash, PR8847. 
See http://caml.inria.fr/mantis/view.php?id=4166
If we call only external functions from a module, then its 'let _' bindings
don't get executed, which means that the exceptions don't get registered for use
in the C code.
This in turn causes llvm_raise to call raise_with_arg() with a NULL pointer and
cause a segmentation fault.

The workaround is to declare all 'external' functions as 'val' in these .mli
files.

Also added a separate testcase (the testcase must call only external functions
for the bug to occur).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122497 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-23 15:49:26 +00:00
Benjamin Kramer
9d071cbb92 Remove/fix invalid README entries. The well thought out strcpy function doesn't return a pointer to the end of the string. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122496 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-23 15:32:07 +00:00
Benjamin Kramer
3e4106105b Remove some obsolete README items, add a new one off the top of my head. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122495 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-23 15:07:02 +00:00
Andrew Trick
2902736a50 Reorganize ListScheduleBottomUp in preparation for modeling machine cycles and instruction issue. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122491 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-23 05:42:20 +00:00
Andrew Trick
3d420cb2fe Converted LiveRegCycles to LiveRegGens. It's easier to work with and allows multiple nodes per cycle. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122474 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-23 04:16:14 +00:00
Andrew Trick
cb7947b81b In CheckForLiveRegDef use TRI->getOverlaps. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122473 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-23 03:43:21 +00:00
Andrew Trick
1b1658741a Fixes PR8823: add-with-overflow-128.ll 
In the bottom-up selection DAG scheduling, handle two-address
instructions that read/write unspillable registers. Treat
the entire chain of two-address nodes as a single live range.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122472 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-23 03:15:51 +00:00
Mon P Wang
e90a6333c3 Preserve the address space when generating bitcasts for MemTransferInst in ConvertToScalarInfo 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122462 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-23 01:41:32 +00:00
Jeffrey Yasskin
8e68c38735 Change all self assignments X=X to (void)X, so that we can turn on a 
new gcc warning that complains on self-assignments and
self-initializations.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122458 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-23 00:58:24 +00:00
Bill Wendling
65e43a259f Default to armv7 instead of armv6. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122457 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-23 00:49:18 +00:00
Jim Grosbach
9584bd83e6 Trailing whitespace. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122456 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-22 23:26:02 +00:00
Benjamin Kramer
f50125ecaa DAGCombine add (sext i1), X into sub X, (zext i1) if sext from i1 is illegal. The latter usually compiles into smaller code. 
example code:
unsigned foo(unsigned x, unsigned y) {
  if (x != 0) y--;
  return y;
}

before:
  _foo:                           ## @foo
    cmpl  $1, 4(%esp)             ## encoding: [0x83,0x7c,0x24,0x04,0x01]
    sbbl  %eax, %eax              ## encoding: [0x19,0xc0]
    notl  %eax                    ## encoding: [0xf7,0xd0]
    addl  8(%esp), %eax           ## encoding: [0x03,0x44,0x24,0x08]
    ret                           ## encoding: [0xc3]

after:
  _foo:                           ## @foo
    cmpl  $1, 4(%esp)             ## encoding: [0x83,0x7c,0x24,0x04,0x01]
    movl  8(%esp), %eax           ## encoding: [0x8b,0x44,0x24,0x08]
    adcl  $-1, %eax               ## encoding: [0x83,0xd0,0xff]
    ret                           ## encoding: [0xc3]



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122455 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-22 23:17:45 +00:00
Benjamin Kramer
4ac19470dc InstCombine: creating selects from -1 and 0 is fine, they combine into a sext from i1. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122453 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-22 23:12:15 +00:00
Benjamin Kramer
e915ff30cd X86: Lower a select directly to a setcc_carry if possible. 
int test(unsigned long a, unsigned long b) { return -(a < b); }
compiles to
  _test:                              ## @test
    cmpq  %rsi, %rdi                  ## encoding: [0x48,0x39,0xf7]
    sbbl  %eax, %eax                  ## encoding: [0x19,0xc0]
    ret                               ## encoding: [0xc3]
instead of
  _test:                              ## @test
    xorl  %ecx, %ecx                  ## encoding: [0x31,0xc9]
    cmpq  %rsi, %rdi                  ## encoding: [0x48,0x39,0xf7]
    movl  $-1, %eax                   ## encoding: [0xb8,0xff,0xff,0xff,0xff]
    cmovael %ecx, %eax                ## encoding: [0x0f,0x43,0xc1]
    ret                               ## encoding: [0xc3]


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122451 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-22 23:09:28 +00:00
Rafael Espindola
10b6d33581 Add r122359 back now that the bug in MCDwarfLineAddrFragment fragment has been 
fixed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122448 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-22 22:16:24 +00:00
Dan Gohman
df3ee64d79 Constify. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122447 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-22 22:10:08 +00:00
Rafael Espindola
835439a397 Assert that the AddrDelta expression is really constant and wrap it in a set 
if we have a lame assembler.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122446 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-22 22:04:28 +00:00
Jakob Stoklund Olesen
770d42de3b When RegAllocGreedy decides to spill the interferences of the current register, 
pick the victim with the lowest total spill weight.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122445 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-22 22:01:30 +00:00
Jakob Stoklund Olesen
c64379da07 Include a shadow of the original CFG edges in the edge bundle graph. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122444 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-22 22:01:28 +00:00
Rafael Espindola
90a5a0cd7c Rename NeedsSetToChangeDiffSize to HasAggressiveSymbolFolding which is a much 
better name and matches what is used in the MachO writer.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122443 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-22 21:51:29 +00:00
Daniel Dunbar
72123334ad MC/Mach-O/ARM: Don't try to use scattered relocs for BR24 fixups. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122441 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-22 21:26:43 +00:00
Rafael Espindola
ecbbf40d5c Add reduced test from 8845. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122438 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-22 21:15:13 +00:00
Rafael Espindola
bf57b838b8 Revert r122359 while I debug PR8845. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122427 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-22 19:05:49 +00:00
Matt Beaumont-Gay
33a03c73ef Fix another conditional expression mismatched enum type warning. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122419 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-22 18:25:55 +00:00
Duncan Sands
1cd05bb605 When determining whether the new instruction was already present in 
the original instruction, half the cases were missed (making it not
wrong but suboptimal).  Also correct a typo (A <-> B) in the second
chunk. 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122414 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-22 17:15:25 +00:00
Duncan Sands
b3898af89f Make this test not depend on how the variable is named. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122413 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-22 17:08:04 +00:00
Daniel Dunbar
df561e0234 MC/Mach-O/ARM: We always use the SECTDIFF reloc type on ARM, which is 
esp. important given that the LOCAL_SECTDIFF enumeration got redefined.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122412 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-22 16:52:19 +00:00
Daniel Dunbar
25bcc9cdc8 MC/Mach-O/ARM: Clone off an ARM version of RecordScatteredRelocation until I figure out how it is supposed to work. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122410 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-22 16:45:29 +00:00
Daniel Dunbar
5cc6390495 MC/Mach-O: Return to reporting errors if we see unexpected fixup kinds. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122409 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-22 16:32:41 +00:00
Daniel Dunbar
3664564395 MC/Mach-O/ARM: Recognize generic _Data_N fixup kinds. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122408 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-22 16:32:37 +00:00
Daniel Dunbar
294e67861c MC/Mach-O/ARM: Add enough relocation logic to get BR24 relocations. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122407 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-22 16:19:24 +00:00
Daniel Dunbar
fdfbc6a652 MC/Mach-O/ARM: Fix thinko. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122406 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-22 16:19:20 +00:00
Rafael Espindola
33a38a1b5a Use references and simplify. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122405 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-22 16:11:57 +00:00
Rafael Espindola
f01212489b Simplify the handling of .size expressions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122404 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-22 16:03:00 +00:00
Daniel Dunbar
4d74305a1f MC/Mach-O/ARM: Stub out RecordARMRelocation, which is mostly a copy of 
RecordRelocation with lots of FIXMEs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122402 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-22 13:50:05 +00:00
Daniel Dunbar
42b5286627 Simplify. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122401 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-22 13:49:56 +00:00
Daniel Dunbar
532c456d48 MC/Mach-O: Split out RecordARMRelocation for now, it is weird enough it isn't 
clear how to keep in the generic path (yet).
 - Will revisit when it actually works.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122400 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-22 13:49:43 +00:00
Duncan Sands
37bf92b523 Add a generic expansion transform: A op (B op' C) -> (A op B) op' (A op C) 
if both A op B and A op C simplify.  This fires fairly often but doesn't
make that much difference.  On gcc-as-one-file it removes two "and"s and
turns one branch into a select.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122399 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-22 13:36:08 +00:00
Che-Liang Chiou
fc7072c3c4 ptx: add ld instruction and test 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122398 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-22 10:38:51 +00:00
Duncan Sands
a3c44a5280 Add some statistics, good for understanding how much more powerful 
instcombine is compared to instsimplify.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122397 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-22 09:40:51 +00:00
Oscar Fuentes
711042839c Fixes file extension for loadable modules on OS X. 
Patch by Wesley Peck!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122395 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-22 08:30:17 +00:00
Chris Lattner
cbf68dfbc0 Fix a bug in ReduceLoadWidth that wasn't handling extending 
loads properly.  We miscompiled the testcase into:

_test:                                  ## @test
	movl	$128, (%rdi)
	movzbl	1(%rdi), %eax
	ret

Now we get a proper:

_test:                                  ## @test
	movl	$128, (%rdi)
	movsbl	(%rdi), %eax
	movzbl	%ah, %eax
	ret

This fixes PR8757.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122392 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-22 08:02:57 +00:00
Chris Lattner
7a2a7faf9c more cleanups, move a check for "roundedness" earlier to reject 
unhanded cases faster and simplify code.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122391 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-22 08:01:44 +00:00
Chris Lattner
4c32bc24de reduce indentation and improve comments, no functionality change. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122389 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-22 07:36:50 +00:00
Wesley Peck
9eb337a2b7 Don't generate carry bit when loading immediate values on the Microblaze. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122385 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-22 01:29:32 +00:00
Wesley Peck
6b3bbb149f Add support for some of the LLVM atomic operations to the MBlaze backend. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122384 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-22 01:15:01 +00:00
Wesley Peck
5f996d1025 Modeling the carry bit in the MSR register of the MicroBlaze. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122381 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-22 00:53:07 +00:00
Wesley Peck
025c4587d7 Fix a regression introduced into the MBlaze delay slot filler. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122379 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-22 00:22:59 +00:00
Owen Anderson
f056838956 Give GVN back the ability to perform simple conditional propagation on conditional branch values. 
I still think that LVI should be handling this, but that capability is some ways off in the future,
and this matters for some significant benchmarks.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122378 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-21 23:54:34 +00:00
Matt Beaumont-Gay
e733cf8c27 GCC objects to the two sides of a conditional expression having different enum 
types, but they're just getting converted to unsigned anyway, so cast first
(and ask questions later).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122377 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-21 23:43:23 +00:00