Manman Ren
a41db53f66
ARM: enable struct byval for AAPCS-VFP.
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This change is to be enabled in clang.
rdar://9877866
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161789 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-13 21:22:50 +00:00
Bill Wendling
6d86f3cdfc
Whitespace cleanup.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161788 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-13 21:20:43 +00:00
Jakob Stoklund Olesen
786556c268
Count triangles and diamonds in early if-conversion.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161783 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-13 21:03:27 +00:00
Jakob Stoklund Olesen
5f6d36335b
Delete dead typedef.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161782 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-13 21:03:25 +00:00
Jakob Stoklund Olesen
bc70ff3cb9
Handle extra Tail predecessors in if-conversion.
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It is still possible to if-convert if the tail block has extra
predecessors, but the tail phis must be rewritten instead of being
removed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161781 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-13 20:49:04 +00:00
Arnold Schwaighofer
d252aa43c9
[Hexagon] Don't mark callee saved registers as clobbered by a tail call
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This was causing unnecessary spills/restores of callee saved registers.
Fixes PR13572.
Patch by Pranav Bhandarkar!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161778 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-13 19:54:01 +00:00
Manman Ren
2e018f1cf6
Fix failure on Atom bot due to r161769
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161777 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-13 19:34:29 +00:00
Nadav Rotem
df8320313b
Do not optimize (or (and X,Y), Z) into BFI and other sequences if the AND ISDNode has more than one user.
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rdar://11876519
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161775 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-13 18:52:44 +00:00
Manman Ren
c586d26812
X86: move Int_CVTSD2SSrr, Int_CVTSI2SSrr, Int_CVTSI2SDrr, Int_CVTSS2SDrr from
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OpTbl1 to OpTbl2 since they have 3 operands and the last operand can be changed
to a memory operand.
PR13576
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161769 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-13 18:29:41 +00:00
Eric Christopher
001d219b97
Add support for the %H output modifier.
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Patch by Weiming Zhao.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161768 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-13 18:18:52 +00:00
David Blaikie
365a1d48d8
Ignore known externally-homed tools.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161765 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-13 17:50:44 +00:00
Manman Ren
de7f1c2517
X86: when auto-detecting the subtarget features, make sure use IsIntel to detect
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Nehalem, Westmere and Sandy Bridge. AMD also has processor family 6.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161763 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-13 17:26:46 +00:00
Nadav Rotem
a3a3219b3a
Fix a documentation typo.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161758 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-13 15:29:53 +00:00
Kostya Serebryany
11c2a47af8
[asan] remove the code for --asan-merge-callbacks as it appears to be a bad idea. (partly related to Bug 13225)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161757 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-13 14:08:46 +00:00
Alexander Kornienko
8932fe4d2b
Added test for non-static use of cl::opt (fixed in r160170)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161751 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-13 10:43:36 +00:00
Tim Northover
88fc697b7c
Add test for previous commit correcting NEON load patterns.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161750 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-13 10:38:45 +00:00
Tim Northover
e0b464f291
Use correct loads for vector types during extending-load operations.
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Previously, we used VLD1.32 in all cases, however there are both 16 and 64-bit
accesses being selected, so we need to use an appropriate width load in those
cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161748 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-13 09:06:31 +00:00
Craig Topper
2f1b2ec1e7
Tidy up VSETCC lowering code a bit more by adding an llvm_unreachable and putting an a couple if conditions in a better order.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161746 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-13 03:42:38 +00:00
Craig Topper
523908d1be
Refactor code a bit to share commonalities. No functional change intended.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161745 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-13 02:34:03 +00:00
Craig Topper
ec6593cf84
Fix an unused variable warning from r161742.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161743 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-13 01:26:45 +00:00
Craig Topper
bccc8ce9b8
Remove the LowerMMXCONCAT_VECTORS function. It could never execute because there are no legal 64-bit vector types that could be used as inputs to a 128-bit concat_vectors. Remove a target specific SDNode and its patterns that become unused as a result.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161742 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-13 01:23:55 +00:00
Nick Lewycky
af402acff3
Give this test an explicit triple.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161740 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-12 08:21:27 +00:00
Nick Lewycky
0c5602de8c
When emitting the PC range in an FDE, use the same data encoding for both ends
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of the range. Fixes PR13581!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161739 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-12 08:09:45 +00:00
Craig Topper
2c63d5e8c2
Remove call to setOperationAction for SETCC of v4f32. SETCC returns an integer type not an FP type.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161738 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-12 05:31:32 +00:00
Craig Topper
b151a64618
Remove unnecessary call to setOperationAction for SETCC of v2i64 under SSE42. It was already called for the same under SSE2.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161737 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-12 05:15:16 +00:00
Arnold Schwaighofer
a7016d6fc1
Revert 161581: Patch to implement UMLAL/SMLAL instructions for the ARM
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architecture
It broke MultiSource/Applications/JM/ldecod/ldecod on armv7 thumb O0 g and armv7
thumb O3.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161736 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-12 05:11:56 +00:00
Craig Topper
0faf46c640
Change addTypeForNeon to use MVT instead of EVT so all the calls to getSimpleVT can be removed.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161735 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-12 03:16:37 +00:00
Craig Topper
7a9a28b2c9
Make replace many calls to getSizeInBits() with is128BitVector/is256BitVector
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161734 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-12 02:23:29 +00:00
Craig Topper
0d1f176b3f
Use MVT.isXBitVector instead of EVT.isXBitVector when setting up operation actions. Compiles to smaller code.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161733 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-12 00:34:56 +00:00
Michael Liao
9eac20ac88
fix PR13577, an issue introduced by r161687
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- FCMOV only supports a subset of X86 conditions. Skip boolean
simplification if X86 condition is not valid for FCMOV.
- add a minimal test case for PR13577.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161732 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-11 23:47:06 +00:00
Craig Topper
235e2e6f0d
Create isXBitVector methods in MVT and call them from EVT. This allows targets to call them with an MVT without needing to convert to EVT.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161731 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-11 23:31:18 +00:00
Craig Topper
880ef45a14
Move setOperationAction for CONCAT_VECTORS for 256-bit vectors into loop since all 256-bit types are supported.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161730 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-11 22:34:26 +00:00
Benjamin Kramer
5fa2d458af
MachineCSE: Hoist isConstantPhysReg out of the loop, it checks for overlaps already.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161729 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-11 20:42:59 +00:00
Benjamin Kramer
cfc0ad6e48
PR13578: Teach MachineCSE that instructions that use a constant register can be CSE'd safely.
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This is common e.g. when doing rip-relative addressing on x86_64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161728 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-11 19:05:13 +00:00
Craig Topper
f4cfc4423c
Tidy up indentation. No functional change.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161727 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-11 17:53:00 +00:00
Craig Topper
dca72541d5
Fix a cast that was casting away 'const' unnecessarily
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161726 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-11 17:46:16 +00:00
Craig Topper
2865422a4d
Add a couple default: llvm_unreachable() to some switch statements. Fix a bad message in an existing llvm_unreachable.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161725 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-11 17:44:14 +00:00
Manman Ren
743a2cff04
X86: when we are auto-detecting the subtarget features, make sure we turn on
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FeatureFastUAMem for Nehalem, Westmere and Sandy Bridge.
FeatureFastUAMem is already on if we pass in nehalem or westmere as a command
argument.
rdar: 7252306
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161717 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-10 23:43:32 +00:00
Jakob Stoklund Olesen
eb74c08192
Add a proper if-conversion cost model.
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Detect when there is not enough available ILP, so if-conversion can't
speculate instructions for free.
Compute the lengthening of the critical path when inserting a select
instruction that depends on the condition as well as both sides of the
if.
Reject conversions that would stretch the critical path by more than
half a mispredict penalty.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161713 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-10 22:27:31 +00:00
Jakob Stoklund Olesen
a35bf506f4
Give MachineTraceMetrics its own debug tag.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161712 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-10 22:27:29 +00:00
Jakob Stoklund Olesen
5413b68b1f
Add more trace query functions.
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Trace::getResourceLength() computes the number of cycles required to
execute the trace when ignoring data dependencies. The number can be
compared to the critical path to estimate the trace ILP.
Trace::getPHIDepth() computes the data dependency depth of a PHI in a
trace successor that isn't necessarily part of the trace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161711 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-10 22:27:27 +00:00
Eli Friedman
6b951b25c3
The normal edge of an invoke is not allowed to branch to a block with a
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landingpad. Enforce it in the verifier, and fix the regression tests to match.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161697 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-10 20:55:20 +00:00
Manman Ren
d9b4512593
ARM: enable struct byval for AAPCS.
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This change is to be enabled in clang.
rdar://9877866
PR://13350
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161693 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-10 20:39:38 +00:00
Jakob Stoklund Olesen
870da6de2c
Add getTPred() and getFPred() functions.
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They identify the PHI predecessors in both diamonds and triangles.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161689 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-10 20:19:17 +00:00
Jakob Stoklund Olesen
8828c4ccd4
Include loop-carried dependencies when computing instr heights.
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When a trace ends with a back-edge, include PHIs in the loop header in
the height computations. This makes the critical path through a loop
more accurate by including the latencies of the last instructions in the
loop.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161688 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-10 20:11:38 +00:00
Michael Liao
2a33cec66a
add X86-specific DAG optimization to simplify boolean test
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- if a boolean test (X86ISD::CMP or X86ISD:SUB) checks a boolean value
generated from X86ISD::SETCC, try to simplify the boolean value
generation and checking by reusing the original EFLAGS with proper
condition code
- add hooks to X86 specific SETCC/BRCOND/CMOV, the major 3 places
consuming EFLAGS
part of patches fixing PR12312
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161687 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-10 19:58:13 +00:00
Eli Bendersky
ac8a4ad47d
A couple of addition comment fixes
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161678 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-10 18:30:44 +00:00
Eli Bendersky
dadace036e
Fix a couple of typos in comments
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161677 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-10 18:26:20 +00:00
Rafael Espindola
f433e800a7
Constify some basic blocks, no functionality change.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161668 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-10 15:55:25 +00:00
Michael Liao
f6c24eef62
remove tailing whitespaces and test commit
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161664 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-10 14:39:24 +00:00