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a484f2c405
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17077 Commits

Author SHA1 Message Date
Rafael Espindola
a484f2c405 Move the PTXMCAsmStreamer class to the .cpp file. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120241 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-28 14:48:34 +00:00
Rafael Espindola
e04ed7e45f Define generic 1, 2 and 4 byte pc relative relocations. They are common 
and at least the 4 byte one will be needed to implement the .cfi_* directives.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120240 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-28 14:17:56 +00:00
Bob Wilson
b1dfa7a8e0 Add support for NEON VLD2-dup instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120236 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-28 06:51:26 +00:00
Bob Wilson
f3d2f9d4be Another minor refactoring for VLD1DUP instructions. 
The op11_8 field is the same for all of them so put it in the instruction
classes instead of specifying it separately for each instruction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120234 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-28 06:51:15 +00:00
Bob Wilson
364a72a8e5 Add entry in getTargetNodeName() for ARMISD::VBICIMM. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120233 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-28 06:51:11 +00:00
Anton Korobeynikov
94c5ae0875 Move more PEI-related hooks to TFI 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120229 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-27 23:05:25 +00:00
Anton Korobeynikov
cd775ceff0 Move callee-saved regs spills / reloads to TFI 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120228 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-27 23:05:03 +00:00
Rafael Espindola
5bf7c534cf Lower TLS_addr32 and TLS_addr64. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120225 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-27 20:43:02 +00:00
Rafael Espindola
bfd2d26159 Implement the data16 prefix. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120224 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-27 20:29:45 +00:00
Bob Wilson
bce55776af Refactor. Set alignment bit in VLD1-dup instruction classes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120197 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-27 07:12:02 +00:00
Bob Wilson
2a0e97431e Add NEON VLD1-dup instructions (load 1 element to all lanes). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120194 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-27 06:35:16 +00:00
Bob Wilson
8d41294664 Fix incorrect scheduling itineraries for NEON vld1/vst1 instructions. 
I added these instructions recently but I have no idea where these "1"
values in the NextCycles field came from.  As far as I can tell now,
these instruction stages are clearly intended to overlap.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120193 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-27 06:35:09 +00:00
Daniel Dunbar
36d76a8dbc MC/Mach-O: Switch to using MachOFormat.h. 
- I'm leaving MachO.h, because I believe it has external consumers, but I would really like to eliminate it (we have stylistic disagreements with one another).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120187 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-27 04:38:36 +00:00
Rafael Espindola
fd46797d0d Remove the unused TheTarget member. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120168 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-26 04:24:21 +00:00
Rafael Espindola
2ace1b68ac Use multiple 0x66 prefixes so that all nops up to 15 bytes are a single instruction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120147 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-25 17:14:16 +00:00
Benjamin Kramer
c62feda741 Namespacify. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120146 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-25 16:42:51 +00:00
Wesley Peck
42e75a3cf1 Updating MBlaze .mask and .frame directives to match GCC's output and fixing regression introduced in 120095 by checking MCStreamer::hasRawTextSupport. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120097 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-24 16:32:35 +00:00
Wesley Peck
82dc040d06 1. Fixing error where basic block labels were not being printed out when they need to be for the MBlaze backend because AsmPrinter::isBlockOnlyReachableByFallthrough does not take into account delay slots. 
2. Re-adding .mask and .frame directives in printed assembly.
3. Adding .ent and .end directives in printed assembly.
4. Minor cleanups to MBlaze backend.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120095 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-24 15:39:32 +00:00
Kalle Raiskila
7de8101668 Use i8 as SETCC result type for i1 in SPU. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120092 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-24 12:59:16 +00:00
Kalle Raiskila
702a4046a9 Allow for 'fcmp ogt' in SPU. 
Fix by Visa Putkinen!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120090 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-24 11:42:17 +00:00
Benjamin Kramer
c21a821e9f The srem -> urem transform is not safe for any divisor that's not a power of two. 
E.g. -5 % 5 is 0 with srem and 1 with urem.

Also addresses Frits van Bommel's comments.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120049 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-23 20:33:57 +00:00
Jason W Kim
13534672de Move the ARM reloc constants to Support/ELF.h 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120035 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-23 19:40:36 +00:00
Bob Wilson
626613d5e8 Recognize sign/zero-extended constant BUILD_VECTORs for VMULL operations. 
We need to check if the individual vector elements are sign/zero-extended
values.  For now this only handles constants values.  Radar 8687140.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120034 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-23 19:38:38 +00:00
Benjamin Kramer
b70ebd2aa3 InstCombine: Reduce "X shift (A srem B)" to "X shift (A urem B)" iff B is positive. 
This allows to transform the rem in "1 << ((int)x % 8);" to an and.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120028 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-23 18:52:42 +00:00
Kalle Raiskila
0cc5b1f60e Division by pow-of-2 is not cheap on SPU, do it with 
shifts.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120022 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-23 13:27:59 +00:00
Rafael Espindola
beb6898df8 Implement the rex64 prefix. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120017 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-23 11:23:24 +00:00
Rafael Espindola
d93ceeb125 Produce a relocation for pcrel absolute values. Based on a patch by David Meyer. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120006 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-23 07:20:12 +00:00
Wesley Peck
bf17cfa3f9 Renaming ISD::BIT_CONVERT to ISD::BITCAST to better reflect the LLVM IR concept. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119990 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-23 03:31:01 +00:00
Rafael Espindola
d80f8d08ce Remove duplicated constants. Thanks to Jason for noticing it. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119985 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-22 21:49:05 +00:00
Benjamin Kramer
93f8455d73 InstCombine: Implement X - A*-B -> X + A*B. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119984 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-22 20:31:27 +00:00
Evan Cheng
ab5c703fdb Fix epilogue codegen to avoid leaving the stack pointer in an invalid 
state. Previously Thumb2 would restore sp from fp like this:
mov sp, r7
sub, sp, #4
If an interrupt is taken after the 'mov' but before the 'sub', callee-saved
registers might be clobbered by the interrupt handler. Instead, try
restoring directly from sp:
add sp, #4
Or, if necessary (with VLA, etc.) use a scratch register to compute sp and
then restore it:
sub.w r4, r7, #8
mov sp, r7
rdar://8465407


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119977 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-22 18:12:04 +00:00
Kalle Raiskila
d87e571e62 Fix a bug with extractelement on SPU. 
In the attached testcase, the element was
never extracted (missing rotate).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119973 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-22 16:28:26 +00:00
Benjamin Kramer
ce750f0332 Implement the "if (X == 6 || X == 4)" -> "if ((X|2) == 6)" optimization. 
This currently only catches the most basic case, a two-case switch, but can be
extended later.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119964 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-22 09:45:38 +00:00
Duncan Sands
3d93893895 Fix a compiler warning about Kind being used uninitialized 
when assertions are disabled.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119962 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-22 09:38:00 +00:00
Eric Christopher
9d89311df8 Pseudos default to 4byte size, let the instruction size field notice 
that branch tables are special.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119954 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-21 23:38:19 +00:00
Wesley Peck
4b04713423 Implement ELF object file writing support for the MBlaze backend. Its not perfect yet, but it works for many tests. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119952 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-21 22:06:28 +00:00
Wesley Peck
46a928b864 Implement branch analysis in the MBlaze backend. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119951 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-21 21:53:36 +00:00
Wesley Peck
6e749f31c6 Make it a little bit more explicit that the MBlaze backend only supports upto 
32-bit immediate values.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119950 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-21 21:39:46 +00:00
Wesley Peck
5437ba48ce Fix an error in the MBlaze delay slot filler where instructions that already 
fill a delay slot are moved to fill a different delay slot.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119949 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-21 21:36:12 +00:00
Chris Lattner
8bc1e45295 apparently tailcalls are better on darwin/x86-64 than on linux? 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119947 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-21 18:59:20 +00:00
Bill Wendling
dcf0a47b76 More Thumb encodings. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119940 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-21 11:49:36 +00:00
Bill Wendling
af2b573614 Add encoding for ARM "trap" instruction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119938 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-21 11:05:29 +00:00
Bill Wendling
9717fa9f29 The "trap" instruction is one of this which doesn't have a condition code. Hack 
the code to not add a "condition code" if it's trap.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119937 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-21 10:56:05 +00:00
Bill Wendling
7d0affdf02 - Give "trap" the correct encoding, at least according to Darwin's assembler. 
- Add comments saying where the encodings for other instructions came from.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119936 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-21 10:55:23 +00:00
Chris Lattner
cbf5d74e6a implement PR8524, apparently mainline gas accepts movq as an alias for movd 
when transfering between i64 gprs and mmx regs.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119931 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-21 08:18:57 +00:00
Chris Lattner
3e41106de4 add some random notes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119925 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-21 07:05:31 +00:00
Owen Anderson
aa54524a44 Use by-name rather than by-order operand matching for some NEON encodings. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119923 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-21 06:47:06 +00:00
Chris Lattner
75d8f599e7 optimize: 
void a(int x) { if (((1<<x)&8)==0) b(); }

into "x != 3", which occurs over 100 times in 403.gcc but in no
other program in llvm-test.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119922 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-21 06:44:42 +00:00
Chris Lattner
79a980ad85 tail calls on x86 are implemented. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119920 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-21 06:10:27 +00:00
Jim Grosbach
0eb49c57f0 BR_JTadd is ARM-only, so use the proper pseudo class to get the predicate. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119918 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-21 01:26:01 +00:00