Commit Graph

793 Commits

Author SHA1 Message Date
01c06d7954 AArch64: add support for llvm.aarch64.hint intrinsic
This adds a llvm.aarch64.hint intrinsic to mirror the llvm.arm.hint in order to
support the various hint intrinsic functions in the ACLE.

Add an optional pattern field that permits the subclass to specify the pattern
that matches the selection.  The intrinsic pattern is set as mayLoad, mayStore,
so overload the value for the definition of the hint instruction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212883 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-12 21:20:49 +00:00
a739834446 Allow isDereferenceablePointer to look through some bitcasts
isDereferenceablePointer should not give up upon encountering any bitcast. If
we're casting from a pointer to a larger type to a pointer to a small type, we
can continue by examining the bitcast's operand. This missing capability
was noted in a comment in the function.

In order for this to work, isDereferenceablePointer now takes an optional
DataLayout pointer (essentially all callers already had such a pointer
available). Most code uses isDereferenceablePointer though
isSafeToSpeculativelyExecute (which already took an optional DataLayout
pointer), and to enable the LICM test case, LICM needs to actually provide its DL
pointer to isSafeToSpeculativelyExecute (which it was not doing previously).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212686 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-10 05:27:53 +00:00
6d1c237e11 ARM: mark matching ARM intrinsics as MSBuiltin
A number of the ARM intrinsics are aliased with alternative names in MSVC
compatibility mode.  This change indicates those intrinsics to permit tablegen
to construct an appropriate list of MSBuiltins.  With the corresponding change
in clang, these intrinsics can then be mapped from the frontend.

The tests to validate the intrinsics are aliased correctly will be added with
the corresponding clang change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212377 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-05 20:09:24 +00:00
bb5f6229f4 TableGen: introduce support for MSBuiltin
Add MSBuiltin which is similar in vein to GCCBuiltin.  This allows for adding
intrinsics for Microsoft compatibility to individual instructions.  This is
needed to permit the creation of ARM specific MSVC extensions.

This is not currently in use, and requires an associated change in clang to
enable use of the intrinsics defined by this new class.  This merely sets the
LLVM portion of the infrastructure in place to permit the use of this
functionality.  A separate set of changes will enable the new intrinsics.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212350 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-04 18:42:25 +00:00
090a8f45f2 [ARM] Implement ISB memory barrier intrinsic
Adds support for __builtin_arm_isb. Also corrects DSB and ISB instructions
modelling by adding has-side-effects property.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212276 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-03 16:00:41 +00:00
8446d2db2a Constify the Function pointers in the result of makeSubprogramMap
These don't need to be mutable and callers being added soon in CodeGen
won't have access to non-const Module&.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212202 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-02 18:30:05 +00:00
411b036f8b Just adding a getHalfTy method to IRBuilder for completeness.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212195 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-02 17:33:00 +00:00
f5ec1bd705 Move operator[] to DomTreeNodeBase
The comment in base even refers to it, but it was only defined
in the subclass.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212169 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-02 06:50:48 +00:00
5f5939c14c InstCombine: Don't turn -(x/INT_MIN) -> x/INT_MIN
It is not safe to negate the smallest signed integer, doing so yields
the same number back.

This fixes PR20186.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212164 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-02 06:07:09 +00:00
90fdedc064 Add range for-loop iterator adapter for cases in SwitchInst.
Patch by Marcello Maggioni, reviewed by Reid Kleckner.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212163 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-02 05:32:13 +00:00
f652ec594e DebugInfo: Provide a utility for building a mapping from llvm::Function*s to llvm::DISubprograms
Update DeadArgumentElimintation to use this, with the intent of reusing
the functionality for ArgumentPromotion as well.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212122 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-01 20:05:26 +00:00
b6a4058a64 IR: Add a helper to check for LinkOnceODRLinkage
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212078 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-01 00:30:52 +00:00
93b97c9a57 Debug info: split out complex DIVariable address expressions into a
separate MDNode so they can be uniqued via folding set magic. To conserve
space, DIVariable nodes are still variable-length, with the last two
fields being optional.

No functional change.
http://reviews.llvm.org/D3526

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212050 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-30 17:17:35 +00:00
e6cfdc8471 [X86] Add support for builtin to read performance monitoring counters.
This patch adds support for a new builtin instruction called
__builtin_ia32_rdpmc.

Builtin '__builtin_ia32_rdpmc' is defined as a 'GCC builtin'; on X86, it can
be used to read performance monitoring counters. It takes as input the index
of the performance counter to read, and returns the value of the specified
performance counter as a 64-bit number.

Calls to this new builtin will map to instruction RDPMC.
The index in input to the builtin call is moved to register %ECX. The result
of the builtin call is the value of the specified performance counter (RDPMC
would return that quantity in registers RDX:RAX).

This patch:
 - Adds builtin int_x86_rdpmc as a GCCBuiltin;
 - Adds a new x86 DAG node called 'RDPMC_DAG';
 - Teaches how to lower this new builtin;
 - Adds an ISel pattern to select instruction RDPMC;
 - Fixes the definition of instruction RDPMC adding %RAX and %RDX as
   implicit definitions, and adding %ECX as implicit use;
 - Adds a LLVM test to verify that the new builtin is correctly selected.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212049 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-30 17:14:21 +00:00
7a28de08f3 [NVPTX] Add reflect intrinsic (better than matching by function name)
Also clean up some of the logic in NVVMReflect.cpp while we're messing around in there.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211948 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-27 18:36:11 +00:00
cb8f98382b [NVPTX] Fix handling of ldg/ldu intrinsics.
The address space of the pointer must be global (1) for these intrinsics.  There must also be alignment metadata attached to the intrinsic calls, e.g.

%val = tail call i32 @llvm.nvvm.ldu.i.global.i32.p1i32(i32 addrspace(1)* %ptr), !align !0

!0 = metadata !{i32 4}

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211939 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-27 18:35:51 +00:00
508c80f11f [NVPTX] Add support for efficient rotate instructions on SM 3.2+
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211934 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-27 18:35:33 +00:00
de7bbdff33 [NVPTX] Add support for isspacep instruction
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211931 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-27 18:35:24 +00:00
1571d272c8 [NVPTX] Add support for envreg reads
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211930 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-27 18:35:21 +00:00
c8a1169c93 IR: Add COMDATs to the IR
This new IR facility allows us to represent the object-file semantic of
a COMDAT group.

COMDATs allow us to tie together sections and make the inclusion of one
dependent on another. This is required to implement features like MS
ABI VFTables and optimizing away certain kinds of initialization in C++.

This functionality is only representable in COFF and ELF, Mach-O has no
similar mechanism.

Differential Revision: http://reviews.llvm.org/D4178

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211920 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-27 18:19:56 +00:00
f36f20ae7a Fix typo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211744 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-25 23:39:08 +00:00
bb167336b3 Rename loop unrolling and loop vectorizer metadata to have a common prefix.
[LLVM part]

These patches rename the loop unrolling and loop vectorizer metadata
such that they have a common 'llvm.loop.' prefix.  Metadata name
changes:

llvm.vectorizer.* => llvm.loop.vectorizer.*
llvm.loopunroll.* => llvm.loop.unroll.*

This was a suggestion from an earlier review
(http://reviews.llvm.org/D4090) which added the loop unrolling
metadata. 

Patch by Mark Heffernan.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211710 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-25 15:41:00 +00:00
b4840d7a4d Random Number Generator (llvm)
Provides an abstraction for a random number generator (RNG) that produces a stream of pseudo-random numbers.
The current implementation uses C++11 facilities and is therefore not cryptographically secure.

The RNG is salted with the text of the current command line invocation.
In addition, a user may specify a seed (reproducible builds).

In clang, the seed can be set via

-frandom-seed=X
In the back end, the seed can be set via

-rng-seed=X
This is the llvm part of the patch.
clang part: D3391

URL: http://reviews.llvm.org/D3390
Author: yln

I'm landing this for the second time, it broke Windows bots the first time around.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211705 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-25 15:21:42 +00:00
2edf5e45ec [x86] Add intrinsics for the pshufd, pshuflw, and pshufhw instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211694 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-25 13:12:54 +00:00
95eb45c5d9 R600: Fix inconsistency in rsq instructions.
R600 was using a clamped version of rsq, but SI was not. Add a
new rsq_clamped intrinsic and use them consistently.

It's unclear to me from the documentation what behavior
the R600 instructions have, so I assume they have the legacy behavior
described by the SI documents. For R600, use RECIPSQRT_IEEE
for both llvm.AMDGPU.rsq.legacy and llvm.AMDGPU.rsq. R600 also
has RECIPSQRT_FF, which I'm not sure how it fits in here.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211637 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-24 22:13:39 +00:00
10ec44d87a Add new debug kind LocTrackingOnly.
Summary:
This new debug emission kind supports emitting line location
information in all instructions, but stops code generation
from emitting debug info to the final output.

This mode is useful when the backend wants to track source
locations during code generation, but it does not want to
produce debug info. This is currently used by optimization
remarks (-pass-remarks, -pass-remarks-missed and
-pass-remarks-analysis).

To prevent debug info emission, DIBuilder never inserts the
annotation 'llvm.dbg.cu' when LocTrackingOnly is enabled.

Reviewers: echristo, dblaikie

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D4234

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211609 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-24 17:02:03 +00:00
1f659329b6 Make ObjectFile and BitcodeReader always own the MemoryBuffer.
This allows us to just use a std::unique_ptr to store the pointer to the buffer.
The flip side is that they have to support releasing the buffer back to the
caller.

Overall this looks like a more efficient and less brittle api.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211542 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-23 21:53:12 +00:00
ed143b7c0c R600/SI: Fix div_scale intrinsic.
The operand that must match one of the others does matter,
and implement selecting for it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211523 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-23 18:28:28 +00:00
d88f5b71c7 R600: Fix formatting of intrinsic definitions.
It makes more sense for the GCCBuiltin name to come immediately
after the ID name.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211522 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-23 18:28:23 +00:00
91e18f7639 Revert "Replace Execution Engine's mutex with std::recursive_mutex."
This reverts commit 1f502bd9d7, due to
GCC / MinGW's lack of support for C++11 threading.

It's possible this will go back in after we come up with a
reasonable solution.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211401 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-20 21:07:14 +00:00
212e2b9c8d Reverting size_type for the containers from size_type to unsigned.
Various places in LLVM assume that container size and count are unsigned
and do not use the container size_type. Therefore they break compilation
(or possibly executation) for LP64 systems where size_t is 64 bit while
unsigned is still 32 bit.

If we'll ever that many items in the container size_type could be made
size_t for a specific containers after reviweing its other uses.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211353 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-20 12:20:56 +00:00
ed4e8a839f The count() function for STL datatypes returns unsigned, even where it's
only 1/0 result like std::set. Some of the LLVM ADT already return unsigned
count(), while others still return bool count().

In continuation to r197879, this patch modifies DenseMap, DenseSet, 
ScopedHashTable, ValueMap:: count() to return size_type instead of bool,
1 instead of true and 0 instead of false.

size_type is typedef-ed locally within each class to size_t.

http://reviews.llvm.org/D4018

Reviewed by dblaikie.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211350 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-20 10:26:56 +00:00
160dcf5b61 Don't build switch lookup tables for dllimport or TLS variables
We would previously put dllimport variables in switch lookup tables, which
doesn't work because the address cannot be used in a constant initializer.
This is basically the same problem that we have in PR19955.

Putting TLS variables in switch tables also desn't work, because the
address of such a variable is not constant.

Differential Revision: http://reviews.llvm.org/D4220

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211331 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-20 00:38:12 +00:00
d9b35435b8 R600/SI: Add intrinsics for various math instructions.
These will be used for custom lowering and for library
implementations of various math functions, so it's useful
to expose these as builtins.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211247 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-19 01:19:19 +00:00
1f502bd9d7 Replace Execution Engine's mutex with std::recursive_mutex.
This change has a bit of a trickle down effect due to the fact that
there are a number of derived implementations of ExecutionEngine,
and that the mutex is not tightly encapsulated so is used by other
classes directly.

Reviewed by: rnk

Differential Revision: http://reviews.llvm.org/D4196

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211214 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-18 20:17:35 +00:00
02b4e6e7ab Revert "Random Number Generator (llvm)"
This reverts commit cccba093090d127e0b6d17473b14c264c14c5259.

It causes build breakage.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211146 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-18 06:33:23 +00:00
1d04a2324c Random Number Generator (llvm)
Summary:
Provides an abstraction for a random number generator (RNG) that produces a stream of pseudo-random numbers.
The current implementation uses C++11 facilities and is therefore not cryptographically secure.

The RNG is salted with the text of the current command line invocation.
In addition, a user may specify a seed (reproducible builds).

In clang, the seed can be set via
  -frandom-seed=X
In the back end, the seed can be set via
  -rng-seed=X

This is the llvm part of the patch.
clang part: D3391

Reviewers: ahomescu, rinon, nicholas, jfb

Reviewed By: jfb

Subscribers: jfb, perl

Differential Revision: http://reviews.llvm.org/D3390

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211145 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-18 06:23:25 +00:00
84fea7720c Expose ValueMap's mutex type as a typedef instead of a sys::Mutex.
This enables static polymorphism of the mutex type, which is
necessary in order to replace the standard mutex implementation
with a different type.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211080 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-17 00:17:38 +00:00
44d2cdcbf3 AArch64: Add backend intrinsic for rbit.
Define an intrinsic for the frontend to use and pattern match it to
the RBIT instruction.

rdar://9283021

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211058 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-16 21:55:35 +00:00
5c1a1b2249 ARM: intrinsic support for rbit.
We already have an ARMISD node. Create an intrinsic to map to it so we can
add support for the frontend __rbit() intrinsic.

rdar://9283021

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211057 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-16 21:55:30 +00:00
8f2a85e099 IR: add "cmpxchg weak" variant to support permitted failure.
This commit adds a weak variant of the cmpxchg operation, as described
in C++11. A cmpxchg instruction with this modifier is permitted to
fail to store, even if the comparison indicated it should.

As a result, cmpxchg instructions must return a flag indicating
success in addition to their original iN value loaded. Thus, for
uniformity *all* cmpxchg instructions now return "{ iN, i1 }". The
second flag is 1 when the store succeeded.

At the DAG level, a new ATOMIC_CMP_SWAP_WITH_SUCCESS node has been
added as the natural representation for the new cmpxchg instructions.
It is a strong cmpxchg.

By default this gets Expanded to the existing ATOMIC_CMP_SWAP during
Legalization, so existing backends should see no change in behaviour.
If they wish to deal with the enhanced node instead, they can call
setOperationAction on it. Beware: as a node with 2 results, it cannot
be selected from TableGen.

Currently, no use is made of the extra information provided in this
patch. Test updates are almost entirely adapting the input IR to the
new scheme.

Summary for out of tree users:
------------------------------

+ Legacy Bitcode files are upgraded during read.
+ Legacy assembly IR files will be invalid.
+ Front-ends must adapt to different type for "cmpxchg".
+ Backends should be unaffected by default.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210903 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-13 14:24:07 +00:00
5c792faa0e Don't use 'using std::error_code' in include/llvm.
This should make sure that most new uses use the std prefix.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210835 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-12 21:46:39 +00:00
d5132f9073 Remove system_error.h.
This is a minimal change to remove the header. I will remove the occurrences
of "using std::error_code" in a followup patch.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210803 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-12 17:38:55 +00:00
a4dc93e6b6 Do not register and de-register PassRegistrationListeners during
construction and destruction.

PassRegistrationListener is intended for use as a generic listener.
In some cases, PassRegistrationListener-derived classes were being
created, and automatically registered and de-registered in static
constructors and destructors.  Since ManagedStatics are destroyed
prior to program shutdown, this leads to errors where an attempt is
made to access a ManagedStatic that has already been destroyed.

Reviewed by: rnk, dblaikie

Differential Revision: http://reviews.llvm.org/D4106

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210724 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-12 00:16:36 +00:00
998d8f50a7 Add AVX512 masked leadz instrinsic support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210652 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-11 12:54:45 +00:00
8dea1c4167 [X86] AVX512: Add vmovntdqa
Along with the corresponding intrinsic and tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210543 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-10 16:39:53 +00:00
9de6eef6d0 Reorder Value and User fields to save 8 bytes of padding on 64-bit
Reviewered by: rafael

Differential Revision: http://reviews.llvm.org/D4073

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210501 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-09 23:32:20 +00:00
5d0f7af3dc Add a new attribute called 'jumptable' that creates jump-instruction tables for functions marked with this attribute.
It includes a pass that rewrites all indirect calls to jumptable functions to pass through these tables.

This also adds backend support for generating the jump-instruction tables on ARM and X86.
Note that since the jumptable attribute creates a second function pointer for a
function, any function marked with jumptable must also be marked with unnamed_addr.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210280 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-05 19:29:43 +00:00
0eacd38666 Add missing const specifier to a const method.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210265 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-05 14:32:15 +00:00
cfee6c49ea Add a Constant version of stripPointerCasts.
Thanks to rnk for the suggestion.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210205 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-04 19:01:48 +00:00