Commit Graph

120 Commits

Author SHA1 Message Date
Cameron Zwarich
be2119e8e2 Move getRegPressureLimit() from TargetLoweringInfo to TargetRegisterInfo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127175 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-07 21:56:36 +00:00
Evan Cheng
9fe2009956 Sorry, several patches in one.
TargetInstrInfo:
Change produceSameValue() to take MachineRegisterInfo as an optional argument.
When in SSA form, targets can use it to make more aggressive equality analysis.

Machine LICM:
1. Eliminate isLoadFromConstantMemory, use MI.isInvariantLoad instead.
2. Fix a bug which prevent CSE of instructions which are not re-materializable.
3. Use improved form of produceSameValue.

ARM:
1. Teach ARM produceSameValue to look pass some PIC labels.
2. Look for operands from different loads of different constant pool entries
   which have same values.
3. Re-implement PIC GA materialization using movw + movt. Combine the pair with
   a "add pc" or "ldr [pc]" to form pseudo instructions. This makes it possible
   to re-materialize the instruction, allow machine LICM to hoist the set of
   instructions out of the loop and make it possible to CSE them. It's a bit
   hacky, but it significantly improve code quality.
4. Some minor bug fixes as well.

With the fixes, using movw + movt to materialize GAs significantly outperform the
load from constantpool method. 186.crafty and 255.vortex improved > 20%, 254.gap
and 176.gcc ~10%.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123905 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-20 08:34:58 +00:00
Jakob Stoklund Olesen
c9df025e33 Simplify a bunch of isVirtualRegister() and isPhysicalRegister() logic.
These functions not longer assert when passed 0, but simply return false instead.

No functional change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123155 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-10 02:58:51 +00:00
Dan Gohman
fca0b106f7 Add a FIXME comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118803 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-11 18:08:43 +00:00
Jakob Stoklund Olesen
8bcf7603f7 MachineLICM should not claim to be preserving the CFG when it can split critical
edges on demand.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117982 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-01 23:59:55 +00:00
Evan Cheng
c8141dfc7f Use instruction itinerary to determine what instructions are 'cheap'.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117348 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26 02:08:50 +00:00
Evan Cheng
134982daa9 More accurate estimate / tracking of register pressure.
- Initial register pressure in the loop should be all the live defs into the
  loop. Not just those from loop preheader which is often empty.
- When an instruction is hoisted, update register pressure from loop preheader
  to the original BB.
- Treat only use of a virtual register as kill since the code is still SSA.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116956 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-20 22:03:58 +00:00
Dan Gohman
f96e4bd2a3 Make CodeGen TBAA-aware.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116890 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-20 00:31:05 +00:00
Evan Cheng
2312842de0 Re-enable register pressure aware machine licm with fixes. Hoist() may have
erased the instruction during LICM so UpdateRegPressureAfter() should not
reference it afterwards.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116845 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-19 18:58:51 +00:00
Owen Anderson
081c34b725 Get rid of static constructors for pass registration. Instead, every pass exposes an initializeMyPassFunction(), which
must be called in the pass's constructor.  This function uses static dependency declarations to recursively initialize
the pass's dependencies.

Clients that only create passes through the createFooPass() APIs will require no changes.  Clients that want to use the
CommandLine options for passes will need to manually call the appropriate initialization functions in PassInitialization.h
before parsing commandline arguments.

I have tested this with all standard configurations of clang and llvm-gcc on Darwin.  It is possible that there are problems
with the static dependencies that will only be visible with non-standard options.  If you encounter any crash in pass
registration/creation, please send the testcase to me directly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116820 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-19 17:21:58 +00:00
Daniel Dunbar
9869413802 Revert r116781 "- Add a hook for target to determine whether an instruction def
is", which breaks some nightly tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116816 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-19 17:14:24 +00:00
Andrew Trick
dc986d2462 Fix for machine licm assert: RCCost <= RegPressure[RCId]
in MultiSource/Benchmarks/VersaBench/beamformer/beamformer.
SmallSet.insert returns true if the element is inserted.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116790 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-19 02:50:50 +00:00
Evan Cheng
11e8b74a7a - Add a hook for target to determine whether an instruction def is
"long latency" enough to hoist even if it may increase spilling. Reloading
  a value from spill slot is often cheaper than performing an expensive
  computation in the loop. For X86, that means machine LICM will hoist
  SQRT, DIV, etc. ARM will be somewhat aggressive with VFP and NEON
  instructions.
- Enable register pressure aware machine LICM by default.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116781 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-19 00:55:07 +00:00
Evan Cheng
03a9fdf2e7 More machine LICM work. It now tracks register pressure for path from preheader to current BB and use the information determine whether hoisting is worthwhile.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116654 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-16 02:20:26 +00:00
Evan Cheng
0e673919f0 Register pressure and instruction latency aware machine LICM. Work in progress.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116465 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-14 01:16:09 +00:00
Owen Anderson
2ab36d3502 Begin adding static dependence information to passes, which will allow us to
perform initialization without static constructors AND without explicit initialization
by the client.  For the moment, passes are required to initialize both their
(potential) dependencies and any passes they preserve.  I hope to be able to relax
the latter requirement in the future.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116334 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-12 19:48:12 +00:00
Evan Cheng
e95f3195b8 Don't waste time unfolding simple loads. The unfolded copy won't be hoisted.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116081 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-08 18:59:19 +00:00
Owen Anderson
ce665bd2e2 Now with fewer extraneous semicolons!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115996 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-07 22:25:06 +00:00
Owen Anderson
90c579de5a Reapply r110396, with fixes to appease the Linux buildbot gods.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110460 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-06 18:33:48 +00:00
Owen Anderson
1f74590e9d Revert r110396 to fix buildbots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110410 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-06 00:23:35 +00:00
Owen Anderson
9ccaf53ada Don't use PassInfo* as a type identifier for passes. Instead, use the address of the static
ID member as the sole unique type identifier.  Clean up APIs related to this change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110396 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-05 23:42:04 +00:00
Dale Johannesen
c46a5f20c5 Comment typo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109765 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-29 17:45:24 +00:00
Owen Anderson
d13db2c59c Fix batch of converting RegisterPass<> to INTIALIZE_PASS().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109045 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-21 22:09:45 +00:00
Dale Johannesen
21d35c1399 Fix test for switch statements and increase
threshold a bit per experimentation.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108935 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-20 21:29:12 +00:00
Dale Johannesen
bf1ae5e254 Don't hoist things out of a large switch inside a
loop, for the reasons in the comments.  This is a
major win on 253.perlbmk on ARM Darwin.  I expect it
to be a good heuristic in general, but it's possible
some things will regress; I'll be watching.
7940152.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108792 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-20 00:50:13 +00:00
Evan Cheng
db89809037 Teach ProcessImplicitDefs to transform more COPY instructions into IMPLICIT_DEF (and subsequently eliminate them). This allows machine LICM to hoist IMPLICIT_DEF's. PR7620.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108304 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-14 01:22:19 +00:00
Chris Lattner
7791080151 change machinelicm to use MachineInstr::isSafeToMove. No
intended functionality change.

The avoidance of hoistiing implicitdef seems wrong though.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108109 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-12 00:00:35 +00:00
Dan Gohman
aa7426070d Fix MachineLICM to actually visit inner loops.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108001 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09 18:49:45 +00:00
Dan Gohman
853d3fb8d2 Move PHIElimination's SplitCriticalEdge for MachineBasicBlocks out
into a utility routine, teach it how to update MachineLoopInfo, and
make use of it in MachineLICM to split critical edges on demand.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106555 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-22 17:25:57 +00:00
Evan Cheng
82e0a1a1a8 Doh. Machine LICM is re-initializing the CSE map over and over. Patch by Anna Zaks. rdar://8037934.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105065 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-29 00:06:36 +00:00
Dan Gohman
e6cd757e68 Teach MachineLICM and MachineSink how to clear kill flags conservatively
when they move instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103737 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-13 20:34:42 +00:00
Jakob Stoklund Olesen
9196ab6405 When MachineLICM is hoisting a physical register after regalloc, make sure the
register is not killed in the loop.

This fixes 188.ammp on ARM where the post-ra scheduler would grab a register
that looked available but wasn't.

A testcase would be huge and fragile, sorry.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101930 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-20 18:45:47 +00:00
Evan Cheng
94d1d9c219 Postra machine licm must add registers defined by loop invariants to *all* of
the live-in sets of BBs in the loop. Otherwise later pass may end up using the
registers and override the invariant. rdar://7852937
No reasonablly sized test case possible.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101626 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-17 07:07:11 +00:00
Evan Cheng
6327537a37 Fast path implicit_def check.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101183 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-13 22:13:34 +00:00
Evan Cheng
c15d9135a8 Avoid variable shadowing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101170 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-13 20:25:29 +00:00
Evan Cheng
aeb2f4aa46 Expand postra machine licm's capability a little more. If an instruction's register operands are all loop invariants, then it's safe to hoist it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101167 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-13 20:21:05 +00:00
Evan Cheng
5dc57ce533 Teach postra machine licm to hoist more obvious invariants, e.g. instructions with no source operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101154 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-13 18:16:00 +00:00
Dan Gohman
81bf03eb5c Eliminate MachineBasicBlock::const_livein_iterator and make
MachineBasicBlock::livein_iterator a const_iterator, because
clients shouldn't ever be using the iterator interface to
mutate the livein set.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101147 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-13 16:57:55 +00:00
Benjamin Kramer
678d9b7ed0 Plug trivial leak.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101034 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-12 11:38:35 +00:00
Dan Gohman
7d597b4428 Delete this obsolete comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100858 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-09 14:12:01 +00:00
Evan Cheng
4038f9c21b Make post regalloc machine licm functional. It now passes all of MultiSource.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100742 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-08 01:03:47 +00:00
Evan Cheng
5b463905be Add comments for missed opportunities.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100610 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-07 06:00:33 +00:00
Evan Cheng
348856e56a Fix typo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100609 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-07 05:59:12 +00:00
Evan Cheng
d94671a25e Post regalloc LICM. Work in progress.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100592 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-07 00:41:17 +00:00
Evan Cheng
506049f29f - Change MachineInstr::isIdenticalTo to take a new option that determines whether it should skip checking defs or at least virtual register defs. This subsumes part of the TargetInstrInfo::isIdentical functionality.
- Eliminate TargetInstrInfo::isIdentical and replace it with produceSameValue. In the default case, produceSameValue just checks whether two machine instructions are identical (except for virtual register defs). But targets may override it to check for unusual cases (e.g. ARM pic loads from constant pools).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97628 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-03 01:44:33 +00:00
Dan Gohman
6ac33b4533 Don't try to replace physical registers when doing CSE.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97360 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-28 01:33:43 +00:00
Dan Gohman
a363a9b71a Don't unconditionally suppress hoisting of instructions with implicit
defs or uses. The regular def and use checking below covers them, and
can be more precise. It's safe to hoist an instruction with a dead
implicit def if the register isn't live into the loop header.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97352 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-28 00:08:44 +00:00
Chris Lattner
518bb53485 move target-independent opcodes out of TargetInstrInfo
into TargetOpcodes.h.  #include the new TargetOpcodes.h
into MachineInstr.  Add new inline accessors (like isPHI())
to MachineInstr, and start using them throughout the 
codebase.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95687 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-09 19:54:29 +00:00
David Greene
65a41eb59e Change errs() to dbgs().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92547 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-05 00:03:48 +00:00
Dan Gohman
92329c7fbe Add Loop contains utility methods for testing whether a loop
contains another loop, or an instruction. The loop form is
substantially more efficient on large loops than the typical
code it replaces.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91654 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-18 01:24:09 +00:00