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Author SHA1 Message Date
Chris Lattner
61129252e4 fix rdar://8456361 - llvm-mc rejects 'rep movsd' 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114526 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-22 03:50:32 +00:00
Chris Lattner
492a43e6f6 convert the last 4 X86ISD nodes that should have memoperands to have them. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114523 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-22 01:28:21 +00:00
Chris Lattner
2156b79c49 give X86ISD::FNSTCW16m a memoperand, since it touches memory. It only 
can access the stack due to how it is generated though.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114522 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-22 01:11:26 +00:00
Chris Lattner
0729093cd7 give FP_TO_INT16_IN_MEM and friends a memoperand. They are only 
used with stack slots, but hey, lets be safe.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114521 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-22 01:05:16 +00:00
Chris Lattner
40d66052f4 linux has a different stack alignment than the mac, relax this a bit. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114519 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-22 00:46:26 +00:00
Chris Lattner
8864155a35 give VZEXT_LOAD a memory operand, it now works with segment registers. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114515 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-22 00:34:38 +00:00
Chris Lattner
0b79cfee15 revert r114386 now that address modes work correctly, we get a nice 
call through gs-relative memory now.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114510 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-22 00:11:31 +00:00
Chris Lattner
93c4a5bef7 give LCMPXCHG_DAG[8] a memory operand, allowing it to work with addrspace 256/257 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114508 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-21 23:59:42 +00:00
Chris Lattner
b72d53d8ef filecheckize 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114507 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-21 23:57:27 +00:00
Evan Cheng
691e64a54c OptimizeCompareInstr should avoid iterating pass the beginning of the MBB when the 'and' instruction is after the comparison. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114506 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-21 23:49:07 +00:00
Jim Grosbach
882ef2b76a Add start of support for MC instruction printer of ARM jump tables. Filling in 
the rest of it is next up.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114500 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-21 23:28:16 +00:00
Owen Anderson
8614167572 Enable target-specific mul-lowering on ARM, even at -Os. Remove a test that this makes 
irrelevant, but add a new test for the new, improved functionality.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114494 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-21 22:51:46 +00:00
Jakob Stoklund Olesen
5fa42a45a1 Build the complement interval dupli after the split intervals instead of 
creating it before and subtracting split ranges.

This way, the SSA update code in LiveIntervalMap can properly create and use new
phi values in dupli. Now it is possible to create split regions where a value
escapes along two different CFG edges, creating phi values outside the split
region.

This is a work in progress and probably quite broken.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114492 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-21 22:32:21 +00:00
Chris Lattner
b86faa17a4 reimplement support for GS and FS relative address space matching 
by having X86DAGToDAGISel::SelectAddr get passed in the parent node
of the operand match (the load/store/atomic op) and having it get
the address space from that, instead of having special FS/GS addr
mode operations that require duplicating the entire instruction set
to support.

This makes FS and GS relative accesses *far* more predictable and
work much better.  It also simplifies the X86 backend a bit, more
to come.

There is still a pending issue with nodes like ISD::PREFETCH and
X86ISD::FLD, which really should be MemSDNode's but aren't.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114491 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-21 22:07:31 +00:00
John Thompson
67aff164c0 Fixed pr20314-2.c failure, added E, F, p constraint letters. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114490 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-21 22:04:54 +00:00
Chris Lattner
d847bc20b8 Rework passing parent pointers into complexpatterns, I forgot 
that complex patterns are matched after the entire pattern has
a structural match, therefore the NodeStack isn't in a useful
state when the actual call to the matcher happens.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114489 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-21 22:00:25 +00:00
Bob Wilson
71dc4d96ed Move a sign-extend or a zero-extend of a load to the same basic block as the 
load when the type of the load is not legal, even if truncates are not free.
The load is going to be legalized to an extending load anyway.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114488 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-21 21:54:27 +00:00
Bob Wilson
9120f5c35b Clarify a comment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114487 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-21 21:44:14 +00:00
Dan Gohman
9f27074f42 Add some utility routines. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114483 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-21 21:20:13 +00:00
Devang Patel
704b07613e Add insertAfter. This should have accompanied previous check-in. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114481 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-21 21:10:42 +00:00
Devang Patel
44cfe14445 If only user of a vreg is an copy instruction to export copy of vreg out of current basic block then insert DBG_VALUE so that debug value of the variable is also transfered to new vreg. 
Testcase is in r114476.
This fixes radar 8412415.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114478 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-21 20:56:33 +00:00
Devang Patel
161f0caaf9 Use FileCheck 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114475 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-21 20:50:32 +00:00
Chris Lattner
77bd88cda5 correct this logic. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114474 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-21 20:46:40 +00:00
Owen Anderson
bc146b0a4d Reimplement r114460 in target-independent DAGCombine rather than target-dependent, by using 
the predicate to discover the number of sign bits.  Enhance X86's target lowering to provide
a useful response to this query.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114473 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-21 20:42:50 +00:00
Chris Lattner
78d3af47f5 just like they can opt into getting the root of the pattern being 
matched, allow ComplexPatterns to opt into getting the parent node
of the operand being matched.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114472 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-21 20:37:12 +00:00
Chris Lattner
52a261b3c1 fix a long standing wart: all the ComplexPattern's were being 
passed the root of the match, even though only a few patterns
actually needed this (one in X86, several in ARM [which should
be refactored anyway], and some in CellSPU that I don't feel 
like detangling).   Instead of requiring all ComplexPatterns to
take the dead root, have targets opt into getting the root by
putting SDNPWantRoot on the ComplexPattern.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114471 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-21 20:31:19 +00:00
Jakob Stoklund Olesen
7c72707216 Refix MSVC9 and upper_bound. It actually needs a fully symmetric comparator. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114469 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-21 20:16:12 +00:00
Chris Lattner
701cd62297 even though I'm about to rip it out, simplify the address mode stuff 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114468 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-21 19:41:58 +00:00
Chris Lattner
84bd98ac7b finish pushing MachinePointerInfo through selectiondags. At this point, 
I think I've audited all uses, so it should be dependable for address spaces,
and the pointer+offset info should also be accurate when there.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114464 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-21 18:58:22 +00:00
Chris Lattner
fc448ff89b convert a couple more places to use the new getStore() 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114463 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-21 18:51:21 +00:00
Chris Lattner
6229d0acb8 update a bunch of code to use the MachinePointerInfo version of getStore. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114461 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-21 18:41:36 +00:00
Owen Anderson
c004eec71b When adding the carry bit to another value on X86, exploit the fact that the carry-materialization 
(sbbl x, x) sets the registers to 0 or ~0.  Combined with two's complement arithmetic, we can fold
the intermediate AND and the ADD into a single SUB.

This fixes <rdar://problem/8449754>.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114460 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-21 18:41:19 +00:00
Jakob Stoklund Olesen
89bfef003e Don't pollute the global namespace. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114459 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-21 18:34:17 +00:00
Jakob Stoklund Olesen
2de0e808c1 MSVC9 does not support upper_bound with an asymmetric comparator. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114455 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-21 18:24:30 +00:00
Bob Wilson
65ffec49f7 Define the TargetLowering::getTgtMemIntrinsic hook for ARM so that NEON load 
and store intrinsics are represented with MemIntrinsicSDNodes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114454 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-21 17:56:22 +00:00
Chris Lattner
8026a9d3ee eliminate some uses of the getStore overload. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114453 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-21 17:50:43 +00:00
Chris Lattner
da2d8e1032 eliminate an old SelectionDAG::getTruncStore method, propagating 
MachinePointerInfo around more.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114452 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-21 17:42:31 +00:00
Chris Lattner
5cd9391a08 eliminate last SelectionDAG::getLoad old entrypoint, on to stores. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114450 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-21 17:28:52 +00:00
Chris Lattner
d0e139fa74 fix the code that infers SV info to be correct when dealing 
with an indexed load/store that has an offset in the index.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114449 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-21 17:24:05 +00:00
Jakob Stoklund Olesen
f568b2706e Add LiveInterval::find and use it for most LiveRange searching operations 
instead of calling lower_bound or upper_bound directly.

This cleans up the search logic a bit because {lower,upper}_bound compare
LR->start by default, and it is usually simpler to search LR->end.

Funnelling all searches through one function also makes it possible to replace
the search algorithm with something faster than binary search.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114448 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-21 17:12:18 +00:00
Jakob Stoklund Olesen
0635ead2c4 Remove dead method. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114447 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-21 17:12:15 +00:00
Chris Lattner
3d6ccfba31 propagate MachinePointerInfo through various uses of the old 
SelectionDAG::getExtLoad overload, and eliminate it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114446 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-21 17:04:51 +00:00
Jim Grosbach
532baa5d53 Fix errant printing of [v]ldm instructions that aren't a pop 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114445 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-21 16:45:31 +00:00
Benjamin Kramer
a53557e4fb Simplify code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114444 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-21 16:41:29 +00:00
Chris Lattner
ecf42c4720 continue MachinePointerInfo'izing, eliminating use of one of the old 
getLoad overloads.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114443 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-21 16:36:31 +00:00
Chris Lattner
fa45901eaa convert dagcombine off the old form of getLoad. This fixes several bugs 
with SVOffset computation.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114442 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-21 16:08:50 +00:00
Benjamin Kramer
28b4afc103 Make CreateComplexVariable independent of SmallVector. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114439 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-21 16:00:03 +00:00
Chris Lattner
f165806655 simplify DAGCombiner::SimplifySelectOps step #2/2. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114437 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-21 15:58:55 +00:00
Chris Lattner
1806161a0b substantially reduce indentation and simplify DAGCombiner::SimplifySelectOps. 
no functionality change (step #1)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114436 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-21 15:46:59 +00:00
Mikhail Glushenkov
f41b75d85b Trailing whitespace, 80-col violations. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114435 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-21 14:59:50 +00:00