Commit Graph

211 Commits

Author SHA1 Message Date
David Woodhouse
674140fc3e ]x86] Allow segment and address-size overrides for CMPS[BWLQ] (PR9385)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199806 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-22 15:08:36 +00:00
David Woodhouse
ccbfd5b18a [x86] Allow address-size overrides for STOS[BWLQ] (PR9385)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199804 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-22 15:08:21 +00:00
David Woodhouse
db9fa461d7 [x86] Allow segment and address-size overrides for LODS[BWLQ] (PR9385)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199803 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-22 15:08:08 +00:00
David Woodhouse
70ece0ada7 [x86] Support i386-*-*-code16 triple for emitting 16-bit code
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199648 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-20 12:02:25 +00:00
Craig Topper
ad6662f202 Replace duplicated code with a existing helper function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199468 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-17 06:42:38 +00:00
Craig Topper
85026d9375 Allow x86 mov instructions to/from memory with absolute address to be encoded and disassembled with a segment override prefix. Fixes PR16962.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199364 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-16 07:36:58 +00:00
Craig Topper
fab01c1908 Remove use of OpSize for populating VEX_PP field. A prefix encoding is now used instead. Simplify some other code. No functional changes intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199353 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-16 06:14:45 +00:00
Craig Topper
525ae45240 Separate the concept of 16-bit/32-bit operand size controlled by 0x66 prefix and the current mode from the concept of SSE instructions using 0x66 prefix as part of their encoding without being affected by the mode.
This should allow SSE instructions to be encoded correctly in 16-bit mode which r198586 probably broke.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199193 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-14 07:41:20 +00:00
Elena Demikhovsky
1f044d443d AVX-512: Embedded Rounding Control - encoding and printing
Changed intrinsics for vrcp14/vrcp28 vrsqrt14/vrsqrt28 - aligned with GCC.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199102 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-13 12:55:03 +00:00
David Woodhouse
38b362617c [x86] Support R_386_PC8, R_386_PC16 and R_X86_64_PC8
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198763 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-08 12:58:40 +00:00
David Woodhouse
2634d1f6da [x86] Do not relax PUSHi16 to PUSHi32 (PR18414)
They do *different* things to %esp, so they are not equivalent.

Rename PUSHi8 to PUSH32i8 and add the missing PUSH16i8.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198761 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-08 12:58:32 +00:00
David Woodhouse
aab59870a4 [x86] Fix MOV8ao8 et al for 16-bit mode, fix up disassembler to understand
It seems there is no separate instruction class for having AdSize *and*
OpSize bits set, which is required in order to disambiguate between all
these instructions. So add that to the disassembler.

Hm, perhaps we do need an AdSize16 bit after all?

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198759 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-08 12:58:24 +00:00
David Woodhouse
4f32ce2436 [x86] Use 16-bit addressing where possible in 16-bit mode
Where "where possible" means that it's an immediate value and it's below
0x10000. In fact GAS will either truncate or error with larger values,
and will insist on using the addr32 prefix to get 32-bit addressing. So
perhaps we should do that, in a later patch.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198758 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-08 12:58:18 +00:00
David Woodhouse
975fe2cfc3 [x86] Fix JCXZ,JECXZ_32 for 16-bit mode
JCXZ should have the 0x67 prefix only if we're in 32-bit mode, so make that
appropriately conditional. And JECXZ needs the prefix instead.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198757 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-08 12:58:12 +00:00
Iain Sandoe
9c0a05c7af [patch] Adjust behavior of FDE cross-section relocs for targets that don't support abs-differences.
Modern versions of OSX/Darwin's ld (ld64 > 97.17) have an optimisation present that allows the back end to omit relocations (and replace them with an absolute difference) for FDE some text section refs.

This patch allows a backend to opt-in to this behaviour by setting "DwarfFDESymbolsUseAbsDiff".  At present, this is only enabled for modern x86 OSX ports.

test changes by David Fang.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198744 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-08 10:22:54 +00:00
Chandler Carruth
974a445bd9 Re-sort all of the includes with ./utils/sort_includes.py so that
subsequent changes are easier to review. About to fix some layering
issues, and wanted to separate out the necessary churn.

Also comment and sink the include of "Windows.h" in three .inc files to
match the usage in Memory.inc.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198685 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-07 11:48:04 +00:00
Tim Northover
0aba46f4cd ARM MachO: sort out isTargetDarwin/isTargetIOS/... checks.
The ARM backend has been using most of the MachO related subtarget
checks almost interchangeably, and since the only target it's had to
run on has been IOS (which is all three of MachO, Darwin and IOS) it's
worked out OK so far.

But we'd like to support embedded targets under the "*-*-none-macho"
triple, which means everything starts falling apart and inconsistent
behaviours emerge.

This patch should pick a reasonably sensible set of behaviours for the
new triple (and any others that come along, with luck). Some choices
were debatable (notably FP == r7 or r11), but we can revisit those
later when deficiencies become apparent.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198617 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-06 14:28:05 +00:00
Craig Topper
0fee6d9703 Remove SegOvrBits from X86 TSFlags since they weren't being used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198588 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-06 06:51:58 +00:00
Craig Topper
46832216c6 Remove argument to fix build bot failure.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198587 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-06 06:09:03 +00:00
Craig Topper
30be10a06e Add OpSize16 bit, for instructions which need 0x66 prefix in 16-bit mode
The 0x66 prefix toggles between 16-bit and 32-bit addressing mode.
So in 32-bit mode it is used to switch to 16-bit addressing mode for the
following instruction, while in 16-bit mode it's the other way round — it's
used to switch to 32-bit mode instead.

Thus, emit the 0x66 prefix byte for OpSize only in 32-bit (and 64-bit) mode,
and introduce a new OpSize16 bit which is used in 16-bit mode instead.

This is just the basic infrastructure for that change; a subsequent patch
will add the new OpSize16 bit to the 32-bit instructions that need it.

Patch from David Woodhouse.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198586 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-06 06:02:58 +00:00
Craig Topper
93c9401dff [x86] Add basic support for .code16
This is not really expected to work right yet. Mostly because we will
still emit the OpSize (0x66) prefix in all the wrong places, along with
a number of other corner cases. Those will all be fixed in the subsequent
commits.

Patch from David Woodhouse.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198584 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-06 04:55:54 +00:00
Craig Topper
074b501c17 Fix ModR/M byte output for 16-bit addressing modes (PR18220)
Add some tests to validate correct register selection, including a fix
to an existing test which was requiring the *wrong* output.

Patch from David Woodhouse.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198566 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-05 19:40:56 +00:00
Rafael Espindola
8e0f67dcec Make the llvm mangler depend only on DataLayout.
Before this patch any program that wanted to know the final symbol name of a
GlobalValue had to link with Target.

This patch implements a compromise solution where the mangler uses DataLayout.
This way, any tool that already links with Target (llc, clang) gets the exact
behavior as before and new IR files can be mangled without linking with Target.

With this patch the mangler is constructed with just a DataLayout and DataLayout
is extended to include the information the Mangler needs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198438 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-03 19:21:54 +00:00
Elena Demikhovsky
3062a311ac AVX-512: Added intrinsics for vcvt, vcvtt, vrndscale, vcmp
Printing rounding control.
Enncoding for EVEX_RC (rounding control).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198277 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-01 15:12:34 +00:00
Craig Topper
64f275b59c Remove MRMInitReg form now that it's last use is gone.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198257 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-31 03:19:03 +00:00
Craig Topper
ad5e4b9476 Merge case statements to remove redundant code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198241 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-30 19:47:49 +00:00
Timur Iskhodzhanov
8aa3ff05c1 [COFF] Add support for the .secidx directive
Reviewed at http://llvm-reviews.chandlerc.com/D2445

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197826 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-20 18:15:00 +00:00
David Fang
b59d46efa5 on darwin<10, fallback to .weak_definition (PPC,X86)
.weak_def_can_be_hidden was not yet supported by the system assembler

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196970 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-10 21:37:41 +00:00
Tim Northover
7af55ad434 Make Triple's isOSBinFormatXXX functions partition triple-space.
Most users would be surprised if "isCOFF" and "isMachO" were simultaneously
true, unless they'd put the compiler in a box with a gun attached to a photon
detector.

This makes sure precisely one of the three formats is true for any triple and
simplifies some target logic based on that.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196934 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-10 16:57:43 +00:00
Rafael Espindola
5201d61654 Don't add suffixes for stdcall/fastcall on 64 coff.
This matches the behavior of both msvc and mingw.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196814 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-09 20:44:48 +00:00
Alp Toker
087ab613f4 Correct word hyphenations
This patch tries to avoid unrelated changes other than fixing a few
hyphen-related ambiguities and contractions in nearby lines.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196471 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-05 05:44:44 +00:00
Kevin Enderby
f50f3a3bb9 Fix a bug in darwin's 32-bit X86 handling of evaluating fixups.
Where it would use a scattered relocation entry but falls back to a
normal relocation entry because the FixupOffset is more than 24-bits.

The bug is in the X86MachObjectWriter::RecordScatteredRelocation() where
it changes reference parameter FixedValue but then returns false to indicate
it did not create a scattered relocation entry.  The fix is simply to save the
original value of the parameter FixedValue at the start of the method and
restore it if we are returning false in that case.

rdar://15526046


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196432 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-04 23:36:24 +00:00
Rafael Espindola
9472fd7403 Refactor the setting of PrivateGlobalPrefix.
No functionality change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196170 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-02 23:39:26 +00:00
NAKAMURA Takumi
ad363187c4 [CMake] Let add_public_tablegen_target responsible to provide dependency to CommonTableGen.
add_public_tablegen_target adds *CommonTableGen to LLVM_COMMON_DEPENDS.
LLVM_COMMON_DEPENDS affects add_llvm_library (and other add_target stuff) within its scope.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195927 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-28 17:04:04 +00:00
Rafael Espindola
4ca0ef70cd The global prefix is always one char. Don't use a string for it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195926 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-28 17:00:49 +00:00
NAKAMURA Takumi
98bb341955 [CMake] Prune include_directories() in llvm/lib/Target, take #2.
I forgot to commit them. They were staging in my local repo.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195924 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-28 15:30:37 +00:00
Rafael Espindola
02ddf4abc2 Do the string comparison in the constructor instead of once per nop.
Thanks to Roman Divacky for the suggestion.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195684 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-25 20:50:03 +00:00
Rafael Espindola
8f6631cdb6 Don't use nopl in cpus that don't support it.
Patch by Mikulas Patocka. I added the test. I checked that for cpu names that
gas knows about, it also doesn't generate nopl.

The modified cpus:
i686 - there are i686-class CPUs that don't have nopl: Via c3, Transmeta
        Crusoe, Microsoft VirtualBox - see
        https://bbs.archlinux.org/viewtopic.php?pid=775414
k6, k6-2, k6-3, winchip-c6, winchip2 - these are 586-class CPUs
via c3 c3-2 - see https://bugs.archlinux.org/task/19733 as a proof that
        Via c3 and c3-Nehemiah don't have nopl

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195679 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-25 20:15:14 +00:00
Juergen Ributzka
354362524a [weak vtables] Remove a bunch of weak vtables
This patch removes most of the trivial cases of weak vtables by pinning them to
a single object file. The memory leaks in this version have been fixed. Thanks
Alexey for pointing them out.

Differential Revision: http://llvm-reviews.chandlerc.com/D2068

Reviewed by Andy

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195064 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-19 00:57:56 +00:00
Alexey Samsonov
b21ab43cfc Revert r194865 and r194874.
This change is incorrect. If you delete virtual destructor of both a base class
and a subclass, then the following code:
  Base *foo = new Child();
  delete foo;
will not cause the destructor for members of Child class. As a result, I observe
plently of memory leaks. Notable examples I investigated are:
ObjectBuffer and ObjectBufferStream, AttributeImpl and StringSAttributeImpl.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194997 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-18 09:31:53 +00:00
Jim Grosbach
35de9946d5 X86: Encode the 'h' cpu subtype in the MachO header for x86.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194906 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-16 00:52:57 +00:00
Juergen Ributzka
5a364c5561 [weak vtables] Remove a bunch of weak vtables
This patch removes most of the trivial cases of weak vtables by pinning them to
a single object file.

Differential Revision: http://llvm-reviews.chandlerc.com/D2068

Reviewed by Andy

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194865 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-15 22:34:48 +00:00
Jim Grosbach
dc7eb3e023 X86: Assembly files with .cfi_cfa_def shouldn't hit llvm_unreachable()
On darwin, when trying to create compact unwind info, a .cfi_cfa_def
directive would case an llvm_unreachable() to be hit. Back off when we
see this directive and generate the regular DWARF style eh_frame.

rdar://15406518

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194285 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-08 22:33:06 +00:00
Tom Roeder
4ca9a2a0ad This commit adds some (but not all) of the x86-64 relocations that are not
currently supported in the ELF object writer, along with a simple test case.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193709 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-30 18:47:25 +00:00
Hans Wennborg
22f9dd4591 MC asm parser: allow ?'s in symbol names, and handle @'s in names in MS asm
This is another (final?) stab at making us able to parse our own asm output
on Windows.

Symbols on Windows often contain @'s and ?'s in their names. Our asm parser
didn't like this. ?'s were not allowed, and @'s were intepreted as trying to
reference PLT/GOT/etc.

We can't just add quotes around the bad names, since e.g. for MinGW, we use gas
to assemble, and it doesn't like quotes in some places (notably in .def
directives).

This commit makes us allow ?'s in symbol names, and @'s in symbol names for MS
assembly.

Differential Revision: http://llvm-reviews.chandlerc.com/D1978

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193000 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-18 20:46:28 +00:00
Rafael Espindola
06957f43f6 Add a MCAsmInfoELF class and factor some code into it.
We had a MCAsmInfoCOFF, but no common class for all the ELF MCAsmInfos before.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192760 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-16 01:34:32 +00:00
Rafael Espindola
c7ce3e4f42 Move .ident handling to MCStreamer.
No functionality change, but exposes the API so that codegen can use it too.

Patch by Katya Romanova.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192757 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-16 01:05:45 +00:00
Rafael Espindola
320296a4cf Add a MCTargetStreamer interface.
This patch fixes an old FIXME by creating a MCTargetStreamer interface
and moving the target specific functions for ARM, Mips and PPC to it.

The ARM streamer is still declared in a common place because it is
used from lib/CodeGen/ARMException.cpp, but the Mips and PPC are
completely hidden in the corresponding Target directories.

I will send an email to llvmdev with instructions on how to use this.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192181 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-08 13:08:17 +00:00
Craig Topper
f63c806e11 Change type of XOP flag in code emitters to a bool. Remove a some unneeded cases from switch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191632 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-29 08:33:34 +00:00
Craig Topper
bd0decae3c Add comments for XOPA map introduced with TBM instructions.a
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191630 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-29 06:31:18 +00:00