Commit Graph

93362 Commits

Author SHA1 Message Date
Reid Kleckner
b0a9ffaeb0 Fix a crash bug in dumping options with groups
Option groups don't have prefixes.  Option dumping is basically dead
code unless there is something wrong with the option table, so this
isn't an important crasher.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185031 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-26 22:43:37 +00:00
Stephen Lin
165a7a925d Clarify and doxygen-ify comments
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185030 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-26 22:27:50 +00:00
Chad Rosier
096c0a0331 [Mips Disassembler] Have the DecodeCCRRegisterClass function use the getReg
function to lookup the proper tablegen'ed register enumeration.  Previously,
it was using the encoded value directly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185026 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-26 22:23:32 +00:00
Stephen Lin
6b97ebe9a3 ARM: Proactively ensure that the LowerCallResult hack for 'this'-returns is not used for incompatible calling conventions.
(Currently, ARM 'this'-returns are handled in the standard calling convention case by treating R0 as preserved and doing some extra magic in LowerCallResult; this may not apply to calling conventions added in the future so this patch provides and documents an interface for indicating such)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185024 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-26 21:42:14 +00:00
Manman Ren
02e75021d8 Debug Info: clean up usage of Verify.
No functionality change.
It should suffice to check the type of a debug info metadata, instead of
calling Verify.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185020 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-26 21:26:10 +00:00
Stephen Lin
8b9962d514 Minor formatting fix to ARMBaseRegisterInfo::getCalleeSavedRegs
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185016 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-26 20:19:06 +00:00
Rafael Espindola
7a231f5a1e Rename PathV2 to just Path now that it is the only one.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185015 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-26 19:33:03 +00:00
Akira Hatanaka
842cfc91f2 [mips] Do not emit ".option pic0" if target is mips64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185012 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-26 19:08:49 +00:00
Akira Hatanaka
9a308df027 [mips] Improve code generation for constant multiplication using shifts, adds and
subs.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185011 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-26 18:48:17 +00:00
Michael Gottesman
a8f9364461 [APFloat] Removed debugging cruft that snuck in.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184974 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-26 17:59:36 +00:00
Nadav Rotem
b5a8a905ae The SLP Vectorizer works across basic blocks. Update the docs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184973 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-26 17:59:35 +00:00
Rafael Espindola
97c2a0a110 Use enums instead of raw octal values.
Patch by 罗勇刚(Yonggang Luo).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184971 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-26 17:28:04 +00:00
Nadav Rotem
e26fa2dd73 Erase all of the instructions that we RAUWed
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184969 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-26 17:16:09 +00:00
Joey Gouly
849eedce99 Add a subtarget feature 'v8' to the ARM backend.
This allows for targeting the ARMv8 AArch32 variant.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184967 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-26 16:58:26 +00:00
Nadav Rotem
29acf7e03a Do not add cse-ed instructions into the visited map because we dont want to consider them as a candidate for replacement of instructions to be visited.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184966 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-26 16:54:53 +00:00
Tim Northover
c19bd32136 ARM: fix more cases where predication may or may not be allowed
Unfortunately this addresses two issues (by the time I'd disentangled the logic
it wasn't worth putting it back to half-broken):

+ Coprocessor instructions should all be predicable in Thumb mode.
+ BKPT should never be predicable.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184965 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-26 16:52:40 +00:00
Tim Northover
c1a91dd97b ARM: allow predicated barriers in Thumb mode
The barrier instructions are only "always-execute" in ARM mode, they can quite
happily sit inside an IT block in Thumb.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184964 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-26 16:52:32 +00:00
Joey Gouly
fce567aec9 Remove the 'generic' CPU from the ARM eabi attributes printer.
Make v4 the default ARM architecture attribute, to match CodeGen.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184962 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-26 16:39:06 +00:00
Rafael Espindola
460e75a453 PathV1 is deprecated since the 18th of Dec 2010. Remove it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184960 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-26 16:24:35 +00:00
Rafael Espindola
4ae6d4042b Add a convenience functions that don't return if the directory existed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184955 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-26 15:21:13 +00:00
Rafael Espindola
df0f525cc4 Remove unused includes.
llvm itself is now PathV1 clean.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184947 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-26 13:54:34 +00:00
Ulrich Weigand
8950dd127a [PowerPC] Accept 17-bit signed immediates for addis
The assembler currently strictly verifies that immediates for
s16imm operands are in range (-32768 ... 32767).  This matches
the behaviour of the GNU assembler, with one exception: gas
allows, as a special case, operands in an extended range
(-65536 .. 65535) for the addis instruction only (and its
extended mnemonic lis).

The main reason for this seems to be to allow using unsigned
16-bit operands for lis, e.g. like lis %r1, 0xfedc.

Since this has been supported by gas for a long time, and
assembler source code seen "in the wild" actually exploits
this feature, this patch adds equivalent support to LLVM
for compatibility reasons.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184946 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-26 13:49:53 +00:00
Ulrich Weigand
0b8594268f [PowerPC] Support symbolic u16imm operands
Currently, all instructions taking s16imm operands support symbolic
operands.  However, for u16imm operands, we only support actual
immediate integers.  This causes the assembler to reject code like

  ori %r5, %r5, symbol@l

This patch changes the u16imm operand definition to likewise
accept symbolic operands.  In fact, s16imm and u16imm can
share the same encoding routine, now renamed to getImm16Encoding.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184944 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-26 13:49:15 +00:00
Amaury de la Vieuville
6e0857e0b6 ARM: operands should be explicit when disassembled
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184943 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-26 13:39:07 +00:00
Venkatraman Govindaraju
eb4a55c949 [Sparc]: Add memory operands for the frame references in the storeRegToStackSlot
and loadRegFromStackSlot.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184935 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-26 12:40:16 +00:00
Elena Demikhovsky
d8026708ef Fixed a comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184933 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-26 12:15:53 +00:00
NAKAMURA Takumi
7e980a6845 Suppress llvm/test/Other/can-execute.txt on msys bash.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184932 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-26 10:56:44 +00:00
Elena Demikhovsky
87070fe107 Optimized integer vector multiplication operation by replacing it with shift/xor/sub when it is possible. Fixed a bug in SDIV, where the const operand is not a splat constant vector.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184931 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-26 10:55:03 +00:00
Kostya Serebryany
d4429214a2 [asan] workaround for PR16277: don't instrument AllocaInstr with alignment more than the redzone size
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184928 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-26 09:49:52 +00:00
Kostya Serebryany
20985711c7 [asan] add option -asan-keep-uninstrumented-functions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184927 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-26 09:18:17 +00:00
Andy Gibbs
0259c0cde5 Provide bootstrap support to build only llvm+clang when using cmake.
Where a source tree is complete with lld, lldb and polly, it may not be possible to use cmake to configure build scripts if the host compiler it not capable of compiling these sub-projects.  This change makes it possible to first build a bootstrap clang compiler when can then be used to build a complete llvm toolchain.  An example bootstrap build sequence could be as follows:

$ mkdir bootstrap
$ cd bootstrap
$ cmake -G 'Unix Makefiles'
        -DCMAKE_BUILD_TYPE:STRING=Release
        -DCMAKE_PREFIX_PATH:STRING=$(pwd)
        -DLLVM_TARGETS_TO_BUILD:STRING=host
        -DLLVM_INCLUDE_TOOLS:STRING=bootstrap-only
        ../source
$ make clang  # build clang only for host

$ cd ..
$ export CC=$(realpath bootstrap/bin)/clang
$ export CXX=$(realpath bootstrap/bin)/clang++

$ mkdir final
$ cd final
$ cmake -G 'Unix Makefiles' ../source
$ make all check-all


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184924 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-26 08:05:08 +00:00
Andy Gibbs
84bb3a2af2 Support using "host" as a target in LLVM_TARGETS_TO_BUILD when using cmake.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184923 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-26 07:57:53 +00:00
Rafael Espindola
255aa3c154 Remove calls to Path in #ifdefs that don't seem to be used in any of the bots :-(
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184920 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-26 06:10:32 +00:00
Rafael Espindola
903701dfb7 Add a simpler version of remove_all.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184919 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-26 06:06:54 +00:00
Rafael Espindola
b6df0bc95a Fix the build when __APPLE__ is defined.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184917 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-26 05:25:44 +00:00
Rafael Espindola
bdfe4399db Remove sys::GetMainExecutable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184916 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-26 05:05:37 +00:00
Rafael Espindola
50188c1f42 Port GetMainExecutable over to PathV2.
I will remove the V1 version as soon as I change clang in the next commit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184914 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-26 05:01:35 +00:00
Rafael Espindola
2c63b27e9f Remove PathWithStatus.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184910 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-26 04:15:55 +00:00
Nick Lewycky
34b96d1576 dbgs() << Instruction doesn't print a newline on the end any more. Update these
debug statements to add a missing newline. Also canonicalize to '\n' instead of
"\n"; the latter calls a function with a loop the former does not.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184897 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-26 00:30:18 +00:00
Adrian Prantl
a7e4d19dac s/C++0x/C++11/
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184892 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-25 23:42:37 +00:00
Jakob Stoklund Olesen
b0f8341b34 Merge isReachable into isBackedge.
Prefer using RPO.lookup() instead of RPO[] which can mutate the map.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184891 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-25 23:32:10 +00:00
Nadav Rotem
805e8a01fe SLPVectorizer: support slp-vectorization of PHINodes between basic blocks
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184888 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-25 23:04:09 +00:00
Jakob Stoklund Olesen
b1c0cc22dd Print block frequencies in decimal form.
This is easier to read than the internal fixed-point representation.

If anybody knows the correct algorithm for converting fixed-point
numbers to base 10, feel free to fix it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184881 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-25 21:57:38 +00:00
Tom Stellard
5e48a0e9ae R600: Use new getNamedOperandIdx function generated by TableGen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184880 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-25 21:22:18 +00:00
Tom Stellard
898b9f020d TableGen: Generate a function for getting operand indices based on their defined names
This patch modifies TableGen to generate a function in
${TARGET}GenInstrInfo.inc called getNamedOperandIdx(), which can be used
to look up indices for operands based on their names.

In order to activate this feature for an instruction, you must set the
UseNamedOperandTable bit.

For example, if you have an instruction like:

def ADD : TargetInstr <(outs GPR:$dst), (ins GPR:$src0, GPR:$src1)>;

You can look up the operand indices using the new function, like this:

Target::getNamedOperandIdx(Target::ADD, Target::OpName::dst)  => 0
Target::getNamedOperandIdx(Target::ADD, Target::OpName::src0) => 1
Target::getNamedOperandIdx(Target::ADD, Target::OpName::src1) => 2

The operand names are case sensitive, so $dst and $DST are considered
different operands.

This change is useful for R600 which has instructions with a large number
of operands, many of which model single bit instruction configuration
values.  These configuration bits are common across most instructions,
but may have a different operand index depending on the instruction type.
It is useful to have a convenient way to look up the operand indices,
so these bits can be generically set on any instruction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184879 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-25 21:22:09 +00:00
Arnold Schwaighofer
34eb2406b4 X86 cost model: Vectorizing integer division is a bad idea
radar://14057959

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184872 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-25 19:14:09 +00:00
Bob Wilson
a1fe2948ed Fix SROA to avoid unnecessary scalar conversions for 1-element vectors.
When a 1-element vector alloca is promoted, a store instruction can often be
rewritten without converting the value to a scalar and using an insertelement
instruction to stuff it into the new alloca.  This patch just adds a check
to skip that conversion when it is unnecessary.  This turns out to be really
important for some ARM Neon operations where <1 x i64> is used to get around
the fact that i64 is not a legal type.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184870 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-25 19:09:50 +00:00
Manman Ren
2560e242c8 Remove unused code. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184866 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-25 18:49:55 +00:00
Bill Wendling
a37d96a04b The GCDA 402 format won't have a second checksum either.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184864 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-25 18:13:52 +00:00
Ulrich Weigand
5de735a962 [PowerPC] Support @got modifier
Add VK_... values and relocation types necessary to support
the @got family of modifiers.  Used by the asm parser only.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184860 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-25 16:49:50 +00:00