Nicolas Geoffray
5af214fef0
The code model of JIT should default to JITDefault.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138819 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-30 19:50:33 +00:00
Rafael Espindola
151ab3e2f7
Adds support for variable sized allocas. For a variable sized alloca,
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code is inserted to first check if the current stacklet has enough
space. If so, space is allocated by simply decrementing the stack
pointer. Otherwise a runtime routine (__morestack_allocate_stack_space
in libgcc) is called which allocates the required memory from the
heap.
Patch by Sanjoy Das.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138818 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-30 19:47:04 +00:00
Rafael Espindola
d07b7ec772
Adds a SelectionDAG node X86SegAlloca which will be custom lowered
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from DYNAMIC_STACKALLOC.
Two new pseudo instructions (SEG_ALLOCA_32 and SEG_ALLOCA_64) which
will match X86SegAlloca (based on word size) are also added. They
will be custom emitted to inject the actual stack handling code.
Patch by Sanjoy Das.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138814 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-30 19:43:21 +00:00
Rafael Espindola
76927d7586
Emit segmented-stack specific code into function prologues for
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X86. Modify the pass added in the previous patch to call this new
code.
This new prologues generated will call a libgcc routine (__morestack)
to allocate more stack space from the heap when required
Patch by Sanjoy Das.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138812 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-30 19:39:58 +00:00
Rafael Espindola
0f9827cd94
Command line option to enable support for segmented stacks:
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-segmented-stacks.
Patch by Sanjoy Das!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138811 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-30 19:29:02 +00:00
Evan Cheng
37fefc20d3
Follow up to r138791.
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Add a instruction flag: hasPostISelHook which tells the pre-RA scheduler to
call a target hook to adjust the instruction. For ARM, this is used to
adjust instructions which may be setting the 's' flag. ADC, SBC, RSB, and RSC
instructions have implicit def of CPSR (required since it now uses CPSR physical
register dependency rather than "glue"). If the carry flag is used, then the
target hook will *fill in* the optional operand with CPSR. Otherwise, the hook
will remove the CPSR implicit def from the MachineInstr.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138810 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-30 19:09:48 +00:00
Owen Anderson
6e4be237b0
When walking backwards to eliminate final stores to allocas at the end of a function, encountering an unrelated store should not cause us to give up like encountering a load does.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138809 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-30 18:51:55 +00:00
Benjamin Kramer
9942acab0a
Teach macho-dump how to dump linkedit_data load commands.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138807 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-30 18:33:37 +00:00
Benjamin Kramer
bc6b89ed31
Add load commands from Lion to Macho.h.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138806 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-30 18:33:34 +00:00
Tobias Grosser
d36d2db62a
Update docs: Bugpoint understands -O[123]
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Eli added this in revision 132695.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138805 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-30 18:26:11 +00:00
Andrew Trick
7c12837916
Lit option for ignoring stderr output.
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This is useful for testing a build a temporarily hand instrumented
build.
Patch by arrowdodger!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138804 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-30 17:42:33 +00:00
Roman Divacky
0aaa9195b5
Set CR1EQ only when lowering vararg floating arguments (not any vararg
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arguments as before), unset CR1EQ otherwise.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138802 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-30 17:04:16 +00:00
James Molloy
e7815c22fc
Fix typos in SPUMCTargetDesc.h
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Patch supplied by Liu (projlc@gmail.com )
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138799 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-30 07:27:02 +00:00
James Molloy
7e14b240a8
Fix typo in BlackfinFrameLowering.h
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Patch supplied by Liu (projlc@gmail.com )
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138798 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-30 07:26:11 +00:00
James Molloy
4d8af4ee6e
Fix typo in MSP430MCTargetDesc.h.
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Patch supplied by Liu (projlc@gmail.com )
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138797 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-30 07:24:47 +00:00
James Molloy
afaf80a13b
Fix typo in MipsMCTargetDesc.h; Patch supplied by Liu (proljc@gmail.com)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138796 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-30 07:23:29 +00:00
Craig Topper
3daa5c29d4
Add vvvv support to disassembling of instructions with MRMDestMem and MRMDestReg form. Needed to support mem dest form of vmaskmovps/d. Fixes PR10807.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138795 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-30 07:09:35 +00:00
Bob Wilson
e497906e87
Do not try to rematerialize a value from a partial definition.
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I don't currently have a good testcase for this; will try to get one
tomorrow. <rdar://problem/10032939>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138794 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-30 05:36:02 +00:00
Evan Cheng
342e3161d9
Change ARM / Thumb2 addc / adde and subc / sube modeling to use physical
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register dependency (rather than glue them together). This is general
goodness as it gives scheduler more freedom. However it is motivated by
a nasty bug in isel.
When a i64 sub is expanded to subc + sube.
libcall #1
\
\ subc
\ / \
\ / \
\ / libcall #2
sube
If the libcalls are not serialized (i.e. both have chains which are dag
entry), legalizer can serialize them in arbitrary orders. If it's
unlucky, it can force libcall #2 before libcall #1 in the above case.
subc
|
libcall #2
|
libcall #1
|
sube
However since subc and sube are "glued" together, this ends up being a
cycle when the scheduler combine subc and sube as a single scheduling
unit.
The right solution is to fix LegalizeType too chains the libcalls together.
However, LegalizeType is not processing nodes in order so that's harder than
it should be. For now, the move to physical register dependency will do.
rdar://10019576
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138791 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-30 01:34:54 +00:00
Jim Grosbach
d3765189bf
Revert 138781. It's not playing nicely with the immediate forms for ADC.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138782 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-29 23:24:15 +00:00
Jim Grosbach
e94a5b1218
Thumb2 assembler aliases for ADC/SBC w/o the .w suffix.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138781 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-29 23:20:54 +00:00
Owen Anderson
694e0ffb8a
Add missing encoding information for some of the GPR<->FP register moves.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138780 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-29 23:15:25 +00:00
Jim Grosbach
abd3f60859
Remove redundant tests from XFAIL'ed test file.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138779 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-29 23:04:04 +00:00
Jim Grosbach
a01e12499f
Thumb2 assembly parsing and encoding support for ADC(immediate).
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138778 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-29 23:01:38 +00:00
Jim Grosbach
056cb4c0f6
Remove test file. Superceded by other more exhaustive tests.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138777 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-29 23:00:19 +00:00
Jim Grosbach
f8e1e3e729
Thumb2 parsing and encoding for IT blocks.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138773 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-29 22:24:09 +00:00
Kevin Enderby
fff64ca9cf
Fix the disassembly of the X86 crc32 instruction. Bug 10702 and rdar://8795217
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138771 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-29 22:06:28 +00:00
Eli Friedman
f3704769bb
Explicitly zero out parts of a vector which are required to be zero by the algorithm in LowerUINT_TO_FP_i32. This only has a substantial effect on the generated code when the input is extracted from a vector register; other ways of loading an i32 do the appropriate zeroing implicitly. Fixes PR10802.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138768 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-29 21:15:46 +00:00
Jim Grosbach
d33b276bcb
Tidy up. Whitespace.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138767 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-29 21:15:20 +00:00
Owen Anderson
acb274baac
Apply the same fix for the change in LDR_PRE_IMM/LDRB_PRE_IMM operand encodings to the load-store optimizer that I applied to the instruction selector in r138758. Fixes ary3 from the nightly test suite.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138766 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-29 21:14:19 +00:00
Bill Wendling
8e5cf90923
Fix grammar, noticed by Duncan.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138764 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-29 21:03:12 +00:00
Owen Anderson
1f26758510
Specify an additional fixed bit in the PLD/PLDW/PLI register-register encoding.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138760 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-29 20:42:00 +00:00
Bill Wendling
6af6824eb4
Update tests to new EH model. Add landingpad instructions to landing pads.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138759 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-29 20:39:23 +00:00
Owen Anderson
c4e16de765
addrmode_imm12 and addrmode2_offset encode their immediate values differently. Update the manual instruction selection code that was encoding them the addrmode2 way even though LDR_PRE_IMM/LDRB_PRE_IMM had switched to addrmode_imm12. Should fix a number of nightly test failures.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138758 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-29 20:16:50 +00:00
Nadav Rotem
89879ec76b
Fixes following the CR by Chris and Duncan:
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Optimize chained bitcasts of the form A->B->A.
Undo r138722 and change isEliminableCastPair to allow this case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138756 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-29 19:58:36 +00:00
Owen Anderson
0da10cf44d
Improve handling of #-0 offsets for many more pre-indexed addressing modes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138754 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-29 19:36:44 +00:00
Bill Wendling
98ba358fdb
Initialize CompactUnwindSection so that other targets won't use an uninitialized value.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138752 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-29 18:25:59 +00:00
Eli Friedman
4db5acaf48
Expand ATOMIC_LOAD and ATOMIC_STORE for architectures I don't know well enough to fix properly.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138751 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-29 18:23:02 +00:00
Jim Grosbach
7e0d22cbf7
Tidy up. 80 columns.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138750 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-29 18:22:04 +00:00
Benjamin Kramer
3dedf7e2c8
Dump with dbgs() instead of printf.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138749 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-29 18:14:17 +00:00
Benjamin Kramer
4a3d0a56eb
Make GCC happy by adding parens.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138748 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-29 18:14:15 +00:00
Owen Anderson
50e2dedb51
Add testcase for r138746.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138747 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-29 18:02:40 +00:00
Owen Anderson
07700d486e
Update the load-store optimizer for changes to the operands on LDR_PRE_IMM and LDRB_PRE_IMM in r138653.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138746 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-29 17:59:41 +00:00
Matt Beaumont-Gay
9d74909378
Fix a test that wasn't testing the right thing.
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The APFloat "Zero" test was actually calling the
APFloat(const fltSemantics &, integerPart) constructor, and EXPECT_EQ was
treating 0 and -0 as equal.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138745 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-29 17:54:20 +00:00
Bruno Cardoso Lopes
41dfabb0e3
Move non-intruction patterns to a more appropriate place!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138744 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-29 17:51:24 +00:00
Owen Anderson
63553c77cd
Add support for parsing #-0 on non-memory-operand immediate values, and add a testcase that necessitates it.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138739 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-29 17:17:09 +00:00
Andrew Trick
0e122d1c24
Reapply r138695. Fix PassManager stack depths.
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Patch by Xiaoyi Guo!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138737 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-29 17:07:00 +00:00
Tobias Grosser
05d7138018
Add AMDIL as valid target triple to LLVM.
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Submitted by: Villmow, Micah <Micah.Villmow@amd.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138734 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-29 15:44:55 +00:00
Nicolas Geoffray
1c36ba50ac
Remove premature previous commit.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138725 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-28 14:52:51 +00:00
Duncan Sands
fd9c4f76f4
Fix PR5329: pay attention to constructor/destructor priority
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when outputting them. With this, the entire LLVM testsuite
passes when built with dragonegg.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138724 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-28 13:17:22 +00:00