Commit Graph

22 Commits

Author SHA1 Message Date
Chris Lattner
18a4c16726 move dwarf debug info section selection stuff from TAI to
TLOF, unifying all the dwarf targets at the same time.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77889 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-02 07:24:22 +00:00
Chris Lattner
09e820b07c simplify SPULinuxTargetAsmInfo, remove use of TM.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77869 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-02 04:44:33 +00:00
Chris Lattner
8d4a0a328a remove TargetAsmInfo::TM, which is now dead. The basic TAI class now
no longer depends on TM!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77863 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-02 04:27:24 +00:00
Chris Lattner
b80610cd13 REmove dead fields of TAI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77820 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-01 22:40:22 +00:00
Chris Lattner
78a0e1bd53 remove a pointless override.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77723 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-31 20:36:15 +00:00
Chris Lattner
f0144127b9 Rip all of the global variable lowering logic out of TargetAsmInfo. Since
it is highly specific to the object file that will be generated in the end,
this introduces a new TargetLoweringObjectFile interface that is implemented
for each of ELF/MachO/COFF/Alpha/PIC16 and XCore.

Though still is still a brutal and ugly refactoring, this is a major step
towards goodness.

This patch also:
1. fixes a bunch of dangling pointer problems in the PIC16 backend.
2. disables the TargetLowering copy ctor which PIC16 was accidentally using.
3. gets us closer to xcore having its own crazy target section flags and
   pic16 not having to shadow sections with its own objects.
4. fixes wierdness where ELF targets would set CStringSection but not
   CStringSection_.  Factor the code better.
5. fixes some bugs in string lowering on ELF targets.




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77294 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-28 03:13:23 +00:00
Chris Lattner
e346694a81 Eliminate getNamed/getUnnamedSection, adding a new and unified getOrCreateSection
instead.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77186 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-27 06:17:14 +00:00
Chris Lattner
5fe575ff4f Eliminate SectionFlags, just embed a SectionKind into Section
instead and drive things based off of that.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77184 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-27 05:32:16 +00:00
Chris Lattner
0fcf4dc6d3 untangle a TargetAsmInfo hack where ELFTargetAsmInfo would create a
'unnamed' bss section, but some impls would want a named one.  Since
they don't have consistent behavior, just make each target do their
own thing, instead of doing something "sortof common" then having
targets change immutable objects later.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77165 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-26 19:23:28 +00:00
Chris Lattner
b4fc419d83 this is (unfortunately) several changes mixed together:
1. Spell SectionFlags::Writeable as "Writable".
2. Add predicates for deriving SectionFlags from SectionKinds.
3. Sink ELF-specific getSectionPrefixForUniqueGlobal impl into
   ELFTargetAsmInfo.
4. Fix SectionFlagsForGlobal to know that BSS/ThreadBSS has the
   BSS bit set (the real fix for PR4619).
5. Fix isSuitableForBSS to not put globals with explicit sections
   set in BSS (which was the reason #4 wasn't fixed earlier).
6. Remove my previous hack for PR4619.




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77085 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-25 18:57:34 +00:00
Chris Lattner
b839c3f577 simplify macro debug info directive handling.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73736 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-18 23:31:37 +00:00
Scott Michel
9de57a9ed2 CellSPU:
- Update DWARF debugging support.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63059 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-26 22:33:37 +00:00
Scott Michel
f0569be4a9 - Remove Tilmann's custom truncate lowering: it completely hosed over
DAGcombine's ability to find reasons to remove truncates when they were not
  needed. Consequently, the CellSPU backend would produce correct, but _really
  slow and horrible_, code.

  Replaced with instruction sequences that do the equivalent truncation in
  SPUInstrInfo.td.

- Re-examine how unaligned loads and stores work. Generated unaligned
  load code has been tested on the CellSPU hardware; see the i32operations.c
  and i64operations.c in CodeGen/CellSPU/useful-harnesses.  (While they may be
  toy test code, it does prove that some real world code does compile
  correctly.)

- Fix truncating stores in bug 3193 (note: unpack_df.ll will still make llc
  fault because i64 ult is not yet implemented.)

- Added i64 eq and neq for setcc and select/setcc; started new instruction
  information file for them in SPU64InstrInfo.td. Additional i64 operations
  should be added to this file and not to SPUInstrInfo.td.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61447 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-27 04:51:36 +00:00
Scott Michel
73655bc67f CellSPU: Bring SPU's assembly printer more in-line with current LLVM code
structure. Assembly printer now outputs the correct section for strings.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58921 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-08 18:59:02 +00:00
Scott Michel
d9890dee7c CellSPU: Ensure that C strings are always put in the .rodata section
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58839 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-07 11:06:44 +00:00
Scott Michel
d03eeafd9f Teach CellSPU about ELF sections and new section emitter classes.
NB: This is likely to need more work.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58832 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-07 04:36:25 +00:00
Dan Gohman
8f092252d3 Refactor various TargetAsmInfo subclasses' TargetMachine members away
adding a TargetMachine member to the base TargetAsmInfo class instead.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58624 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-03 18:22:42 +00:00
Anton Korobeynikov
6481873dc0 Get rid of now unused {Four,Eight,Sixteen}ByteConstantSection
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56580 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-24 22:18:54 +00:00
Scott Michel
053c1da8d9 Overhaul Cell SPU's addressing mode internals so that there are now
only two addressing mode nodes, SPUaform and SPUindirect (vice the
three previous ones, SPUaform, SPUdform and SPUxform). This improves
code somewhat because we now avoid using reg+reg addressing when
it can be avoided. It also simplifies the address selection logic,
which was the main point for doing this.

Also, for various global variables that would be loaded using SPU's
A-form addressing, prefer D-form offs[reg] addressing, keeping the
base in a register if the variable is used more than once.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46483 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-29 02:16:57 +00:00
Chris Lattner
4ee451de36 Remove attribution from file headers, per discussion on llvmdev.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45418 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-29 20:36:04 +00:00
Scott Michel
2466c3766d Updated source file headers to llvm coding standard.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44597 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-05 01:40:25 +00:00
Scott Michel
564427eabd Main CellSPU backend files checked in. Intrinsics and autoconf files
remain.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44595 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-05 01:24:05 +00:00