Commit Graph

19226 Commits

Author SHA1 Message Date
Bill Wendling
b47f06ee6c Merging r182254:
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r182254 | jholewinski | 2013-05-20 05:13:32 -0700 (Mon, 20 May 2013) | 12 lines

[NVPTX] Add GenericToNVVM IR converter to better handle idiomatic LLVM IR inputs

This converter currently only handles global variables in address space 0. For
these variables, they are promoted to address space 1 (global memory), and all
uses are updated to point to the result of a cvta.global instruction on the new
variable.

The motivation for this is address space 0 global variables are illegal since we
cannot declare variables in the generic address space.  Instead, we place the
variables in address space 1 and explicitly convert the pointer to address
space 0. This is primarily intended to help new users who expect to be able to
place global variables in the default address space.
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2013-05-29 06:54:20 +00:00
Bill Wendling
a12cd23d07 Merging r182253:
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r182253 | jholewinski | 2013-05-20 05:13:28 -0700 (Mon, 20 May 2013) | 1 line

[NVPTX] Fix i1 kernel parameters and global variables.  ABI rules say we need to use .u8 for i1 parameters for kernels.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_33@182825 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-29 06:53:35 +00:00
Bill Wendling
da897215b2 Merging r182656:
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r182656 | d0k | 2013-05-24 11:05:35 -0700 (Fri, 24 May 2013) | 3 lines

LoopVectorize: LoopSimplify can't canonicalize loops with an indirectbr in it, don't assert on those cases.

Fixes PR16139.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_33@182785 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-28 18:37:09 +00:00
Bill Wendling
1df0680640 Merging r182485:
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r182485 | arnolds | 2013-05-22 09:54:56 -0700 (Wed, 22 May 2013) | 7 lines

LoopVectorize: Make Value pointers that could be RAUW'ed a VH

The Value pointers we store in the induction variable list can be RAUW'ed by a
call to SCEVExpander::expandCodeFor, use a TrackingVH instead. Do the same thing
in some other places where we store pointers that could potentially be RAUW'ed.

Fixes PR16073.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_33@182492 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-22 17:30:06 +00:00
Bill Wendling
62131ab280 Merging r182486:
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r182486 | d0k | 2013-05-22 10:01:12 -0700 (Wed, 22 May 2013) | 3 lines

X86: When expanding PCMPGTQ to PCMPGTD we always want to compare the lower halves as unsigned.

Take #2 on fixing PR15977.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_33@182489 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-22 17:23:54 +00:00
Bill Wendling
595bc150b4 Merging r181366:
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r181366 | enderby | 2013-05-07 14:40:58 -0700 (Tue, 07 May 2013) | 6 lines

Fix a bug in the MC asm parser evaluating expressions.  It was treating:
A = 9
B = 3 * A - 2 * A + 1 as  B = 3 * A - (2 * A + 1)

rdar://13816516

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_33@182438 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-21 23:47:17 +00:00
Bill Wendling
629c73232c Merging r182387:
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r182387 | jholewinski | 2013-05-21 07:37:16 -0700 (Tue, 21 May 2013) | 7 lines

Drop @llvm.annotation and @llvm.ptr.annotation intrinsics during codegen.

The intrinsic calls are dropped, but the annotated value is propagated.

Fixes PR 15253

Original patch by Zeng Bin!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_33@182417 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-21 20:23:13 +00:00
Bill Wendling
5f5295224d Merging r182364:
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r182364 | d0k | 2013-05-21 02:58:54 -0700 (Tue, 21 May 2013) | 4 lines

X86: When emulating unsigned PCMPGTQ with PCMPGTD, fix the sign bit for the smaller type.

Otherwise we'll get a mix of signed and unsigned compares.
Fixes PR15977.
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2013-05-21 20:13:22 +00:00
Bill Wendling
717979bbd0 Merging r182344:
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r182344 | mren | 2013-05-20 17:57:22 -0700 (Mon, 20 May 2013) | 7 lines

Dwarf: use a single line table to generate assembly when .loc is used.

This is to fix PR15408 where an undefined symbol Lline_table_start1 is used.
Since we do not generate the debug_line section when .loc is used,
Lline_table_start1 is not emitted and we can't refer to it when calculating
at_stmt_list for a compile unit.

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2013-05-21 01:03:46 +00:00
Bill Wendling
f86bbdcdad Merging r182113:
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r182113 | tstellar | 2013-05-17 08:23:21 -0700 (Fri, 17 May 2013) | 9 lines

R600: Fix encoding for R600 family GPUs

Reviewed-by: Vincent Lejeune <vljn@ovi.com>

https://bugs.freedesktop.org/show_bug.cgi?id=64193
https://bugs.freedesktop.org/show_bug.cgi?id=64257
https://bugs.freedesktop.org/show_bug.cgi?id=64320

NOTE: This is a candidate for the 3.3 branch.
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2013-05-17 23:36:26 +00:00
Bill Wendling
1ce52f1601 Merging r181678:
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r181678 | rafael | 2013-05-12 17:18:24 -0700 (Sun, 12 May 2013) | 1 line

XFAIL this test for mingw too.
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2013-05-17 18:49:16 +00:00
Bill Wendling
e07b0900bf Merging r181600:
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r181600 | aaronballman | 2013-05-10 07:42:16 -0700 (Fri, 10 May 2013) | 1 line

XFAILing this test on Win32 to unbreak the build bots.
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2013-05-17 18:48:58 +00:00
Bill Wendling
2fc0483faf Merging r181540:
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r181540 | void | 2013-05-09 13:10:38 -0700 (Thu, 09 May 2013) | 11 lines

Generate a compact unwind encoding in the face of a stack alignment push.

We generate a `push' of a random register (%rax) if the stack needs to be
aligned by the size of that register. However, this could mess up compact unwind
generation. In particular, we want to still generate compact unwind in the
presence of this monstrosity.

Check if the push of of the %rax/%eax register. If it is and it's marked with
the `FrameSetup' flag, then we can generate a compact unwind encoding for the
function only if the push is the last FrameSetup instruction.

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2013-05-16 00:29:29 +00:00
Bill Wendling
d9b720d279 Merging r181580:
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r181580 | tstellar | 2013-05-09 19:09:45 -0700 (Thu, 09 May 2013) | 10 lines

R600: Remove AMDILPeeopholeOptimizer and replace optimizations with tablegen patterns

The BFE optimization was the only one we were actually using, and it was
emitting an intrinsic that we don't support.

https://bugs.freedesktop.org/show_bug.cgi?id=64201

Reviewed-by: Christian König <christian.koenig@amd.com>

NOTE: This is a candidate for the 3.3 branch.
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2013-05-16 00:27:57 +00:00
Bill Wendling
91310e4a30 Merging r181579:
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r181579 | tstellar | 2013-05-09 19:09:39 -0700 (Thu, 09 May 2013) | 8 lines

R600: Expand SUB for v2i32/v4i32

Patch by: Aaron Watry

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Signed-off-by: Aaron Watry <awatry@gmail.com>

NOTE: This is a candidate for the 3.3 branch.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_33@181953 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-16 00:27:42 +00:00
Bill Wendling
3e17699c38 Merging r181578:
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r181578 | tstellar | 2013-05-09 19:09:34 -0700 (Thu, 09 May 2013) | 10 lines

R600: Expand MUL for v4i32/v2i32

Fixes piglit test for OpenCL builtin mul24, and allows mad24 to run.

Patch by: Aaron Watry

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Signed-off-by: Aaron Watry <awatry@gmail.com>

NOTE: This is a candidate for the 3.3 branch.
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2013-05-16 00:27:29 +00:00
Bill Wendling
0b74e32c2e Merging r181577:
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r181577 | tstellar | 2013-05-09 19:09:29 -0700 (Thu, 09 May 2013) | 10 lines

R600: Expand SRA for v4i32/v2i32

v2: Add v4i32 test

Patch by: Aaron Watry

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Signed-off-by: Aaron Watry <awatry@gmail.com>

NOTE: This is a candidate for the 3.3 branch.
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2013-05-16 00:27:17 +00:00
Bill Wendling
717969d98f Merging r181576:
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r181576 | tstellar | 2013-05-09 19:09:24 -0700 (Thu, 09 May 2013) | 10 lines

R600: Expand vselect for v4i32 and v2i32

v2: Add vselect v4i32 test

Patch by: Aaron Watry

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Signed-off-by: Aaron Watry <awatry@gmail.com>

NOTE: This is a candidate for the 3.3 branch.
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2013-05-16 00:27:04 +00:00
Bill Wendling
a3d7a30740 Merging r181842:
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r181842 | arnolds | 2013-05-14 15:33:24 -0700 (Tue, 14 May 2013) | 14 lines

ARM ISel: Don't create illegal types during LowerMUL

The transformation happening here is that we want to turn a
"mul(ext(X), ext(X))" into a "vmull(X, X)", stripping off the extension. We have
to make sure that X still has a valid vector type - possibly recreate an
extension to a smaller type. In case of a extload of a memory type smaller than
64 bit we used create a ext(load()). The problem with doing this - instead of
recreating an extload - is that an illegal type is exposed.

This patch fixes this by creating extloads instead of ext(load()) sequences.

Fixes PR15970.

radar://13871383
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2013-05-15 23:41:52 +00:00
Bill Wendling
5b85a9b5ad Merging r181524:
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r181524 | rafael | 2013-05-09 10:22:59 -0700 (Thu, 09 May 2013) | 4 lines

Don't replace an alias in llvm.used with its target.

When we replace an internal alias with its target, be careful not to
replace the entry in llvm.used (and llvm.compiler_used).
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2013-05-15 18:16:42 +00:00
Bill Wendling
52b488a3f8 Merging r181800:
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r181800 | wschmidt | 2013-05-14 09:08:32 -0700 (Tue, 14 May 2013) | 15 lines

PPC32: Fix stack collision between FP and CR save areas.

The changes to CR spill handling missed a case for 32-bit PowerPC.
The code in PPCFrameLowering::processFunctionBeforeFrameFinalized()
checks whether CR spill has occurred using a flag in the function
info.  This flag is only set by storeRegToStackSlot and
loadRegFromStackSlot.  spillCalleeSavedRegisters does not call
storeRegToStackSlot, but instead produces MI directly.  Thus we don't
see the CR is spilled when assigning frame offsets, and the CR spill
ends up colliding with some other location (generally the FP slot).

This patch sets the flag in spillCalleeSavedRegisters for PPC32 so
that the CR spill is properly detected and gets its own slot in the
stack frame.

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2013-05-14 18:34:27 +00:00
Bill Wendling
06362e2450 Merging r181586:
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r181586 | d0k | 2013-05-10 02:16:52 -0700 (Fri, 10 May 2013) | 3 lines

InstCombine: Verify the type before transforming uitofp into select.

PR15952.
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2013-05-14 18:30:01 +00:00
Bill Wendling
0a3c6b4fcc Merging r181397:
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r181397 | nicholas | 2013-05-08 02:00:10 -0700 (Wed, 08 May 2013) | 3 lines

Fix a bug in codegenprep where it was losing track of values OptimizeMemoryInst
by switching to a ValueMap. Patch by Andrea DiBiagio!

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_33@181619 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-10 18:23:11 +00:00
Bill Wendling
5f32469bd4 Merging r181423:
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r181423 | hfinkel | 2013-05-08 05:16:14 -0700 (Wed, 08 May 2013) | 5 lines

PPCInstrInfo::optimizeCompareInstr should not optimize FP compares

The floating-point record forms on PPC don't set the condition register bits
based on a comparison with zero (like the integer record forms do), but rather
based on the exception status bits.
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2013-05-09 07:33:50 +00:00
Bill Wendling
c7594e48ed Merging r181286:
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r181286 | arnolds | 2013-05-06 21:37:05 -0700 (Mon, 06 May 2013) | 7 lines

LoopVectorize: getConsecutiveVector must respect signed arithmetic

We were passing an i32 to ConstantInt::get where an i64 was needed and we must
also pass the sign if we pass negatives numbers. The start index passed to
getConsecutiveVector must also be signed.

Should fix PR15882.
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2013-05-08 18:13:06 +00:00
David Blaikie
d2e0f7ee15 DebugInfo: Support imported modules in lexical blocks
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181271 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-06 23:33:07 +00:00
David Majnemer
8ec23cb07e InstCombine: (X ^ signbit) + C -> X + (signbit ^ C)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181249 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-06 21:21:31 +00:00
Bill Wendling
d87dceb8d6 Reduce attributes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181245 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-06 20:57:23 +00:00
Rafael Espindola
7098ae2fee Split Alignment out of the Section Characteristics.
The alignment is just a byte in the middle of Characteristics, not an
independent flag. Making it an independent field in the yaml
representation makes it more yamlio friendly.

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2013-05-06 20:11:21 +00:00
Jean-Luc Duprat
0aa2b8800c Test results verified using FileCheck rather than grep | count
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181234 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-06 18:45:16 +00:00
Andrew Trick
fcf79528da Rotate multi-exit loops even if the latch was simplified.
Test case by Michele Scandale!

Fixes PR10293: Load not hoisted out of loop with multiple exits.

There are few regressions with this patch, now tracked by
rdar:13817079, and a roughly equal number of improvements. The
regressions are almost certainly back luck because LoopRotate has very
little idea of whether rotation is profitable. Doing better requires a
more comprehensive solution.

This checkin is a quick fix that lacks generality (PR10293 has
a counter-example). But it trivially fixes the case in PR10293 without
interfering with other cases, and it does satify the criteria that
LoopRotate is a loop canonicalization pass that should avoid
heuristics and special cases.

I can think of two approaches that would probably be better in
the long run. Ultimately they may both make sense.

(1) LoopRotate should check that the current header would make a good
loop guard, and that the loop does not already has a sufficient
guard. The artifical SimplifiedLoopLatch check would be unnecessary,
and the design would be more general and canonical. Two difficulties:

- We need a strong guarantee that we won't endlessly rotate, so the
  analysis would need to be precise in order to avoid the
  SimplifiedLoopLatch precondition.

- Analysis like this are usually based on SCEV, which we don't want to
  rely on.

(2) Rotate on-demand in late loop passes. This could even be done by
shoving the loop back on the queue after the optimization that needs
it. This could work well when we find LICM opportunities in
multi-branch loops. This requires some work, and it doesn't really
solve the problem of SCEV wanting a loop guard before the analysis.

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2013-05-06 17:58:18 +00:00
Tom Stellard
f07b5373d7 R600: Emit config values in register / value pairs
Reviewed-by: Vincent Lejeune <vljn@ovi.com>
Tested-By: Aaron Watry <awatry@gmail.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181228 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-06 17:50:51 +00:00
Tom Stellard
4f3d8a6440 R600: Stop emitting the instruction type byte before each instruction
Reviewed-by: Vincent Lejeune <vljn@ovi.com>
Tested-By: Aaron Watry <awatry@gmail.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181225 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-06 17:50:44 +00:00
Tom Stellard
58bf662c06 R600: Emit ISA for CALL_FS_* instructions
Reviewed-by: Vincent Lejeune <vljn@ovi.com>
Tested-By: Aaron Watry <awatry@gmail.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181223 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-06 17:50:26 +00:00
Ulrich Weigand
e5c8c24ed5 [SystemZ] Update non-pic DWARF encodings
As pointed out by Rafael Espindola, we should match the DWARF encodings
produced by GCC in both pic and non-pic modes.  This was not the case
for the non-pic case.

This patch changes all DWARF encodings to DW_EH_PE_absptr for the
non-pic case, just like GCC does.  The test case is updated to check
for both variants.



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2013-05-06 17:28:30 +00:00
Adhemerval Zanella
f51d7e76ae PowerPC: Fix unimplemented relocation on ppc64
This patch handles the R_PPC64_REL64 relocation type for powerpc64
for mcjit.


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2013-05-06 17:21:23 +00:00
Jean-Luc Duprat
81fa2abc85 Fix add4.ll test cmdline so that it passes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181219 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-06 17:18:47 +00:00
Jean-Luc Duprat
c5cf6e5365 Provide InstCombines for the following 3 cases:
A * (1 - (uitofp i1 C)) -> select C, 0, A
B * (uitofp i1 C) -> select C, B, 0
select C, 0, A + select C, B, 0 -> select C, B, A

These come up in code that has been hand-optimized from a select to a linear blend, 
on platforms where that may have mattered. We want to undo such changes 
with the following transform:
A*(1 - uitofp i1 C) + B*(uitofp i1 C) -> select C, A, B



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2013-05-06 16:55:50 +00:00
Tim Northover
4c8850cd1c AArch64: use MCJIT by default and enable related tests.
This just enables some testing I'd missed after implementing MCJIT
support.

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2013-05-06 16:51:08 +00:00
Ulrich Weigand
7207285e65 [SystemZ] Set up JIT/MCJIT test cases
This patch adds the necessary configuration bits and #ifdef's to set up
the JIT/MCJIT test cases for SystemZ.  Like other recent targets, we do
fully support MCJIT, but do not support the old JIT at all.  Set up the
lit config files accordingly, and disable old-JIT unit tests.

Patch by Richard Sandiford.



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2013-05-06 16:21:50 +00:00
Ulrich Weigand
097b88fff6 [SystemZ] Add MC test cases
This adds all MC tests for the SystemZ target.

Patch by Richard Sandiford.



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2013-05-06 16:20:58 +00:00
Ulrich Weigand
25cf4ebd50 [SystemZ] Add DebugInfo test cases
This adds all DebugInfo tests for the SystemZ target.

This version of the patch incorporates feedback from reviews by
Eric Christopher and Rafael Espindola.  Thanks to all reviewers!

Patch by Richard Sandiford.



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2013-05-06 16:18:29 +00:00
Ulrich Weigand
b503b49b51 [SystemZ] Add CodeGen test cases
This adds all CodeGen tests for the SystemZ target.

This version of the patch incorporates feedback from a review by
Sean Silva.  Thanks to all reviewers!

Patch by Richard Sandiford.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181204 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-06 16:17:29 +00:00
Rafael Espindola
9d4e034bbc Free the exception object. Should fix the vg bots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181195 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-06 13:30:52 +00:00
Michael Kuperstein
2720248ae5 Fix slightly too aggressive conact_vector optimization.
(Would sometimes optimize away conacts used to extend a vector with undef values)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181186 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-06 08:06:13 +00:00
Bill Wendling
10c6d2c84c Add a testcase that checks that we generate functions with frame
pointers or not depending upon the function attributes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181180 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-06 05:45:57 +00:00
Rafael Espindola
cf896576c8 XFAIL for cygwin.
Looks like symbol resolution is not working on cygwin, the test fails
because __gxx_personality_v0 is not found.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181179 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-06 03:35:56 +00:00
Nadav Rotem
4ee312bac1 Revert r164763 because it introduces new shuffles.
Thanks Nick Lewycky for pointing this out.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181177 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-06 02:39:09 +00:00
Matt Arsenault
8b9dc21d6f Fix unchecked uses of DominatorTree in MemoryDependenceAnalysis.
Use unknown results for places where it would be needed

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181176 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-06 02:07:24 +00:00
Rafael Espindola
eaf14786ca Fix const merging when an alias of a const is llvm.used.
We used to disable constant merging not only if a constant is llvm.used, but
also if an alias of a constant is llvm.used. This change fixes that.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181175 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-06 01:48:55 +00:00