Commit Graph

58140 Commits

Author SHA1 Message Date
Johnny Chen
e54a3ef087 Added 32-bit Thumb instructions LDRT, LDRBT, LDRHT,,LDRSBT, LDRSHT, STRT, STRBT,
and STRHT for disassembly only.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97655 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-03 18:45:36 +00:00
Chris Lattner
da828e3c8c add some of the more obscure predicate types to the
Scope accelerator.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97652 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-03 07:46:25 +00:00
Chris Lattner
f1b7c7d476 speed up scope node processing: if the first element of a scope
entry we're about to process is obviously going to fail, don't
bother pushing a scope only to have it immediately be popped.
This avoids a lot of scope stack traffic in common cases.

Unfortunately, this requires duplicating some of the predicate
dispatch.  To avoid duplicating the actual logic I pulled each
predicate out to its own static function which gets used in
both places.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97651 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-03 07:31:15 +00:00
Chris Lattner
cfe2eab744 introduce a new SwitchTypeMatcher node (which is analogous to
SwitchOpcodeMatcher) and have DAGISelMatcherOpt form it.  This
speeds up selection, particularly for X86 which has lots of 
variants of instructions with only type differences.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97645 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-03 06:28:15 +00:00
Bill Wendling
30174be37a Fix comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97644 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-03 05:40:40 +00:00
Dan Gohman
087bd1e3a1 Make SCEVExpander and LSR more aggressive about hoisting expressions out
of loops.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97642 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-03 05:29:13 +00:00
Dan Gohman
ed78dbafd0 Revert r97580; that's not the right way to fix this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97639 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-03 04:36:42 +00:00
Evan Cheng
6ba9554988 Work in progress. Finding some cse now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97635 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-03 02:48:20 +00:00
Chris Lattner
99fe641325 remove nvload and two patterns that use it which are
better done by dag combine.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97633 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-03 02:14:54 +00:00
Johnny Chen
0f7866e796 Added 32-bit Thumb instructions t2NOP, t2YIELD, t2WFE, t2WFI, t2SEV, and t2DBG
for disassembly only.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97632 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-03 02:09:43 +00:00
Bill Wendling
32f9eb2bc3 Use APInt instead of zext value.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97631 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-03 01:58:01 +00:00
Chris Lattner
f85eff76b2 factor the 'in the default address space' check out to a single
'dsload' pattern.  tblgen doesn't check patterns to see if they're
textually identical.  This allows better factoring.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97630 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-03 01:52:59 +00:00
Chris Lattner
1840991d54 factor the 'sign extended from 8 bit' patterns better so
that they are not destination type specific.  This allows
tblgen to factor them and the type check is redundant with
what the isel does anyway.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97629 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-03 01:45:01 +00:00
Evan Cheng
506049f29f - Change MachineInstr::isIdenticalTo to take a new option that determines whether it should skip checking defs or at least virtual register defs. This subsumes part of the TargetInstrInfo::isIdentical functionality.
- Eliminate TargetInstrInfo::isIdentical and replace it with produceSameValue. In the default case, produceSameValue just checks whether two machine instructions are identical (except for virtual register defs). But targets may override it to check for unusual cases (e.g. ARM pic loads from constant pools).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97628 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-03 01:44:33 +00:00
Evan Cheng
d89347cb49 Add an option to enable machine cse (it's not doing anything yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97627 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-03 01:38:35 +00:00
Evan Cheng
9066f4c6fc Ordering forward declarations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97626 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-03 01:37:50 +00:00
Bill Wendling
fbe8eab37e Don't turn assertions on by default.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97623 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-03 01:13:55 +00:00
Evan Cheng
bc9d22c99a Eliminate unused instruction classes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97617 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-03 00:43:15 +00:00
Bill Wendling
7d9f2b93a3 This test case:
long test(long x) { return (x & 123124) | 3; }

Currently compiles to:

_test:
        orl     $3, %edi
        movq    %rdi, %rax
        andq    $123127, %rax
        ret

This is because instruction and DAG combiners canonicalize

  (or (and x, C), D) -> (and (or, D), (C | D))

However, this is only profitable if (C & D) != 0. It gets in the way of the
3-addressification because the input bits are known to be zero.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97616 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-03 00:35:56 +00:00
Johnny Chen
a43398283d Added 32-bit Thumb instructions t2DMB variants, t2DSB variants, and t2ISBsy for
disassembly only.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97614 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-03 00:16:28 +00:00
Erick Tryzelaar
6bd7730426 Use the ocaml tag 0 since we are just returning an option value.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97612 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-02 23:59:08 +00:00
Erick Tryzelaar
df75eb64a7 Don't use an ocaml keyword in an ocamldoc comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97611 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-02 23:59:05 +00:00
Erick Tryzelaar
0dd27da184 Expose the optimization level for the jit in ocaml.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97610 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-02 23:59:03 +00:00
Erick Tryzelaar
16609f3c5c Remove module providers from ocaml.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97609 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-02 23:59:00 +00:00
Erick Tryzelaar
df7df075b7 Add Module functions in place of module providers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97608 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-02 23:58:54 +00:00
Chris Lattner
fb444af5c9 merge two loops over all nodes in the graph into one.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97606 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-02 23:12:51 +00:00
Chris Lattner
98d45790ae eliminate PreprocessForRMW now that isel handles it.
We still preprocess calls and fp return stuff.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97598 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-02 22:33:56 +00:00
Chris Lattner
6b7f39c895 remove 300 lines of code that is now dead in the MSP430 backend
now that isel handles chains more aggressively.  This also
allows us to make isLegalToFold non-virtual.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97597 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-02 22:30:08 +00:00
Chris Lattner
d1b7382983 Fix some issues in WalkChainUsers dealing with
CopyToReg/CopyFromReg/INLINEASM.  These are annoying because
they have the same opcode before an after isel.  Fix this by
setting their NodeID to -1 to indicate that they are selected,
just like what automatically happens when selecting things that
end up being machine nodes.

With that done, give IsLegalToFold a new flag that causes it to
ignore chains.  This lets the HandleMergeInputChains routine be
the one place that validates chains after a match is successful,
enabling the new hotness in chain processing.  This smarter
chain processing eliminates the need for "PreprocessRMW" in the
X86 and MSP430 backends and enables MSP to start matching it's
multiple mem operand instructions more aggressively.

I currently #if out the dead code in the X86 backend and MSP 
backend, I'll remove it for real in a follow-on patch.

The testcase changes are:
  test/CodeGen/X86/sse3.ll: we generate better code
  test/CodeGen/X86/store_op_load_fold2.ll: PreprocessRMW was 
      miscompiling this before, we now generate correct code
      Convert it to filecheck while I'm at it.
  test/CodeGen/MSP430/Inst16mm.ll: Add a testcase for mem/mem
      folding to make anton happy. :)




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97596 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-02 22:20:06 +00:00
Johnny Chen
10a77e14a0 Added 32-bit Thumb instruction CLREX (Clear-Exclusive) for disassembly only.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97595 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-02 22:11:06 +00:00
Evan Cheng
d5e9e5f221 Allow specialization of ScopedHashTable of non-default DenseMapInfo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97594 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-02 22:10:24 +00:00
Bill Wendling
d556155afd Okay. One last attempt:
Place the LSDA into the TEXT section on Mach-O. This saves space.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97592 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-02 21:50:35 +00:00
Chris Lattner
71b58d6c5e this testcase is failing because pic16 doesn't define a reg/reg
xor pattern.  I have no plans to fix this XFAIL.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97587 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-02 20:48:24 +00:00
Erick Tryzelaar
705443ffd3 Add support for use to ocaml.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97586 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-02 20:32:32 +00:00
Erick Tryzelaar
24b3733425 Rename LLVMUseIteratorRef to LLVMUseRef since we don't refer to iterators in llvm-c.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97585 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-02 20:32:28 +00:00
Chris Lattner
1aa3e9269f xfail this for now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97584 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-02 19:53:25 +00:00
Johnny Chen
b5031ad4c0 Removed the extra S from the multiclass def T2I_adde_sube_s_irs as well as from
the opc string passed in, since it's a given from the class inheritance of T2sI.
The fixed the extra 's' in adcss & sbcss when disassembly printing.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97582 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-02 19:38:59 +00:00
Chris Lattner
00592ec857 run HandleMergeInputChains even if we only have one input chain.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97581 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-02 19:34:59 +00:00
Dan Gohman
c4f7ec85ec When expanding an expression such as (A + B + C + D), sort the operands
by loop depth and emit loop-invariant subexpressions outside of loops.
This speeds up MultiSource/Applications/viterbi and others.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97580 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-02 19:32:21 +00:00
Evan Cheng
ac1abde05b Swap parameters of isSafeToMove and isSafeToReMat for consistency.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97578 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-02 19:03:01 +00:00
Evan Cheng
c5bbba1e49 Fix typo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97577 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-02 19:02:27 +00:00
Chris Lattner
5b5a1fe52e clean up some testcases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97576 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-02 18:56:03 +00:00
Chris Lattner
d272fee398 the sorting predicate should work for comparing an element
to itself, even though this isn't wildly useful.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97574 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-02 18:15:02 +00:00
Johnny Chen
93042d1dc8 Added 32-bit Thumb instructions: CPS, SDIV, UDIV, SXTB16, SXTAB16, UXTAB16, SEL,
SMMULR, SMMLAR, SMMLSR, TBB, TBH, and 16-bit Thumb instruction CPS for
disassembly only.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97573 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-02 18:14:57 +00:00
Devang Patel
1eac3e7d1e Fix grammar.
Thanks Duncan!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97572 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-02 17:58:15 +00:00
Johnny Chen
9d3acaa1a0 AL is an optional mnemonic extension for always, except in IT instructions.
Add printMandatoryPredicateOperand() PrintMethod for IT predicate printing.

Ref: A8.3 Conditional execution

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97571 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-02 17:57:15 +00:00
Johnny Chen
7cfa51ebd8 Change some asm shift opcode strings to lowercase.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97567 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-02 17:03:18 +00:00
Xerxes Ranby
901a8b7c6b fix typo add missing (
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97565 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-02 13:42:03 +00:00
Xerxes Ranby
02735c97fd Unbreak llvm-arm-linux buildbot and fix PR5309.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97564 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-02 13:26:18 +00:00
Duncan Sands
6d52102b92 Rather than passing "false" for InsertBefore, AddressSpace for ThreadLocal,
and nothing for AddressSpace, pass 0 for InsertBefore, "false" for ThreadLocal
and AddressSpace for AddressSpace.  Spotted by gcc-4.5.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97563 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-02 11:18:43 +00:00