Commit Graph

14715 Commits

Author SHA1 Message Date
Jim Grosbach
b6310316db Assembly parsing for 4-register variant of VLD1.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142682 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-21 20:35:01 +00:00
Jim Grosbach
cdcfa28056 Assembly parsing for 3-register variant of VLD1.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142675 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-21 20:02:19 +00:00
Eli Friedman
d2822e7572 Extend instcombine's shufflevector simplification to handle more cases where the input and output vectors have different sizes. Patch by Xiaoyi Guo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142671 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-21 19:06:29 +00:00
Jim Grosbach
280dfad489 ARM VLD parsing and encoding.
Next step in the ongoing saga of NEON load/store assmebly parsing. Handle
VLD1 instructions that take a two-register register list.

Adjust the instruction definitions to only have the single encoded register
as an operand. The super-register from the pseudo is kept as an implicit def,
so passes which come after pseudo-expansion still know that the instruction
defines the other subregs.




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142670 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-21 18:54:25 +00:00
Nadav Rotem
a054bcb4cf Fix pr11194. When promoting and splitting integers we need to use
ZExtPromotedInteger and SExtPromotedInteger based on the operation we legalize.

SetCC return type needs to be legalized via PromoteTargetBoolean.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142660 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-21 17:35:19 +00:00
Chandler Carruth
7555c40c48 Don't hard code the desired alignment for loops -- it isn't 16-bytes on
all x86 systems. Sorry for the breakage.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142656 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-21 16:41:39 +00:00
Nadav Rotem
4bd222ae26 1. Fix the widening of SETCC in WidenVecOp_SETCC. Use the correct return CC type.
2. Fix a typo in CONCAT_VECTORS which exposed the bug in #1.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142648 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-21 11:42:07 +00:00
Chandler Carruth
4a85cc982a Add loop aligning to MachineBlockPlacement based on review discussion so
it's a bit more plausible to use this instead of CodePlacementOpt. The
code for this was shamelessly stolen from CodePlacementOpt, and then
trimmed down a bit. There doesn't seem to be much utility in returning
true/false from this pass as we may or may not have rewritten all of the
blocks. Also, the statistic of counting how many loops were aligned
doesn't seem terribly important so I removed it. If folks would like it
to be included, I'm happy to add it back.

This was probably the most egregious of the missing features, and now
I'm going to start gathering some performance numbers and looking at
specific loop structures that have different layout between the two.

Test is updated to include both basic loop alignment and nested loop
alignment.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142645 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-21 08:57:37 +00:00
Chandler Carruth
4162eced73 Add a very basic test for MachineBlockPlacement. This is essentially the
canonical example I used when developing it, and is one of the primary
motivating real-world use cases for __builtin_expect (when burried under
a macro).

I'm working on more test cases here, but I'm trying to make sure both
that the pass is doing the right thing with the test cases and that they
aren't too brittle to changes elsewhere in the code generation pipeline.

Feedback and/or suggestions on how to test this are very welcome.
Especially feedback on whether testing the block comments is a good
strategy; I couldn't find any good examples to steal from but all the
other ideas I had were a lot uglier or more fragile.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142644 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-21 08:01:56 +00:00
Craig Topper
b4c945716f Remove intrinsics for X86 BLSI, BLSMSK, and BLSR intrinsics and replace with custom isel lowering code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142642 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-21 06:55:01 +00:00
Owen Anderson
cd20c58e98 Revert r142618, r142622, and r142624, which were based on an incorrect reading of the ARMv7 docs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142626 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-20 22:23:58 +00:00
Owen Anderson
fe0748d696 Fix decoding tests for fixed MSR encodings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142624 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-20 22:01:48 +00:00
Owen Anderson
5096503184 Fix tests for corrected MSR encodings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142622 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-20 21:53:19 +00:00
Jim Grosbach
6b09c77b7a ARM VLD1/VST1 (one register, no writeback) assembly parsing and encoding.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142583 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-20 15:04:25 +00:00
Jim Grosbach
760b46ce18 Tidy up formatting.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142582 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-20 14:57:47 +00:00
Jim Grosbach
d0b614754e ARM VTBX (one register) assembly parsing and encoding.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142581 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-20 14:48:50 +00:00
Eli Friedman
c66330504c Refactor code from inlining and globalopt that checks whether a function definition is unused, and enhance it so it can tell that functions which are only used by a blockaddress are in fact dead. This probably doesn't happen much on most code, but the Linux kernel's _THIS_IP_ can trigger this issue with blockaddress. (GlobalDCE can also handle the given tescase, but we only run that at -O3.) Found while looking at PR11180.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142572 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-20 05:23:42 +00:00
Nick Lewycky
0cd0fee91e "@string = constant i8 0" is a value i8* string of length zero. Analyze that
correctly in GetStringLength, fixing PR11181!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142558 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-20 00:34:35 +00:00
Chad Rosier
6690bca623 Revert 142337. Thumb1 still doesn't support dynamic stack realignment. :(
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142557 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-20 00:07:12 +00:00
Evan Cheng
fd230df463 Fix TLS lowering bug. The CopyFromReg must be glued to the TLSCALL. rdar://10291355
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142550 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-19 22:22:54 +00:00
Nadav Rotem
815af82b74 Improve code generation for vselect on SSE2:
When checking the availability of instructions using the TLI, a 'promoted'
instruction IS available. It means that the value is bitcasted to another type
for which there is an operation. The correct check for the availablity of an
instruction is to check if it should be expanded.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142542 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-19 20:43:16 +00:00
Rafael Espindola
12ae52767f Fix parsing of a line with only a # in it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142537 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-19 18:48:52 +00:00
James Molloy
cdd8e46bec Use literal pool loads instead of MOVW/MOVT for materializing global addresses when optimizing for size.
On spec/gcc, this caused a codesize improvement of ~1.9% for ARM mode and ~4.9% for Thumb(2) mode. This is
codesize including literal pools.

The pools themselves doubled in size for ARM mode and quintupled for Thumb mode, leaving suggestion that there
is still perhaps redundancy in LLVM's use of constant pools that could be decreased by sharing entries.

Fixes PR11087.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142530 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-19 14:11:07 +00:00
David Greene
3ce88b92ba Add Paste Test
This tests TableGen's paste functionality.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142526 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-19 13:04:50 +00:00
David Greene
e338565757 Add NAME Member
Add a Value named "NAME" to each Record.  This will be set to the def or defm
name when instantiating multiclasses.  This will replace the #NAME# processing
hack once paste functionality is in place.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142518 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-19 13:04:13 +00:00
Chandler Carruth
941aa7b1e8 Generalize the reading of probability metadata to work for both branches
and switches, with arbitrary numbers of successors. Still optimized for
the common case of 2 successors for a conditional branch.

Add a test case for switch metadata showing up in the BlockFrequencyInfo pass.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142493 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-19 10:32:19 +00:00
Chandler Carruth
99d01c54a0 Teach the BranchProbabilityInfo analysis pass to read any metadata
encoding of probabilities. In the absense of metadata, it continues to
fall back on static heuristics.

This allows __builtin_expect, after lowering through llvm.expect
a branch instruction's metadata, to actually enter the branch
probability model. This is one component of resolving PR2577.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142492 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-19 10:30:30 +00:00
Chandler Carruth
6aa5c26c81 Add pass printing support to BlockFrequencyInfo pass. The implementation
layer already had support for printing the results of this analysis, but
the wiring was missing.

Now that printing the analysis works, actually bring some of this
analysis, and the BranchProbabilityInfo analysis that it wraps, under
test! I'm planning on fixing some bugs and doing other work here, so
having a nice place to add regression tests and a way to observe the
results is really useful.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142491 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-19 10:12:41 +00:00
Nadav Rotem
ca58c72267 Add support for the vector-widening of vselect and vector-setcc
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142488 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-19 09:45:11 +00:00
Craig Topper
717cdb0df8 Rename PEXTR to PEXT. Add intrinsics for BMI instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142480 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-19 07:48:35 +00:00
Lang Hames
aa13603a3e Added testcase for <rdar://problem/10215997>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142462 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-18 23:50:52 +00:00
Nadav Rotem
d88bc2a683 Add additional element-promotion tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142442 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-18 23:05:33 +00:00
Nadav Rotem
fbf19ef186 Fix a bug in the legalization of vector anyext-load and trunc-store. Mem Index starts with zero.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142434 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-18 22:32:43 +00:00
Jim Grosbach
2933e4b2e6 Tidy up formatting.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142422 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-18 21:09:01 +00:00
Jim Grosbach
39dc2af7f9 Tidy up formatting.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142421 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-18 21:08:16 +00:00
Jim Grosbach
0487e459e0 Enable more encoded immediate tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142415 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-18 20:20:51 +00:00
Jim Grosbach
ca8d1842cf More vmov lane testcases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142414 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-18 20:19:48 +00:00
Jim Grosbach
aead579017 ARM vmla/vmls assembly parsing for the lane index operand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142413 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-18 20:14:56 +00:00
Jim Grosbach
687656c630 ARM vmov assembly parsing for the lane index operand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142412 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-18 20:10:47 +00:00
Michael J. Spencer
22ff0f33db llvm-objdump: Add static symbol table dumping.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142404 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-18 19:32:17 +00:00
Jim Grosbach
9120088979 ARM vmla/vmls assembly parsing for the lane index operand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142389 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-18 18:27:07 +00:00
Owen Anderson
e8692ed5a6 Another failing encoding.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142388 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-18 18:23:03 +00:00
Jim Grosbach
82fa5fc709 Fix NEON mul encoding tests. Wrong file contents previously.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142387 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-18 18:14:55 +00:00
Jim Grosbach
0a0374018f ARM vqdmulh assembly parsing for the lane index operand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142386 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-18 18:12:09 +00:00
Jim Grosbach
37a3ed21c4 Remove duplicate test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142383 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-18 18:05:50 +00:00
Jim Grosbach
9e7df4ad5b Tidy up formatting.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142382 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-18 18:05:16 +00:00
Jim Grosbach
970f787a7e ARM vmul assembly parsing for the lane index operand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142381 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-18 18:01:52 +00:00
Jim Grosbach
ec11d2a1b8 Tidy up.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142380 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-18 18:01:09 +00:00
Owen Anderson
aff187a19a Add a few more testcases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142379 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-18 17:57:31 +00:00
Owen Anderson
de1ff7f552 Add several FIXME cases for ARM encodings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142377 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-18 17:50:22 +00:00