Chad Rosier
b74c865841
[arm-fast-isel] After promoting a function parameter be sure to update the
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argument value type. Otherwise, the sign/zero-extend has no effect on arguments
passed via the stack (i.e., undefined high-order bits).
rdar://10515467
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145701 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-02 20:25:18 +00:00
Jim Grosbach
dad2f8e7fb
Clean up aliases for ARM VLD1 single-lane assembly parsing a bit.
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Add the 16-bit lane variants while I'm at it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145693 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-02 18:52:30 +00:00
Benjamin Kramer
30fe1ae20d
Fix quadratic behavior in InlineFunction by fetching the personality function of the callee once and not for every invoke in the caller.
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The callee is usually smaller than the caller, too. This reduces the compile
time of ARMDisassembler.cpp by 32% (Release build). It still takes ages to
compile though.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145690 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-02 18:37:31 +00:00
Jim Grosbach
94f2dc90a5
Check for error after InstantiateMultclassDef.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145689 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-02 18:33:03 +00:00
Jan Sjödin
ce25d26b40
Add XOP feature flag.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145682 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-02 15:14:37 +00:00
Craig Topper
f8363305eb
Reduce duplicate code in isHorizontalBinOp and add some asserts to protect assumptions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145681 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-02 08:18:41 +00:00
Craig Topper
138a5c66b9
Add instruction selection support for horizontal add/sub of 256-bit floating point vectors. Also add the test case for 256-bit integer vectors.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145680 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-02 07:16:01 +00:00
Hal Finkel
826941a0af
remove unneeded FIXME comment
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145679 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-02 04:58:17 +00:00
Hal Finkel
db809e0eb7
make sure ScheduleDAGInstrs::EmitSchedule does not crash when the first instruction in Sequence is a Noop
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145677 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-02 04:58:07 +00:00
Hal Finkel
64c34e2535
update PPC 940 hazard rec. to function in postRA mode
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145676 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-02 04:58:02 +00:00
Chad Rosier
aab8e28d5e
Fix a few more places where TargetData/TargetLibraryInfo is not being passed.
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Add FIXMEs to places that are non-trivial to fix.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145661 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-02 01:26:24 +00:00
Jim Grosbach
7636bf6530
ARM start parsing VLD1 single lane instructions.
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The alias pseudos need cleaned up for size suffix handling, but this gets
the basics working. Will be cleaning up and adding more.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145655 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-02 00:35:16 +00:00
Chad Rosier
21646e8bec
Abuse of mass replace isn't warranted even when the build is failing. Thanks
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for the suggestion, Eric.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145643 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-01 23:16:03 +00:00
Chad Rosier
ca3043101f
Fix build by not assuming TLI is guaranteed. Will have to track down cases where
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TLI isn't being passed to ensure we don't miss opportunities to fold calls.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145641 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-01 22:38:31 +00:00
Chad Rosier
aebc3aae3f
Prevent library calls from being folded if -fno-builtin has been specified.
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rdar://10500969
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145639 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-01 22:14:50 +00:00
Dylan Noblesmith
fe0926d773
CodeGen: fix CMake build
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Missing file from r145629.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145634 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-01 21:49:23 +00:00
Dylan Noblesmith
d95e67dac0
ExecutionEngine: honor optimization level
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It was getting ignored after r144788.
Also fix an accidental implicit cast from the OptLevel enum
to an optional bool argument. MSVC warned on this, but gcc
didn't.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145633 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-01 21:49:21 +00:00
Chad Rosier
00737bdb48
Last bit of TargetLibraryInfo propagation. Also fixed a case for TargetData
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where it appeared beneficial to pass.
More of rdar://10500969
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145630 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-01 21:29:16 +00:00
Anshuman Dasgupta
dc81e5da27
Add a deterministic finite automaton based packetizer for VLIW architectures
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145629 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-01 21:10:21 +00:00
David Blaikie
18c7ec1344
Fix unreachable return & simplify some branches.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145627 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-01 20:58:30 +00:00
Sanjoy Das
fc9261279a
Dummy commit to check commit access.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145619 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-01 19:15:08 +00:00
Pete Cooper
165695d261
Improved fix for abs(val) != 0 to check other similar case. Also fixed style issues and confusing comment
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145618 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-01 19:13:26 +00:00
Kostya Serebryany
cc1d856d8e
[asan] two minor fixes: use UnreachableInst after the neverreturn function call; use report_fatal_error when blacklist file can not be found
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145611 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-01 18:54:53 +00:00
Chad Rosier
fbd828d8e1
Add missing functions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145608 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-01 18:26:19 +00:00
Benjamin Kramer
618f89f22a
Autodetect bulldozers.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145607 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-01 18:24:17 +00:00
Chad Rosier
32b6c59ad0
Add a few more functions to TargetLibraryInfo. More of rdar://10500969.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145596 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-01 17:54:37 +00:00
Eric Christopher
7d5a61e975
For 64-bit the rest of the general regs are ok for the q constraint. Make
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sure we can emit both the high and low versions of those registers.
Fixes rdar://10392864
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145579 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-01 08:12:41 +00:00
David Blaikie
0becc96b24
Add some missing anchors.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145578 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-01 08:00:17 +00:00
Eli Friedman
522fb8cc01
Pass AVX vectors which are arguments to varargs functions on the stack. <rdar://problem/10463281>.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145573 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-01 04:49:21 +00:00
Pete Cooper
65a6b57c33
Added instcombine pattern to spot comparing -val or val against 0.
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(val != 0) == (-val != 0) so "abs(val) != 0" becomes "val != 0"
Fixes <rdar://problem/10482509>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145563 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-01 03:58:40 +00:00
Chad Rosier
618c1dbd29
Propagate TargetLibraryInfo throughout ConstantFolding.cpp and
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InstructionSimplify.cpp. Other fixups as needed.
Part of rdar://10500969
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145559 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-01 03:08:23 +00:00
Nick Lewycky
66d004ef70
Make use of "getScalarType()". No functionality change.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145556 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-01 02:39:36 +00:00
Eli Friedman
32e698cc10
Small fix for assembler generation on Darwin PPC64. Patch by Michael Kostylev. PR11437.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145553 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-01 01:43:47 +00:00
Kostya Serebryany
af65a8c54b
make asan work at -O0, llvm part. Patch by glider@google.com
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145530 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-30 22:19:26 +00:00
Jan Sjödin
dd649e35e5
Support for encoding all FMA4 instructions and tablegen patterns for all
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remaining FMA4 instructions and intrinsics with tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145525 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-30 22:09:42 +00:00
Eli Friedman
3dad610aaa
Make GlobalMerge honor the preferred alignment on globals without an explicitly specified alignment.
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<rdar://problem/10497732>.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145523 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-30 21:54:15 +00:00
Matt Beaumont-Gay
7b8e121520
Remove unused variable
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145517 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-30 19:53:11 +00:00
Jim Grosbach
096334e25e
ARM parsing for VLD1 all lanes, with writeback.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145510 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-30 19:35:44 +00:00
Chad Rosier
8ff4115ef0
Add a few functions to TargetLibraryInfo.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145508 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-30 19:19:00 +00:00
Jim Grosbach
13af222bab
ARM parsing for VLD1 two register all lanes, no writeback.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145504 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-30 18:21:25 +00:00
Benjamin Kramer
5f794df76e
X86: Turns out bulldozer also supports sse42 and lzcnt.
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While at it remove the barcelona/instanbul/shanghai subtargets, they're
unsupported by GCC and look pretty broken.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145494 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-30 15:48:16 +00:00
Benjamin Kramer
2a6cf70650
X86: Add subtargets for AMD's bulldozer.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145493 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-30 15:27:46 +00:00
Nadav Rotem
18197d7425
X86: PerformOrCombine introduced a vselect node with a wrong order of operands. This bug was introduced when a dedicated blend sdnode was replaced with the vselect node (in 139479).
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145488 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-30 10:13:37 +00:00
Craig Topper
b72039cf52
Add instruction selection support for AVX2 horizontal add/sub instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145487 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-30 09:10:50 +00:00
Craig Topper
ec24e61ab0
Merge VPERM2F128/VPERM2I128 ISD node types.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145485 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-30 07:47:51 +00:00
Craig Topper
316cd2a2c5
Merge decoding of VPERMILPD and VPERMILPS shuffle masks. Merge X86ISD node type for VPERMILPD/PS. Add instruction selection support for VINSERTI128/VEXTRACTI128.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145483 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-30 06:25:25 +00:00
Andrew Trick
553fe05f23
LSR: handle the expansion of phi operands that use postinc forms of the IV.
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Fixes PR11431: SCEVExpander::expandAddRecExprLiterally(const llvm::SCEVAddRecExpr*): Assertion `(!isa<Instruction>(Result) || SE.DT->dominates(cast<Instruction>(Result), Builder.GetInsertPoint())) && "postinc expansion does not dominate use"' failed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145482 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-30 06:07:54 +00:00
Chad Rosier
caebb1e00b
Whitespace.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145470 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-30 01:59:59 +00:00
Chad Rosier
683e47b1dd
Alphabetize TargetLibraryInfo enum and fix doxygen comments. No functional
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change intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145468 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-30 01:51:49 +00:00
Jim Grosbach
98b05a57b6
ARM parsing aliases for VLD1 single register all lanes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145464 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-30 01:09:44 +00:00