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21944 Commits

Author SHA1 Message Date
Evan Cheng
b9a905781e Temporarily reverting 46959. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47542 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-25 03:57:32 +00:00
Owen Anderson
0f7ea1ab10 Fix an issue where GVN would try to use an instruction before its definition when performing return slot optimization. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47541 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-25 00:40:41 +00:00
Duncan Sands
14fd63cae8 Add support to LegalizeTypes for building legal vectors 
out of illegal elements (BUILD_VECTOR).  Uses and beefs
up BUILD_PAIR, though it didn't really have to.  Like
most of LegalizeTypes, does not support soft-float.
This cures all "make check" vector building failures.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47537 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-24 07:36:03 +00:00
Bill Wendling
181eb737b2 Some platforms use the same name for 32-bit and 64-bit registers (like 
%r3 on PPC) in their ASM files. However, it's hard for humans to read
during debugging. Adding a new field to the register data that lets you
specify a different name to be printed than the one that goes into the
ASM file -- %x3 instead of %r3, for instance.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47534 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-24 00:56:13 +00:00
Evan Cheng
1df439773c Backing out r47521 for now. This has broken a number of tests. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47533 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-23 19:32:32 +00:00
Scott Michel
a59d469e9b Merge current work back to tree to minimize diffs and drift. Major highlights 
for CellSPU modifications:

- SPUInstrInfo.td refactoring: "multiclass" really is _your_ friend.
- Other improvements based on refactoring effort in SPUISelLowering.cpp,
  esp. in SPUISelLowering::PerformDAGCombine(), where zero amount shifts and
  rotates are now eliminiated, other scalar-to-vector-to-scalar silliness
  is also eliminated.
- 64-bit operations are being implemented, _muldi3.c gcc runtime now
  compiles and generates the right code. More work still needs to be done.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47532 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-23 18:41:37 +00:00
Evan Cheng
249ded3fa8 Rematerialization logic was overly conservative when it comes to loads from fixed stack slots. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47529 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-23 03:38:34 +00:00
Evan Cheng
298bbe82cb If remating a machine instr with virtual register operand, make sure the vr is avaliable at all uses regardless of whether it would be folded. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47526 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-23 02:14:42 +00:00
Evan Cheng
c19eca38ef Turning on remat of pic loads. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47524 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-23 02:07:42 +00:00
Dan Gohman
61e015fe74 Fix a bug that caused opt and other tools to silently ignore 
invalid command-line options.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47523 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-23 01:55:25 +00:00
Evan Cheng
b2a0abce1e No need recognize load from a fixed argument slot as re-materializable. LiveIntervalAnalysis already handles it as a special case. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47522 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-23 01:47:44 +00:00
Devang Patel
e9fabd94ab Properly read and write bitcodes for multiple return values. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47521 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-23 01:44:55 +00:00
Evan Cheng
dd3465eed1 Recognize loads of arguments as re-materializable first. Therefore if isReallyTriviallyReMaterializable() returns true it doesn't confuse it as a "normal" re-materializable instruction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47520 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-23 01:44:27 +00:00
Devang Patel
2007173203 Regenerate. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47519 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-23 01:17:37 +00:00
Devang Patel
155b8746ba Use isa check instead of getTypeID() check. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47518 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-23 01:17:17 +00:00
Ted Kremenek
57daefa187 Fixed buffer overflow reported by Argiris Kirtzidis. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47517 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-23 01:11:40 +00:00
Devang Patel
377e04b926 print getresult operand and its type directly. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47514 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-23 01:04:26 +00:00
Devang Patel
d7313c5608 Use dyn_cast instead of isa + cast. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47511 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-23 00:47:00 +00:00
Devang Patel
6bfc63bef9 Regenerate 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47509 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-23 00:38:56 +00:00
Devang Patel
57ef4f46c1 To support multiple return values, now ret instruction supports multiple operands instead of one aggregate operand. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47508 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-23 00:35:18 +00:00
Evan Cheng
313d4b8093 Fix spill weight updating bug. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47507 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-23 00:33:04 +00:00
Dale Johannesen
22c3979fca Split ParameterAttributes.h, putting the complicated 
stuff into ParamAttrsList.h.  Per feedback from
ParamAttrs changes.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47504 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-22 22:17:59 +00:00
Evan Cheng
672e550601 Same isPhysRegAvailable bug as local register allocator. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47500 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-22 20:31:32 +00:00
Evan Cheng
bcfa1ca976 Really really bad local register allocator bug. On X86, it was never using ESI, EDI, and EBP because of a bug in RALocal::isPhysRegAvailable(). For example, when 
it checks if ESI is available, it then looks at registers aliases to ESI. SIL is marked -2 (not allocatable) but isPhysRegAvailable() incorrectly assumes it is in use and returns false for ESI.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47499 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-22 20:30:53 +00:00
Evan Cheng
9af7090392 Add debugging printfs. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47496 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-22 19:57:06 +00:00
Devang Patel
bd41a064ed Regenerate 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47495 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-22 19:31:30 +00:00
Devang Patel
1b76c759ac Use SymbolicValueRef to parse getresult operand 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47494 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-22 19:31:15 +00:00
Evan Cheng
b2fd65f936 Make sure reload of implicit uses are issued before remat's. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47492 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-22 19:22:06 +00:00
Dale Johannesen
dc6c0f151b Generated files for 47484. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47485 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-22 17:50:51 +00:00
Dale Johannesen
08e78b18b8 Pass alignment on ByVal parameters, from FE, all 
the way through.  It is now used for codegen.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47484 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-22 17:49:45 +00:00
Dale Johannesen
3edd6dcf82 MMX vectors are passed 4-byte aligned. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47483 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-22 17:47:28 +00:00
Anton Korobeynikov
47ccf1af3a Provide __main hooks for cygwin & mingw32 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47479 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-22 10:08:31 +00:00
Zhou Sheng
58d13af6f0 Fixed a typo. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47478 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-22 10:00:35 +00:00
Evan Cheng
d8850a512e Allow re-materialization of pic load (controlled by -remat-pic-load for now). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47476 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-22 09:25:47 +00:00
Evan Cheng
d70dbb5d62 Enable re-materialization of instructions which have virtual register operands if 
the definition of the operand also reaches its uses.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47475 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-22 09:24:50 +00:00
Chris Lattner
d2b1fb27df copy mmx values from/to memory with GPRs on x86-32 
instead of with mmx registers.  This horribleness is apparently
done by gcc to avoid having to insert emms in places that really 
should have it.  This is the second half of rdar://5741668.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47474 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-22 05:18:04 +00:00
Devang Patel
452743e5e4 Print getresult instruction properly. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47473 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-22 03:10:23 +00:00
Devang Patel
ec25f24dbf Print ret instruction that returns aggregates. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47472 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-22 02:50:49 +00:00
Devang Patel
197be3de7f Read and write getresult. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47471 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-22 02:49:49 +00:00
Chris Lattner
149a4e56fc Start using GPR's to copy around mmx value instead of mmx regs. 
GCC apparently does this, and code depends on not having to do
emms when this happens.  This is x86-64 only so far, second half
should handle x86-32.

rdar://5741668


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47470 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-22 02:09:43 +00:00
Evan Cheng
becda48f88 Fix compiler warning. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47468 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-22 01:48:00 +00:00
Dan Gohman
9e255b7df5 Fix a regression in 403.gcc and 186.crafty introduced in 47383. To test 
that a value is >= 32, check that all of the high bits are zero, not
just one or more.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47467 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-22 01:12:31 +00:00
Devang Patel
95cb2ad919 print getresult instruction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47461 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-21 23:02:20 +00:00
Devang Patel
6c94b70d6e Use isa<> instead of getTypeID() to check StructType. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47460 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-21 22:24:17 +00:00
Eli Friedman
a2e7efa6d3 A few minor updates, removing implemented stuff and adding a couple of 
new things.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47458 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-21 21:16:49 +00:00
Chris Lattner
69e6a8d5a8 Make the clobber analysis a bit more smart: we only are careful about 
early clobbers if the clobber list contains a *register* not some thing
like {memory}, {dirflag} etc.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47457 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-21 20:54:31 +00:00
Chris Lattner
0fe71e9bb1 Treat clobber operands like early clobbers: if we have 
any, we force sdisel to do all regalloc for an asm.  This
leads to gross but correct codegen.

This fixes the rest of PR2078.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47454 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-21 19:43:13 +00:00
Bill Wendling
1d5e8196c0 Clear PhysRegPartUse for the sub register as well. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47453 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-21 19:35:27 +00:00
Bill Wendling
20b76ab3c7 Adjust the MaxAlignment for the special register scavenging spill slot. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47452 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-21 19:33:53 +00:00
Evan Cheng
304983b93e Help testing. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47448 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-21 19:20:21 +00:00