Commit Graph

7559 Commits

Author SHA1 Message Date
Evan Cheng
ba647becb9 Specify S registers as D registers' sub-registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36280 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-20 21:20:10 +00:00
Evan Cheng
6120433e9e Specify sub-register relations. e.g. RAX: [EAX], EAX: [AX], AX: [AL,AH].
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36279 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-20 21:15:21 +00:00
Evan Cheng
3cafbf7e5f Add sub-registers sets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36278 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-20 21:13:46 +00:00
Chris Lattner
93305bc462 add a crazy idea
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36273 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-20 20:18:43 +00:00
Jeff Cohen
5d4d7f1580 Make Microsoft assembler and linker happy.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36265 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-20 00:33:54 +00:00
Chris Lattner
3e1b03f98d Fix a message, patch by Christopher Lamb.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36264 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-19 18:42:38 +00:00
Lauro Ramos Venancio
267bfb553e Fix a bug in getFrameRegister.
Reported by Raul Herbster.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36262 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-19 14:09:38 +00:00
Dan Gohman
23420c09c0 Fix the spelling of the prefetchnta instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36256 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-18 14:09:14 +00:00
Evan Cheng
7be6368cac Oops. Didn't mean to check in a quick hack.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36227 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-17 23:33:39 +00:00
Chris Lattner
120fba91a3 dag combiner just got better at pruning bits. This fixes CodeGen/ARM/rev.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36222 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-17 22:39:58 +00:00
Evan Cheng
eff03db46d Change getAllocatableSet() so it returns allocatable registers for a specific register class.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36215 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-17 20:23:34 +00:00
Anton Korobeynikov
e060b5385f Add comment
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36213 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-17 19:34:00 +00:00
Chris Lattner
3c30d10b04 add a note
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36203 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-17 18:03:00 +00:00
Chris Lattner
d15dff24c6 rename X86FunctionInfo to X86MachineFunctionInfo to match the header file
it is defined in.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36196 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-17 17:21:52 +00:00
Anton Korobeynikov
57fc00d5cf Implemented correct stack probing on mingw/cygwin for dynamic alloca's.
Also, fixed static case in presence of eax livin. This fixes PR331

PS: Why don't we still have push/pop instructions? :)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36195 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-17 09:20:00 +00:00
Andrew Lenharth
15b7823006 Use this nifty Constraints thing and fix the inverted conditional moves
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36191 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-17 04:07:59 +00:00
Chris Lattner
56ecbf3013 SSE4 is apparently public now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36185 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-17 00:02:37 +00:00
Jeff Cohen
c398709525 In the event that some really old non-Intel or -AMD CPU is encountered...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36177 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-16 21:59:44 +00:00
Jeff Cohen
22114c319a Before assuming that the original code didn't work for Athlon64, the person who
replaced it with a FIXME should have determined what did work.  Then he would have
realized that the code was in fact correct, and would have avoided breaking it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36173 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-16 21:48:58 +00:00
Anton Korobeynikov
bed2946a96 Removed tabs everywhere except autogenerated & external files. Add make
target for tabs checking.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36146 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-16 18:10:23 +00:00
Reid Spencer
2b85c4595e For PR1336:
Subtarget option names must be given in lower case in order to be
recognized. Fixes test/CodeGen/Alpha/ctlz.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36125 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-16 14:06:19 +00:00
Chris Lattner
7c162645ae add a note
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36028 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-14 23:06:09 +00:00
Jeff Cohen
614408dc48 Silence VC++ warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35975 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-13 22:52:03 +00:00
Chris Lattner
5a3d40d88f arm has r+r*s and r+i addr modes, but no r+i+r*s addr modes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35962 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-13 06:50:55 +00:00
Reid Spencer
57c5b1815d Implement review feedback .. don't double search a set.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35957 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-12 21:57:15 +00:00
Reid Spencer
69f80a63a2 Provide support for intrinsics that lower themselves to a function body.
This can happen for intrinsics that are overloaded.  In such cases it is
necessary to emit a function prototype before the body of the function
that calls the intrinsic and to ensure we don't emit it multiple times.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35954 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-12 21:00:45 +00:00
Lauro Ramos Venancio
26ca64c884 Implement Thread Local Storage (TLS) in CBackend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35951 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-12 18:42:08 +00:00
Chris Lattner
6c284d716e Fix mmx paddq, add support for the 'y' register class, though it isn't tested.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35940 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-12 04:14:49 +00:00
Chris Lattner
a1b253f58e Fix CodeGen/X86/2007-03-24-InlineAsmPModifier.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35926 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-11 22:29:46 +00:00
Chris Lattner
e11529438c Fix incorrect fall-throughs in addr mode code. This fixes CodeGen/ARM/arm-negative-stride.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35909 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-11 16:17:12 +00:00
Chris Lattner
b062000c23 done
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35884 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-11 05:34:00 +00:00
Reid Spencer
18da072088 For PR1146:
Put the parameter attributes in their own ParamAttr name space. Adjust the
rest of llvm as a result.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35877 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-11 02:44:20 +00:00
Bill Wendling
bb1ee05253 Add support for our first SSSE3 instruction "pmulhrsw".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35869 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-10 22:10:25 +00:00
Chris Lattner
bae3bd7c19 new micro optzn
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35867 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-10 21:14:01 +00:00
Chris Lattner
eb13d1b710 restore support for negative strides
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35859 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-10 03:48:29 +00:00
Chris Lattner
37caf8c68e remove dead target hooks
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35846 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-09 23:33:39 +00:00
Chris Lattner
eb8c74ddf2 remove some dead hooks
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35845 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-09 23:31:19 +00:00
Chris Lattner
b445d0cbb9 remove some dead target hooks, subsumed by isLegalAddressingMode
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35840 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-09 22:27:04 +00:00
Chris Lattner
7c7ba9d2d5 Fix a bug in PPCTargetLowering::isLegalAddressingMode, scales other than 0/1/2
are always unsupported.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35835 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-09 22:10:05 +00:00
Jeff Cohen
44f5fb46b0 When the number of elements is zero, don't malloc 32GB on 64-bit systems.
Fixes unexpected failures on FreeBSD/amd64 of:
  CFrontend/2005-09-24-BitFieldCrash.c:
  CFrontend/2007-02-04-EmptyStruct.c:
  CFrontend/2007-03-26-ZeroWidthBitfield.c:
  CodeGen/Generic/2005-10-18-ZeroSizeStackObject.ll:


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35828 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-09 19:26:30 +00:00
Reid Spencer
5694b6e90e For PR1146:
Adapt handling of parameter attributes to use the new ParamAttrsList class.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35814 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-09 06:17:21 +00:00
Chris Lattner
0f65cad57f move a bunch of register constraints from being handled by
getRegClassForInlineAsmConstraint to being handled by
getRegForInlineAsmConstraint.  This allows us to let the llvm register allocator
allocate, which gives us better code.  For example, X86/2007-01-29-InlineAsm-ir.ll
used to compile to:

_run_init_process:
        subl $4, %esp
        movl %ebx, (%esp)
        xorl %ebx, %ebx
        movl $11, %eax
        movl %ebx, %ecx
        movl %ebx, %edx
        # InlineAsm Start
        push %ebx ; movl %ebx,%ebx ; int $0x80 ; pop %ebx
        # InlineAsm End

Now we get:
_run_init_process:
        xorl %ecx, %ecx
        movl $11, %eax
        movl %ecx, %edx
        # InlineAsm Start
        push %ebx ; movl %ecx,%ebx ; int $0x80 ; pop %ebx
        # InlineAsm End


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35804 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-09 05:49:22 +00:00
Chris Lattner
e5a24ec782 implement support for CodeGen/X86/inline-asm-x-scalar.ll:test3 - i32/i64 values
used with x constraints.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35803 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-09 05:31:48 +00:00
Chris Lattner
ad043e85f8 implement CodeGen/X86/inline-asm-x-scalar.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35799 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-09 05:11:28 +00:00
Reid Spencer
6733a1661a Squelch a warning about mismatch between sign of constant and sign of return
type.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35674 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-04 22:07:24 +00:00
Evan Cheng
e21e39666e Implement inline asm modifier P.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35640 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-04 00:13:29 +00:00
Evan Cheng
0a7baa24d1 Typo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35639 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-04 00:06:07 +00:00
Bill Wendling
71bfd11c67 Adding more MMX instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35638 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-03 23:48:32 +00:00
Chris Lattner
8ceb0fd2d3 make a new missing features section
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35637 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-03 23:41:34 +00:00
Evan Cheng
ed884f3a2f Remove unused constant pool entries.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35635 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-03 23:39:48 +00:00