Commit Graph

29066 Commits

Author SHA1 Message Date
Sanjay Patel
17392758a1 fixed to test features, not CPUs
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231512 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-06 20:46:16 +00:00
Sanjay Patel
91b79125ec fixed test to use SSE2 attribute
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231510 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-06 20:38:55 +00:00
Sanjay Patel
e7abe0cdbc fixed to test only the feature, not the feature and a CPU
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231509 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-06 20:34:20 +00:00
Matthias Braun
47941aa098 DAGCombiner: Canonicalize select(and/or,x,y) depending on target.
This is based on the following equivalences:
select(C0 & C1, X, Y) <=> select(C0, select(C1, X, Y), Y)
select(C0 | C1, X, Y) <=> select(C0, X, select(C1, X, Y))

Many target cannot perform and/or on the CPU flags and therefore the
right side should be choosen to avoid materializign the i1 flags in an
integer register. If the target can perform this operation efficiently
we normalize to the left form.

Differential Revision: http://reviews.llvm.org/D7622

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231507 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-06 19:49:10 +00:00
Bruno Cardoso Lopes
664388cd2a [AsmPrinter][TLOF] Remove AArch64 test to appease buildbots
Follow up from r231497. Using XFAIL would still trigger fail on some
buildbots. Will re-introduce it as soon as I have a fix.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231505 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-06 19:42:18 +00:00
Bruno Cardoso Lopes
83f6fece72 [AsmPrinter][TLOF] XFAIL AArch64 test to appease buildbots
The checking for extgotequiv and localgotequiv rely on the emission
order, which is not guaranteed because we use DenseMap to hold the GOT
equivalents. XFAIL this now until I get time to use MapVector and test
out the solution. In the meantime, appease buildbots.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231497 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-06 18:38:42 +00:00
Frederic Riss
98ecf5a7ed [dsymutil] Add debug_str construction support.
With this comes the ability to correctly clone string attributes in DIEs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231493 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-06 17:56:30 +00:00
Bruno Cardoso Lopes
653997ebc2 [AsmPrinter][TLOF] Make AArch64 test a bit more flexible
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231481 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-06 15:11:41 +00:00
Bruno Cardoso Lopes
9dda04db93 [AsmPrinter][TLOF] Split tests and move to appropriate directories
Follow up from r231474 and 231475 to appease buildbots

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231480 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-06 14:41:56 +00:00
Bruno Cardoso Lopes
dfc6383227 [AsmPrinter][TLOF] 32-bit MachO support for replacing GOT equivalents
Add MachO 32-bit (i.e. arm and x86) support for replacing global GOT equivalent
symbol accesses. Unlike 64-bit targets, there's no GOTPCREL relocation, and
access through a non_lazy_symbol_pointers section is used instead.

-- before

    _extgotequiv:
       .long _extfoo

    _delta:
       .long _extgotequiv-_delta

-- after

    _delta:
       .long L_extfoo$non_lazy_ptr-_delta

       .section __IMPORT,__pointers,non_lazy_symbol_pointers
    L_extfoo$non_lazy_ptr:
       .indirect_symbol _extfoo
       .long 0

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231475 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-06 13:49:05 +00:00
Bruno Cardoso Lopes
66aa390799 [AsmPrinter][TLOF] ARM64 MachO support for replacing GOT equivalents
Follow up r230264 and add ARM64 support for replacing global GOT
equivalent symbol accesses by references to the GOT entry for the final
symbol instead, example:

-- before

   .globl  _foo
  _foo:
   .long   42

   .globl  _gotequivalent
  _gotequivalent:
   .quad   _foo

   .globl  _delta
  _delta:
   .long   _gotequivalent-_delta

-- after

   .globl  _foo
  _foo:
   .long   42

   .globl  _delta
  Ltmp3:
   .long _foo@GOT-Ltmp3

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231474 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-06 13:48:45 +00:00
Toma Tabacu
25c2850952 [mips] [IAS] Add missing constraints and improve testing for the .module directive.
Summary:
None of the .set directives can be used before the .module directives. The .set mips0/pop/push were not triggering this constraint.
Also added testing for all the other implemented directives which are supposed to trigger this constraint.

Reviewers: dsanders

Reviewed By: dsanders

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D7140

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231465 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-06 12:15:12 +00:00
Karthik Bhat
52610d84ad Add a new pass "Loop Interchange"
This pass interchanges loops to provide a more cache-friendly memory access.

For e.g. given a loop like -
  for(int i=0;i<N;i++)
    for(int j=0;j<N;j++)
      A[j][i] = A[j][i]+B[j][i];

is interchanged to -
  for(int j=0;j<N;j++)
    for(int i=0;i<N;i++)
      A[j][i] = A[j][i]+B[j][i];

This pass is currently disabled by default.

To give a brief introduction it consists of 3 stages-

LoopInterchangeLegality : Checks the legality of loop interchange based on Dependency matrix.
LoopInterchangeProfitability: A very basic heuristic has been added to check for profitibility. This will evolve over time.
LoopInterchangeTransform : Which does the actual transform.

LNT Performance tests shows improvement in Polybench/linear-algebra/kernels/mvt and Polybench/linear-algebra/kernels/gemver becnmarks.

TODO:
1) Add support for reductions and lcssa phi.
2) Improve profitability model.
3) Improve loop selection algorithm to select best loop for interchange. Currently the innermost loop is selected for interchange.
4) Improve compile time regression found in llvm lnt due to this pass.
5) Fix issues in Dependency Analysis module.

A special thanks to Hal for reviewing this code.
Review: http://reviews.llvm.org/D7499




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231458 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-06 10:11:25 +00:00
David Majnemer
ee711b5b16 X86: Form IMGREL relocations for LLVM Functions
We supported forming IMGREL relocations from ConstantExprs involving
__ImageBase if the minuend was a GlobalVariable.  Extend this
functionality to all GlobalObjects.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231456 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-06 08:11:32 +00:00
Michael Zolotukhin
6023ad2d37 LegalizeTypes: Handle shift by 0 in ExpandShiftByConstant.
Though such shifts are usually optimized away by combiner, we still can
encounter them after a vector shift is legalized.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231443 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-06 01:13:01 +00:00
Rafael Espindola
b6fd95ab41 Remember to move a type to the correct set when setting the body.
We would set the body of a struct type (therefore making it non-opaque)
but were forgetting to move it to the non-opaque set.

Fixes pr22807.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231442 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-06 00:50:21 +00:00
Michael Gottesman
0d7cce41ff [objc-arc] Remove annotations code.
It will always be in the history if it is needed again. Now it is just dead
code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231435 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-06 00:34:29 +00:00
Nadav Rotem
368d2e9976 Teach ComputeNumSignBits about signed reminder.
This optimization a continuation of r231140 that reasoned about signed div.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231433 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-06 00:23:58 +00:00
Philip Reames
292f5ef237 [RewriteStatepointsForGC] Yet more test cases for relocation
At this point, we should have decent coverage of the involved code.  I've got a few more test cases to cleanup and submit, but what's here is already reasonable.

I've got a collection of liveness tests which will be posted for review along with a decent liveness algorithm in the next few days.  Once those are in, the code in this file should be well tested and I can start renaming things without risk of serious breakage.  



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231414 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-05 22:28:06 +00:00
Sanjay Patel
5f79fd2f02 [AVX] Lower / fast-isel scalar FP selects into VBLENDV instructions (PR22483)
This patch reduces code size for all AVX targets and increases speed for some chips.

SSE 4.1 introduced the useless (see code comments) 2-register form of BLENDV and
only in the packed float/double flavors.

AVX subsequently made the instruction useful by adding a 4-register operand form.

So we just need to paper over the lack of scalar forms of this instruction, complicate
the code to choose float or double forms, and use blendv on scalars since all FP is in
xmm registers anyway.

This gives us an approximately 50% speed up for a blendv microbenchmark sequence
on SandyBridge and Haswell:
blendv : 29.73 cycles/iter
logic : 43.15 cycles/iter

No new test cases with this patch because:

1. fast-isel-select-sse.ll tests the positive side for regular X86 lowering and fast-isel
2. sse-minmax.ll and fp-select-cmp-and.ll confirm that we're not firing for scalar selects without AVX
3. fp-select-cmp-and.ll and logical-load-fold.ll confirm that we're not firing for scalar selects with constants.

http://llvm.org/bugs/show_bug.cgi?id=22483

Differential Revision: http://reviews.llvm.org/D8063



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231408 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-05 21:46:54 +00:00
Ahmed Bougacha
77f46f4f9f [AArch64] Teach AsmPrinter about GlobalAddress operands.
Fixes PR22761, rdar://20024866.
Differential Revision: http://reviews.llvm.org/D8042


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231400 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-05 20:04:21 +00:00
Philip Reames
03001d828e [RewriteStatepointsForGC] Add additional tests around relocation
These are focused around the actual relocation rewriting itself, not the rest of the infrastructure.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231399 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-05 19:52:13 +00:00
Rafael Espindola
2f76abe7d7 Use the correct func begin symbol in all places in ppc.
I missed an occurrence of the old symbol in my previous patch.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231398 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-05 19:47:50 +00:00
Ahmed Bougacha
67297cd956 [ARM] Enable vector extload combine for legal types.
This commit enables forming vector extloads for ARM.
It only does so for legal types, and when we can't fold the extension
in a wide/long form of the user instruction.

Enabling it for larger types isn't as good an idea on ARM as it is on
X86, because: 
- we pretend that extloads are legal, but end up generating vld+vmov
- we have instructions like vld {dN, dM}, which can't be generated
  when we "manually expand" extloads to vld+vmov.

For legal types, the combine doesn't fire that often: in the
integration tests only in a big endian testcase, where it removes a
pointless AND.

Related to rdar://19723053
Differential Revision: http://reviews.llvm.org/D7423


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231396 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-05 19:37:53 +00:00
Rafael Espindola
2e2dbc35da Use the generic Lfunc_begin label on ppc.
This removes yet another custom label to mark the start of a function.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231390 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-05 18:55:50 +00:00
David Majnemer
42fcf79f36 X86: Optimize address mode matching for FRAME_ALLOC_RECOVER nodes
We know that the absolute symbol will be less than 2GB and thus will
always fit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231389 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-05 18:50:12 +00:00
Reid Kleckner
9f7c861416 Replace llvm.frameallocate with llvm.frameescape
Turns out it's pretty straightforward and simplifies the implementation.

Reviewers: andrew.w.kaylor

Differential Revision: http://reviews.llvm.org/D8051

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231386 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-05 18:26:34 +00:00
Simon Pilgrim
a744a15e97 [DagCombiner] Allow shuffles to merge through bitcasts
Currently shuffles may only be combined if they are of the same type, despite the fact that bitcasts are often introduced in between shuffle nodes (e.g. x86 shuffle type widening).

This patch allows a single input shuffle to peek through bitcasts and if the input is another shuffle will merge them, shuffling using the smallest sized type, and re-applying the bitcasts at the inputs and output instead.

Dropped old ShuffleToZext test - this patch removes the use of the zext and vector-zext.ll covers these anyhow.

Differential Revision: http://reviews.llvm.org/D7939

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231380 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-05 17:14:04 +00:00
Kit Barton
b98636a0f8 While reviewing the changes to Clang to add builtin support for the vsld, vsrd, and vsrad instructions, it was pointed out that the builtins are generating the LLVM opcodes (shl, lshr, and ashr) not calls to the intrinsics. This patch changes the implementation of the vsld, vsrd, and vsrad instructions from from intrinsics to VXForm_1 instructions and makes them legal with P8 Altivec. It also removes the definition of the int_ppc_altivec_vsld, int_ppc_altivec_vsrd, and int_ppc_altivec_vsrad intrinsics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231378 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-05 16:24:38 +00:00
Igor Laevsky
684d323b9b Revert change r231366 as it broke clang-native-arm-cortex-a9 Analysis/properties.m test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231374 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-05 15:41:14 +00:00
Elena Demikhovsky
e670dc7848 AVX-512, SKX: Enabled masked_load/store operations for this target.
Added lowering for ISD::CONCAT_VECTORS and ISD::INSERT_SUBVECTOR for i1 vectors,
it is needed to pass all masked_memop.ll tests for SKX.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231371 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-05 15:11:35 +00:00
Igor Laevsky
f8b3003ab8 Teach lowering to correctly handle invoke statepoint and gc results tied to them. Note that we still can not lower gc.relocates for invoke statepoints.
Also it extracts getCopyFromRegs helper function in SelectionDAGBuilder as we need to be able to customize type of the register exported from basic block during lowering of the gc.result.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231366 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-05 14:11:21 +00:00
Michael Kuperstein
2d8a36ee71 [InstCombine] Fix an assertion when fmul has a ConstantExpr operand
isNormalFp and isFiniteNonZeroFp should not assume vector operands can not be constant expressions.

Patch by Pawel Jurek <pawel.jurek@intel.com>
Differential Revision: http://reviews.llvm.org/D8053

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231359 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-05 08:38:57 +00:00
Craig Topper
62eaac6087 [X86] Use vmovss to handle inserting an element into index 0 of a v8f32 vector of zeros.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231354 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-05 06:38:42 +00:00
Rafael Espindola
304fe62b74 Use the existing begin and end symbol for debug info.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231338 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-05 02:05:42 +00:00
Kostya Serebryany
c2f4077b88 [sanitizer] add nosanitize metadata to more coverage instrumentation instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231333 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-05 01:20:05 +00:00
Chandler Carruth
4197c13062 [MBP] Revert r231238 which attempted to fix a nasty bug where MBP is
just arbitrarily interleaving unrelated control flows once they get
moved "out-of-line" (both outside of natural CFG ordering and with
diamonds that cannot be fully laid out by chaining fallthrough edges).

This easy solution doesn't work in practice, and it isn't just a small
bug. It looks like a very different strategy will be required. I'm
working on that now, and it'll again go behind some flag so that
everyone can experiment and make sure it is working well for them.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231332 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-05 01:07:03 +00:00
Paul Robinson
948b2db8a7 Turn off .debug_pubnames/pubtypes for PS4.
Differential Revision: http://reviews.llvm.org/D8067


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231322 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-05 00:08:27 +00:00
Matthias Braun
29aeaf5408 Improve test robustness
Improve test robustness in preparation of coming commits:
- Avoid undefs which may get propagated too much.
- Remove several pointless add 0, instructions

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231307 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-04 22:31:18 +00:00
Sanjoy Das
12aa70b7e9 [SCEV] make SCEV smarter about proving no-wrap.
Summary:
Teach SCEV to prove no overflow for an add recurrence by proving
something about the range of another add recurrence a loop-invariant
distance away from it.

Reviewers: atrick, hfinkel

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D7980

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231305 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-04 22:24:17 +00:00
Frederic Riss
d0d92e7d30 [dsymutil] Add minimal code to emit DIE trees.
This commit adds code to emit DIE trees that have been pruned from the
parts that haven't been marked as kept in the previous pass.

It works by 'cloning' the input DIE tree (as read by libDebugInfoDwarf)
into a tree of DIE objects. Cloning the DIEs means essentially cloning
their attributes. The code in this commit does only handle scalar and
block attributes (scalar because they are trivial, blocks because they
can't be easily replaced by a scalr placeholder), all the other ones
are replaced by placeholder zero values and will be handled in
further commits.

The added tests mostly check that the DIE tree has the correct layout and
also verify that a few chosen scalar and block attributes correctly make
their way into the output.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231300 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-04 22:07:44 +00:00
Rafael Espindola
236aa85873 Expand variables when evaluating absolute expressions.
This allows for variables to be used in .size.
This matches gnu AS functionality.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231295 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-04 22:03:21 +00:00
Paul Robinson
4ceab42509 Support standard DWARF TLS opcode; Darwin and PS4 use it.
Differential Revision: http://reviews.llvm.org/D8018


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231286 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-04 20:55:11 +00:00
Nemanja Ivanovic
b69d556c37 Add LLVM support for PPC cryptography builtins
Review: http://reviews.llvm.org/D7955


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231285 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-04 20:44:33 +00:00
Rafael Espindola
c90e7f79ca Bring r231132 back with a fix.
The issue was that we were always printing the remarks. Fix that and add a test
showing that it prints nothing if -pass-remarks is not given.

Original message:
Correctly handle -pass-remarks in the gold plugin.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231273 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-04 18:51:45 +00:00
Mehdi Amini
c94da20917 Make DataLayout Non-Optional in the Module
Summary:
DataLayout keeps the string used for its creation.

As a side effect it is no longer needed in the Module.
This is "almost" NFC, the string is no longer
canonicalized, you can't rely on two "equals" DataLayout
having the same string returned by getStringRepresentation().

Get rid of DataLayoutPass: the DataLayout is in the Module

The DataLayout is "per-module", let's enforce this by not
duplicating it more than necessary.
One more step toward non-optionality of the DataLayout in the
module.

Make DataLayout Non-Optional in the Module

Module->getDataLayout() will never returns nullptr anymore.

Reviewers: echristo

Subscribers: resistor, llvm-commits, jholewinski

Differential Revision: http://reviews.llvm.org/D7992

From: Mehdi Amini <mehdi.amini@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231270 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-04 18:43:29 +00:00
Adrian Prantl
2e74ddea3a Update the out-of-date dwarf expressions in these testcases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231261 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-04 17:39:59 +00:00
Marek Olsak
506d4b2cb4 R600/SI: Add an intrinsic for S_FLBIT_I32 / V_FFBH_I32
Required by OpenGL (ARB_gpu_shader5).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231259 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-04 17:33:45 +00:00
NAKAMURA Takumi
69de0932a5 Revert r231132, "Correctly handle -pass-remarks in the gold plugin.", for now, to suppress log floodng in LTO.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231253 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-04 16:24:28 +00:00
Jozef Kolek
2e37a6f306 [mips][microMIPS] Make usage of ADDU16 and SUBU16 by code generator
Differential Revision: http://reviews.llvm.org/D7609


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231249 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-04 15:47:42 +00:00
Andrea Di Biagio
da5e5688e9 [X86][FastISel] Simplify the logic in method X86SelectSIToFP.
The target-independent selection algorithm in FastISel already knows how
to select a SINT_TO_FP if the target is SSE but not AVX.

On targets that have SSE but not AVX, the tablegen'd 'fastEmit' functions
for ISD::SINT_TO_FP know how to select instruction X86::CVTSI2SSrr
(for an i32 to f32 conversion) and X86::CVTSI2SDrr (for an i32 to f64
conversion).

This patch simplifies the logic in method X86SelectSIToFP knowing that
the code would not be reachable if the subtarget doesn't have AVX.
No functional change intended.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231243 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-04 14:23:25 +00:00
Dmitry Vyukov
826cbaf934 asan: do not instrument direct inbounds accesses to stack variables
Do not instrument direct accesses to stack variables that can be
proven to be inbounds, e.g. accesses to fields of structs on stack.

But it eliminates 33% of instrumentation on webrtc/modules_unittests
(number of memory accesses goes down from 290152 to 193998) and
reduces binary size by 15% (from 74M to 64M) and improved compilation time by 6-12%.

The optimization is guarded by asan-opt-stack flag that is off by default.

http://reviews.llvm.org/D7583



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231241 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-04 13:27:53 +00:00
Chandler Carruth
67fade9110 [MBP] Fix a really horrible bug in MachineBlockPlacement, but behind
a flag for now.

First off, thanks to Daniel Jasper for really pointing out the issue
here. It's been here forever (at least, I think it was there when
I first wrote this code) without getting really noticed or fixed.

The key problem is what happens when two reasonably common patterns
happen at the same time: we outline multiple cold regions of code, and
those regions in turn have diamonds or other CFGs for which we can't
just topologically lay them out. Consider some C code that looks like:

  if (a1()) { if (b1()) c1(); else d1(); f1(); }
  if (a2()) { if (b2()) c2(); else d2(); f2(); }
  done();

Now consider the case where a1() and a2() are unlikely to be true. In
that case, we might lay out the first part of the function like:

  a1, a2, done;

And then we will be out of successors in which to build the chain. We go
to find the best block to continue the chain with, which is perfectly
reasonable here, and find "b1" let's say. Laying out successors gets us
to:

  a1, a2, done; b1, c1;

At this point, we will refuse to lay out the successor to c1 (f1)
because there are still un-placed predecessors of f1 and we want to try
to preserve the CFG structure. So we go get the next best block, d1.

... wait for it ...

Except that the next best block *isn't* d1. It is b2! d1 is waaay down
inside these conditionals. It is much less important than b2. Except
that this is exactly what we didn't want. If we keep going we get the
entire set of the rest of the CFG *interleaved*!!!

  a1, a2, done; b1, c1; b2, c2; d1, f1; d2, f2;

So we clearly need a better strategy here. =] My current favorite
strategy is to actually try to place the block whose predecessor is
closest. This very simply ensures that we unwind these kinds of CFGs the
way that is natural and fitting, and should minimize the number of cache
lines instructions are spread across.

It also happens to be *dead simple*. It's like the datastructure was
specifically set up for this use case or something. We only push blocks
onto the work list when the last predecessor for them is placed into the
chain. So the back of the worklist *is* the nearest next block.

Unfortunately, a change like this is going to cause *soooo* many
benchmarks to swing wildly. So for now I'm adding this under a flag so
that we and others can validate that this is fixing the problems
described, that it seems possible to enable, and hopefully that it fixes
more of our problems long term.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231238 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-04 12:18:08 +00:00
Daniel Jasper
f68f28a41d Add a flag to experiment with outlining optional branches.
In a CFG with the edges A->B->C and A->C, B is an optional branch.

LLVM's default behavior is to lay the blocks out naturally, i.e. A, B,
C, in order to improve code locality and fallthroughs. However, if a
function contains many of those optional branches only a few of which
are taken, this leads to a lot of unnecessary icache misses. Moving B
out of line can work around this.

Review: http://reviews.llvm.org/D7719

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231230 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-04 11:05:34 +00:00
Kristof Beyls
78c4ef5120 Fix PR22408 - LLVM producing AArch64 TLS relocations that GNU linkers cannot handle yet.
As is described at http://llvm.org/bugs/show_bug.cgi?id=22408, the GNU linkers
ld.bfd and ld.gold currently only support a subset of the whole range of AArch64
ELF TLS relocations. Furthermore, they assume that some of the code sequences to
access thread-local variables are produced in a very specific sequence.
When the sequence is not as the linker expects, it can silently mis-relaxe/mis-optimize
the instructions.
Even if that wouldn't be the case, it's good to produce the exact sequence,
as that ensures that linkers can perform optimizing relaxations.

This patch:

* implements support for 16MiB TLS area size instead of 4GiB TLS area size. Ideally clang
  would grow an -mtls-size option to allow support for both, but that's not part of this patch.
* by default doesn't produce local dynamic access patterns, as even modern ld.bfd and ld.gold
  linkers do not support the associated relocations. An option (-aarch64-elf-ldtls-generation)
  is added to enable generation of local dynamic code sequence, but is off by default.
* makes sure that the exact expected code sequence for local dynamic and general dynamic
  accesses is produced, by making use of a new pseudo instruction. The patch also removes
  two (AArch64ISD::TLSDESC_BLR, AArch64ISD::TLSDESC_CALL) pre-existing AArch64-specific pseudo
  SDNode instructions that are superseded by the new one (TLSDESC_CALLSEQ).



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231227 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-04 09:12:08 +00:00
Michael Kuperstein
bbfda9c125 [DAGCombine] Fix a bug in a BUILD_VECTOR combine
When trying to convert a BUILD_VECTOR into a shuffle, we try to split a single source vector that is twice as wide as the destination vector. 
We can not do this when we also need the zero vector to create a blend.
This fixes PR22774.

Differential Revision: http://reviews.llvm.org/D8040

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231219 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-04 07:27:39 +00:00
Davide Italiano
8667ab752e [MC][Target] Implement support for R_X86_64_SIZE{32,64}.
Differential Revision:	D7990
Reviewed by:	rafael, majnemer


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231216 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-04 06:49:39 +00:00
Zachary Turner
b9c28bc7f1 [llvm-pdbdump] Display full enum definitions.
This will now display enum definitions both at the global
scope as well as nested inside of classes.  Additionally,
it will no longer display enums at the global scope if the
enum is nested.  Instead, it will omit the definition of
the enum globally and instead emit it in the corresponding
class definition.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231215 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-04 06:09:53 +00:00
Filipe Cabecinhas
7eefc249b8 Fix the test for r231201. We don't crash anymore.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231207 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-04 02:09:40 +00:00
Rafael Espindola
bd490c174e Use the vanilla func_end symbol for .size.
No need to create yet another temp symbol.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231198 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-04 01:35:23 +00:00
Eric Christopher
1df6d33c5e Weaken the check for a specific movl on the twoaddr-coalesce-3
test - we only care that there are two moves in the loop and not
which part is relative to which register anyhow.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231191 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-04 01:19:17 +00:00
Filipe Cabecinhas
08efe825e4 Fix the x86-upgrade-avx2-vbroadcast.ll test by commenting the CHECK lines
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231187 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-04 00:49:12 +00:00
Rafael Espindola
c82398a2ac Drop the "eh_" from eh_func_begin and eh_func_end.
They will be used for more than eh tables.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231185 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-04 00:27:43 +00:00
Philip Reames
9f3ecd086a [RewriteStatepointsForGC] Fix a relocation bug w.r.t values defined by invoke instructions
RewriteStatepointsForGC pass emits an alloca for each GC pointer which will be relocated. It then inserts stores after def and all relocations, and inserts loads before each use as well. In the end, mem2reg is used to update IR with relocations in SSA form.

However, there is a problem with inserting stores for values defined by invoke instructions. The code didn't expect a def was a terminator instruction, and inserting instructions after these terminators resulted in malformed IR.

This patch fixes this problem by handling invoke instructions as a special case. If the def is an invoke instruction, the store will be inserted at the beginning of the normal destination block. Since return value from invoke instruction does not dominate the unwind destination block, no action is needed there.

Patch by: Chen Li
Differential Revision: http://reviews.llvm.org/D7923




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231183 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-04 00:13:52 +00:00
Juergen Ributzka
e49da9aff1 Remove 'llvm.x86.avx2.vbroadcasti128' intrinsic.
The intrinsic is no longer generated by the front-end. Remove the intrinsic and
auto-upgrade it to a vector shuffle.

Reviewed by Nadav

This is related to rdar://problem/18742778.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231182 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-04 00:13:25 +00:00
Eric Christopher
f2bf51c593 Update twoaddr-coalesce-3.ll to run on darwin and linux machines:
a) Default relocation model differences,
b) Different numbers of # in comments

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231178 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-03 23:56:20 +00:00
Kostya Serebryany
ae0620c4e9 [sanitizer/coverage] Add AFL-style coverage counters (search heuristic for fuzzing).
Introduce -mllvm -sanitizer-coverage-8bit-counters=1
which adds imprecise thread-unfriendly 8-bit coverage counters.

The run-time library maps these 8-bit counters to 8-bit bitsets in the same way
AFL (http://lcamtuf.coredump.cx/afl/technical_details.txt) does:
counter values are divided into 8 ranges and based on the counter
value one of the bits in the bitset is set.
The AFL ranges are used here: 1, 2, 3, 4-7, 8-15, 16-31, 32-127, 128+.

These counters provide a search heuristic for single-threaded
coverage-guided fuzzers, we do not expect them to be useful for other purposes.

Depending on the value of -fsanitize-coverage=[123] flag,
these counters will be added to the function entry blocks (=1),
every basic block (=2), or every edge (=3).

Use these counters as an optional search heuristic in the Fuzzer library.
Add a test where this heuristic is critical.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231166 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-03 23:27:02 +00:00
Reid Kleckner
ec0a396ffa WinEH: Remove vestigial EH object
Ultimately, we'll need to leave something behind to indicate which
alloca will hold the exception, but we can figure that out when it comes
time to emit the __CxxFrameHandler3 catch handler table.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231164 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-03 23:20:30 +00:00
David Majnemer
8db493c4e1 InstCombine: Ensure select condition types are identical before merging
Selection conditions may be vectors or scalars.  Make sure InstCombine
doesn't indiscriminately assume that a select which is value dependent
on another select have identical select condition types.

This fixes PR22773.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231156 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-03 22:40:36 +00:00
Andrew Kaylor
92dabb5710 Moving WinEH outlining tests to an architecture neutral location
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231155 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-03 22:33:39 +00:00
Eric Christopher
63295d884c Fix a problem where the TwoAddressInstructionPass which generate redundant register moves in a loop.
From:
int M, total;
void foo() {
int i;
for (i = 0; i < M; i++) {
  total = total + i / 2;
}
}

This is the kernel loop:

.LBB0_2: # %for.body

=>This Inner Loop Header: Depth=1
movl %edx, %esi
movl %ecx, %edx
shrl $31, %edx
addl %ecx, %edx
sarl %edx
addl %esi, %edx
incl %ecx
cmpl %eax, %ecx
jl .LBB0_2
--------------------------
The first mov insn "movl %edx, %esi" could be removed if we change "addl %esi, %edx" to "addl %edx, %esi".

The IR before TwoAddressInstructionPass is:
BB#2: derived from LLVM BB %for.body

Predecessors according to CFG: BB#1 BB#2
    %vreg3<def> = COPY %vreg12<kill>; GR32:%vreg3,%vreg12
    %vreg2<def> = COPY %vreg11<kill>; GR32:%vreg2,%vreg11
    %vreg7<def,tied1> = SHR32ri %vreg3<tied0>, 31, %EFLAGS<imp-def,dead>; GR32:%vreg7,%vreg3
    %vreg8<def,tied1> = ADD32rr %vreg3<tied0>, %vreg7<kill>, %EFLAGS<imp-def,dead>; GR32:%vreg8,%vreg3,%vreg7
    %vreg9<def,tied1> = SAR32r1 %vreg8<kill,tied0>, %EFLAGS<imp-def,dead>; GR32:%vreg9,%vreg8
    %vreg4<def,tied1> = ADD32rr %vreg9<kill,tied0>, %vreg2<kill>, %EFLAGS<imp-def,dead>; GR32:%vreg4,%vreg9,%vreg2
    %vreg5<def,tied1> = INC64_32r %vreg3<kill,tied0>, %EFLAGS<imp-def,dead>; GR32:%vreg5,%vreg3
    CMP32rr %vreg5, %vreg0, %EFLAGS<imp-def>; GR32:%vreg5,%vreg0
    %vreg11<def> = COPY %vreg4; GR32:%vreg11,%vreg4
    %vreg12<def> = COPY %vreg5<kill>; GR32:%vreg12,%vreg5
    JL_4 <BB#2>, %EFLAGS<imp-use,kill>
Now TwoAddressInstructionPass will choose vreg9 to be tied with vreg4. However, it doesn't see that there is copy from vreg4 to vreg11 and another copy from vreg11 to vreg2 inside the loop body. To remove those copies, it is necessary to choose vreg2 to be tied with vreg4 instead of vreg9. This code pattern commonly appears when there is reduction operation in a loop.

So check for a reversed copy chain and if we encounter one then we can commute the add instruction so we can avoid a copy.

Patch by Wei Mi.
http://reviews.llvm.org/D7806

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231148 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-03 22:03:03 +00:00
Nadav Rotem
10faa1b211 Teach ComputeNumSignBits about signed divisions.
http://reviews.llvm.org/D8028
rdar://20023136



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231140 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-03 21:39:02 +00:00
Rafael Espindola
0685d06674 Correctly handle -pass-remarks in the gold plugin.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231132 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-03 21:11:13 +00:00
Paul Robinson
1f8fa31e5d [X86][ELF] Correct relocation for DWARF TLS references
Previously we had only Linux using DTPOFF for these; all X86 ELF
targets should. Fixes a side issue mentioned in PR21077.

Differential Revision: http://reviews.llvm.org/D8011


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231130 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-03 21:01:27 +00:00
Adrian Prantl
e8e51a18a2 Fix PR22762. When emitting a DWARF expression check whether this is the
frame register before checking if there is a DWARF register number for it.

Thanks to H.J. Lu for diagnosing this and providing the testcase!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231121 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-03 20:12:52 +00:00
Andrew Kaylor
83eaade2b4 Outline cleanup handlers for native Windows C++ exception handling
Differential Revision: http://reviews.llvm.org/D7865



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231117 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-03 20:00:16 +00:00
Kit Barton
40057e8ee8 Add the following 64-bit vector integer arithmetic instructions added in POWER8:
vaddudm
vsubudm
vmulesw
vmulosw
vmuleuw
vmulouw
vmuluwm
vmaxsd
vmaxud
vminsd
vminud
vcmpequd
vcmpequd.
vcmpgtsd
vcmpgtsd.
vcmpgtud
vcmpgtud.
vrld
vsld
vsrd
vsrad

Phabricator review: http://reviews.llvm.org/D7959


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231115 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-03 19:55:45 +00:00
Reid Kleckner
9c28314a68 Make llvm.eh.begincatch use an outparam
Ultimately, __CxxFrameHandler3 needs us to put a stack offset in a
table, and it will take responsibility for copying the exception object
into that slot. Modelling the exception object as an SSA value returned
by begincatch isn't going to work in general, so make it use an output
parameter.

Reviewers: andrew.w.kaylor

Differential Revision: http://reviews.llvm.org/D7920

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231086 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-03 17:41:09 +00:00
Chad Rosier
f1de1adc82 [AArch64] When combining constant mul of -3, prefer (sub x, (shl x, N)).
This change only effects codegen when the constant is -3.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231085 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-03 17:31:01 +00:00
Duncan P. N. Exon Smith
b056aa798d DebugInfo: Move new hierarchy into place
Move the specialized metadata nodes for the new debug info hierarchy
into place, finishing off PR22464.  I've done bootstraps (and all that)
and I'm confident this commit is NFC as far as DWARF output is
concerned.  Let me know if I'm wrong :).

The code changes are fairly mechanical:

  - Bumped the "Debug Info Version".
  - `DIBuilder` now creates the appropriate subclass of `MDNode`.
  - Subclasses of DIDescriptor now expect to hold their "MD"
    counterparts (e.g., `DIBasicType` expects `MDBasicType`).
  - Deleted a ton of dead code in `AsmWriter.cpp` and `DebugInfo.cpp`
    for printing comments.
  - Big update to LangRef to describe the nodes in the new hierarchy.
    Feel free to make it better.

Testcase changes are enormous.  There's an accompanying clang commit on
its way.

If you have out-of-tree debug info testcases, I just broke your build.

  - `upgrade-specialized-nodes.sh` is attached to PR22564.  I used it to
    update all the IR testcases.
  - Unfortunately I failed to find way to script the updates to CHECK
    lines, so I updated all of these by hand.  This was fairly painful,
    since the old CHECKs are difficult to reason about.  That's one of
    the benefits of the new hierarchy.

This work isn't quite finished, BTW.  The `DIDescriptor` subclasses are
almost empty wrappers, but not quite: they still have loose casting
checks (see the `RETURN_FROM_RAW()` macro).  Once they're completely
gutted, I'll rename the "MD" classes to "DI" and kill the wrappers.  I
also expect to make a few schema changes now that it's easier to reason
about everything.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231082 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-03 17:24:31 +00:00
NAKAMURA Takumi
6800198300 Make llvm/test/Object/archive-format.test CRLF-tolerant.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231074 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-03 15:54:48 +00:00
Daniel Jasper
bbaf4fd14c During PHI elimination, split critical edges that move copies out of loops.
This prevents the behavior observed in llvm.org/PR22369. I am not sure
whether I am reading the code correctly, but the early exit based on
isLiveOutPastPHIs() seems to make the wrong assumption that
RegisterCoalescer won't be able to coalesce those copies later.

This change hides the new behavior behind -no-phi-elim-live-out-early-exit
as it currently breaks four tests:
 * Assertion in:
     CodeGen/Hexagon/hwloop-cleanup.ll
 * Worse code in:
     CodeGen/X86/coalescer-commute4.ll
     CodeGen/X86/phys_subreg_coalesce-2.ll
     CodeGen/X86/zlib-longest-match.ll
   The root cause here seems to be that the heuristic that determines
   the visitation order in RegisterCoalescer gets less lucky.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231064 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-03 10:23:11 +00:00
Owen Anderson
25dc6c8a08 Cleanup after r230934 per Dave's suggestions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231056 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-03 05:39:27 +00:00
Ahmed Bougacha
14593eb417 [X86] Special-case 2x CMOV when custom-inserting.
This lets us avoid a few copies that are otherwise hard to get rid of.
The way this is done is, the custom-inserter looks at the following
instruction for another CMOV, and replaces both at the same time.
A previous version used a new CMOV2 opcode, but the custom inserter
is expected to be able to return a different basic block anyway, which
means it's OK - though far from ideal - to alter that block's contents.
Explicitly document that, in case it ever makes a difference.
Alternatives welcome!

Follow-up to r231045.

rdar://19767934
Closes http://reviews.llvm.org/D8019


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231046 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-03 01:21:16 +00:00
Ahmed Bougacha
8b5527deef [X86] Combine (cmov (and/or (setcc) (setcc))) into (cmov (cmov)).
Fold and/or of setcc's to double CMOV:

(CMOV F, T, ((cc1 | cc2) != 0)) -> (CMOV (CMOV F, T, cc1), T, cc2)
(CMOV F, T, ((cc1 & cc2) != 0)) -> (CMOV (CMOV T, F, !cc1), F, !cc2)

When we can't use the CMOV instruction, it might increase branch
mispredicts.  When we can, or when there is no mispredict, this
improves throughput and reduces register pressure.

These can't be catched by generic combines, because the pattern can
appear when legalizing some instructions (such as fcmp une).

rdar://19767934
http://reviews.llvm.org/D7634


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231045 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-03 01:09:14 +00:00
Reid Kleckner
a8182029a1 Fix cppeh breakage due to racing commits
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231044 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-03 01:04:39 +00:00
Peter Collingbourne
27821d7200 LowerBitSets: Use byte arrays instead of bit sets to represent in-memory bit sets.
By loading from indexed offsets into a byte array and applying a mask, a
program can test bits from the bit set with a relatively short instruction
sequence. For example, suppose we have 15 bit sets to lay out:

A (16 bits), B (15 bits), C (14 bits), D (13 bits), E (12 bits),
F (11 bits), G (10 bits), H (9 bits), I (7 bits), J (6 bits), K (5 bits),
L (4 bits), M (3 bits), N (2 bits), O (1 bit)

These bits can be laid out in a 16-byte array like this:

      Byte Offset
    0123456789ABCDEF
Bit
  7 HHHHHHHHHIIIIIII
  6 GGGGGGGGGGJJJJJJ
  5 FFFFFFFFFFFKKKKK
  4 EEEEEEEEEEEELLLL
  3 DDDDDDDDDDDDDMMM
  2 CCCCCCCCCCCCCCNN
  1 BBBBBBBBBBBBBBBO
  0 AAAAAAAAAAAAAAAA

For example, to test bit X of A, we evaluate ((bits[X] & 1) != 0), or to
test bit X of I, we evaluate ((bits[9 + X] & 0x80) != 0). This can be done
in 1-2 machine instructions on x86, or 4-6 instructions on ARM.

This uses the LPT multiprocessor scheduling algorithm to lay out the bits
efficiently.

Saves ~450KB of instructions in a recent build of Chromium.

Differential Revision: http://reviews.llvm.org/D7954

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231043 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-03 00:49:28 +00:00
Andrew Kaylor
f89c6af16b Remap arguments and non-alloca values used by outlined C++ exception handlers.
Differential Revision: http://reviews.llvm.org/D7844



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231042 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-03 00:41:03 +00:00
Benjamin Kramer
51a833938f LoopIdiom: Give globals for memset_pattern16 private linkage.
There's really no reason to have them have entries in the symbol table
anymore. Old versions of ld64 had some bugs in this area but those have
been fixed long ago.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231041 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-03 00:17:09 +00:00
Reid Kleckner
8594a2aa79 WinEH: Run opt -instnamer over some cppeh tests and update CHECKs
In the future, we should run the output of clang through instnamer to
make it easier to manually edit test cases.

No functionality change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231037 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-03 00:05:35 +00:00
Adrian Prantl
994176ad7c Refactor DebugLocDWARFExpression so it doesn't require access to the
TargetRegisterInfo. DebugLocEntry now holds a buffer with the raw bytes
of the pre-calculated DWARF expression.

Ought to be NFC, but it does slightly alter the output format of the
textual assembly.

This reapplies 230930 without the assertion in DebugLocEntry::finalize()
because not all Machine registers can be lowered into DWARF register
numbers and floating point constants cannot be expressed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231023 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-02 22:02:33 +00:00
Sanjoy Das
caee94bbb4 Revert some changes that were made to fix PR20680.
This re-lands change r230921.  r230921 was reverted because it broke a
clang test; a checkin fixing the clang test will be commited shortly.

Summary:
As far as I can tell, the real bug causing the issue was fixed in
r230533.  SCEVExpander should mark an increment operation as nuw or nsw
only if it can *prove* that the operation does not overflow.  There
shouldn't be any situation where we have to do something different
because of no-wrap flags generated by SCEVExpander.

Revert "IndVarSimplify: Allow LFTR to fire more often"

This reverts commit 1ade0f0faa (SVN: 222213).

Revert "IndVarSimplify: Don't let LFTR compare against a poison value"

This reverts commit c0f2b8b528 (SVN: 217102).

Reviewers: majnemer, atrick, spatel

Differential Revision: http://reviews.llvm.org/D7979

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231018 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-02 21:41:07 +00:00
Reid Kleckner
2dc2d3f820 lit: Add 'cd' support to the internal shell and port some tests
The internal shell was already threading around a 'cwd' parameter. We
just have to make it mutable so that we can update it as the test script
executes.

If the shell ever grows support for environment variable substitution,
we could also implement support for export.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231017 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-02 21:33:18 +00:00
Adrian Prantl
a2e69c9c58 Revert "Refactor DebugLocDWARFExpression so it doesn't require access to the"
This reverts commit 230975 to investigate buildbot breakage.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231004 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-02 20:01:54 +00:00
David Blaikie
7f620e56cd Change SystemZ large tests to use the existing long_tests property
(this is already used in Clang for a couple of tests)

Reviewers: uweigand

Differential Revision: http://reviews.llvm.org/D7965

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230998 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-02 19:34:11 +00:00
Rafael Espindola
de833240aa Add r230655 back with a fix.
The issue is that now we have a diag handler during optimizations
and get forward every optimization remark, flooding stdout.

The same filtering should probably be done with or without a
custom handler, but for now just ignore remarks.

Original message:

gold-plugin: "Upgrade" debug info and handle its warnings.

The gold plugin never calls MaterializeModule, so any old debug info
was not deleted and could cause crashes.

Now that it is being "upgraded", the plugin also has to handle warnings
and create Modules with a nice id (it shows in the warning).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230991 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-02 19:08:03 +00:00
Paul Robinson
a2541bd006 Revert r230979, should apply to all X86 ELF.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230985 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-02 18:50:18 +00:00
Paul Robinson
d31f89ebc1 [PS4] Correct relocation for DWARF TLS references.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230979 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-02 17:44:52 +00:00
Adrian Prantl
9680c9c1a8 Refactor DebugLocDWARFExpression so it doesn't require access to the
TargetRegisterInfo. DebugLocEntry now holds a buffer with the raw bytes
of the pre-calculated DWARF expression.

Ought to be NFC, but it does slightly alter the output format of the
textual assembly.

This reapplies 230930 with a relaxed assertion in DebugLocEntry::finalize()
that allows for empty DWARF expressions for constant FP values.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230975 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-02 17:21:06 +00:00
Elena Demikhovsky
53fb369429 AVX-512: Add assembly parser support for Rounding mode
By Asaf Badouh <asaf.badouh@intel.com>



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230962 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-02 15:00:34 +00:00
Vasileios Kalintiris
5a393cab69 [mips] Optimize conditional moves where RHS is zero.
Summary:
When the RHS of a conditional move node is zero, we can utilize the $zero
register by inverting the conditional move instruction and by swapping the
order of its True/False operands.

Reviewers: dsanders

Differential Revision: http://reviews.llvm.org/D7945

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230956 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-02 12:47:32 +00:00
Owen Anderson
132a34981f Teach the verifier to enforce that the alignment argument of memory intrinsics must be a power of 2.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230941 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-02 09:35:06 +00:00
Owen Anderson
8fae2845b1 Teach DataLayout that alignments on basic types must be powers of two.
Fixes assertion failures/crashes on bad datalayout specifications.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230940 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-02 09:35:03 +00:00
Owen Anderson
c7292fdabe Teach DataLayout that ABI alignments for non-aggregate types must be non-zero.
This manifested as assertions and/or crashes in later phases of optimization,
depending on the build configuration.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230939 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-02 09:34:59 +00:00
Owen Anderson
ddfdffbb10 Teach DataLayout that pointer ABI and preferred alignments are required to be powers of two.
Previously this resulted in asserts and/or crashes (depending on build configuration) at various phases in the optimizer.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230938 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-02 06:33:51 +00:00
Owen Anderson
f212856e50 Teach DataLayout that zero-byte pointer sizes don't make sense.
Previously this would result in assertion failures or simply crashes
at various points in the optimizer when trying to create types of zero
bit width.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230936 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-02 06:00:02 +00:00
Owen Anderson
0923ca275b Teach the LLParser to fail gracefully when it encounters an invalid label name.
Previous it would either assert in +Asserts, or crash in -Asserts. Found by fuzzing LLParser.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230935 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-02 05:25:09 +00:00
Owen Anderson
dafab60b57 Fix a crash in the LL parser where it failed to validate that the pointer operand of a GEP was valid.
This manifested as an assertion failure in +Asserts builds, and a hard crash in -Asserts builds.  Found by fuzzing the LL parser.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230934 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-02 05:25:06 +00:00
Zachary Turner
0c7c98a27d [llvm-pdbdump] Many minor fixes and improvements
A short list of some of the improvements:

1) Now supports -all command line argument, which implies many
   other command line arguments to simplify usage.
2) Now supports -no-compiler-generated command line argument to
   exclude compiler generated types.
3) Prints base class list.
4) -class-definitions implies -types.
5) Proper display of bitfields.
6) Can now distinguish between struct/class/interface/union.

And a few other minor tweaks.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230933 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-02 04:39:56 +00:00
Nico Weber
5e871d0b9c Revert r230930, it caused PR22747.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230932 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-02 04:37:11 +00:00
Adrian Prantl
d21acaf6a1 Refactor DebugLocDWARFExpression so it doesn't require access to the
TargetRegisterInfo. DebugLocEntry now holds a buffer with the raw bytes
of the pre-calculated DWARF expression.

Ought to be NFC, but it does slightly alter the output format of the
textual assembly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230930 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-02 02:38:18 +00:00
NAKAMURA Takumi
6cad61163a Revert r230921, "Revert some changes that were made to fix PR20680.", for now.
It caused a failure on clang/test/Misc/backend-optimization-failure.cpp .

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230929 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-02 01:14:03 +00:00
Craig Topper
a2d7ca4495 [X86] Fix diassembler crash on AVX512 cmpps/cmppd with immediate that doesn't fit in 5-bits. Fixes PR22743.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230924 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-02 00:22:29 +00:00
Sanjoy Das
008dd56706 Revert some changes that were made to fix PR20680.
Summary:
As far as I can tell, the real bug causing the issue was fixed in
r230533.  SCEVExpander should mark an increment operation as nuw or nsw
only if it can *prove* that the operation does not overflow.  There
shouldn't be any situation where we have to do something different
because of no-wrap flags generated by SCEVExpander.

Revert "IndVarSimplify: Allow LFTR to fire more often"

This reverts commit 1ade0f0faa (SVN: 222213).

Revert "IndVarSimplify: Don't let LFTR compare against a poison value"

This reverts commit c0f2b8b528 (SVN: 217102).

Reviewers: majnemer, atrick, spatel

Differential Revision: http://reviews.llvm.org/D7979

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230921 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-01 23:36:26 +00:00
Elena Demikhovsky
975e9b99aa AVX-512: Added mask and rounding mode for scalar arithmetics
Added more tests for scalar instructions to destinguish between AVX and AVX-512 forms.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230891 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-01 07:44:04 +00:00
Zachary Turner
914913952c [llvm-pdbdump] Add regex-based filtering.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230888 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-01 06:49:49 +00:00
NAKAMURA Takumi
a18f49225a Revert r230655, "gold-plugin: "Upgrade" debug info and handle its warnings."
It emits *millions of warnings* during selfhosting LTO build, to choke the buildbot with gigbytes of log.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230885 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-01 04:16:28 +00:00
Sanjay Patel
821bba7fda avoid infinite looping when folding vector multiplies of constants (PR22698)
We were missing a check for the following fold in DAGCombiner:

// fold (fmul (fmul x, c1), c2) -> (fmul x, (fmul c1, c2))

If 'x' is also a constant, then we shouldn't do anything. Otherwise, we could end up swapping the operands back and forth forever.

This should fix:
http://llvm.org/bugs/show_bug.cgi?id=22698

Differential Revision: http://reviews.llvm.org/D7917



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230884 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-01 00:09:35 +00:00
Sanjay Patel
7497834516 fixed to test only the feature, not the feature and a CPU
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230883 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-01 00:02:03 +00:00
Duncan P. N. Exon Smith
17549804c1 DebugInfo: Convert DW_OP_piece => DW_OP_bit_piece
r228631 stopped using `DW_OP_piece` inside `DIExpression`s in the IR,
but it apparently missed updating these testcases.  Caught by verifier
checks for `MDExpression` while working on moving the new hierarchy into
place.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230882 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-28 23:57:16 +00:00
Sanjay Patel
4f00dcbf22 make the tested feature (SSE2) explicit
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230881 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-28 23:55:24 +00:00
Duncan P. N. Exon Smith
aee20c05e6 DebugInfo: Fix invalid file reference in CodeGen/X86/unknown-location.ll
There are two types of files in the old (current) debug info schema.

    !0 = !{!"some/filename", !"/path/to/dir"}
    !1 = !{!"0x29", !0} ; [ DW_TAG_file_type ]

!1 has a wrapper class called `DIFile` which inherits from `DIScope` and
is referenced in 'scope' fields.

!0 is called a "file node", and debug info nodes with a 'file' field
point at one of these directly -- although they're built in `DIBuilder`
by sending in a `DIFile` and reaching into it.

In the new hierarchy, I unified these nodes as `MDFile` (which `DIFile`
is a lightweight wrapper for) in r230057.  Moving the new hierarchy into
place (and upgrading testcases) caused CodeGen/X86/unknown-location.ll
to start failing -- apparently "0x29" was previously showing up in the
linetable as a filename, causing:

    .loc 2 4 3

(where 2 points at filename "0x29") instead of:

    .loc 1 4 3

(where 1 points at the actual filename).

Change the testcase to use the old schema correctly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230880 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-28 23:52:24 +00:00
Sanjay Patel
be657e70b1 fixed to test only the feature, not the feature and a CPU
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230878 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-28 23:47:09 +00:00
Duncan P. N. Exon Smith
9b18dbfe83 Optimize metadata node fields for CHECK-ability
While gaining practical experience hand-updating CHECK lines (for moving
the new debug info hierarchy into place),  I learnt a few things about
CHECK-ability of the specialized node assembly output.

  - The first part of a `CHECK:` is to identify the "right" node (this
    is especially true if you intend to use the new `CHECK-SAME`
    feature, since the first CHECK needs to identify the node correctly
    before you can split the line).
      - If there's a `tag:`, it should go first.
      - If there's a `name:`, it should go next (followed by the
        `linkageName:`, if any).
      - If there's a `scope:`, it should follow after that.
  - When a node type supports multiple DW_TAGs, but one is implied by
    its name and is overwhelmingly more common, the `tag:` field is
    terribly uninteresting unless it's different.
      - `MDBasicType` is almost always `DW_TAG_base_type`.
      - `MDTemplateValueParameter` is almost always
        `DW_TAG_template_value_parameter`.
  - Printing `name: ""` doesn't improve CHECK-ability, and there are far
    more nodes than I realized that are commonly nameless.
  - There are a few other fields that similarly aren't very interesting
    when they're empty.

This commit updates the `AsmWriter` as suggested above (and makes
necessary changes in `LLParser` for round-tripping).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230877 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-28 23:21:38 +00:00
Duncan P. N. Exon Smith
837f19eb80 AsmWriter: Escape string fields in metadata
Properly escape string fields in metadata.  I've added a spot-check with
direct coverage for `MDFile::getFilename()`, but we'll get more coverage
once the hierarchy is moved into place (since this comes up in various
checked-in testcases).

I've replicated the `if` logic using the `ShouldSkipEmpty` flag
(although a follow-up commit is going to change how often this flag is
specified); no NFCI other than escaping the string fields.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230875 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-28 22:20:16 +00:00
Duncan P. N. Exon Smith
80f65ca7ee Fix line endings on Transforms/Inline/inline_dbg_declare.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230870 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-28 21:38:32 +00:00
Craig Topper
8df1c6ef09 [X86] Remove the blendpd/blendps/pblendw/pblendd intrinsics. They can represented by shuffle_vector instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230860 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-28 19:33:17 +00:00
Benjamin Kramer
6b7603962a TRE: Just erase dead BBs and tweak the iteration loop not to increment the deleted BB iterator.
Leaving empty blocks around just opens up a can of bugs like PR22704. Deleting
them early also slightly simplifies code.

Thanks to Sanjay for the IR test case.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230856 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-28 16:47:27 +00:00
Eric Christopher
12d1e53db8 Remove option.ll as part of the Forward Control Flow Integrity
removal.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230844 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-28 10:04:18 +00:00
Philip Reames
af690c9cd3 [RewriteStatepointsForGC] Fix another order of iteration bug
It turns out the naming of inserted phis and selects is sensative to the order in which two sets are iterated.  We need to nail this down to avoid non-deterministic output and possible test failures.  

The modified test is the one I first noticed something odd in.  The change is making it more strict to report the error.  With the test change, but without the code change, the test fails roughly 1 in 5.  With the code change, I've run ~30 runs without error.

Long term, the right fix here is to adjust the naming scheme.  I'm checking in this hack to avoid any possible non-determinism in the tests over the weekend.  HJust because I only noticed one case doesn't mean it's actually the only case.  I hope to get to the right change Monday.

std->llvm data structure changes bugfix change #3



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230835 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-28 01:52:09 +00:00
Frederic Riss
2929a7accf [dsymutil] Add the DwarfStreamer class.
This class is responsible for getting the linked data to the
disk in the appropriate form. Today it it an empty shell that
just instantiates an MC layer.

As we do not put anything in the resulting file yet, we just
check it has the right architecture (and check that -o does
the right thing).

To be able to create all the components, this commit adds a
few dependencies to llvm-dsymutil, namely all-targets, MC and
AsmPrinter.

Also add a -no-output option, so that tests that do not need
the binary result can continue to run even if they do not have
the required target linked in.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230824 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-28 00:29:11 +00:00
Philip Reames
a3f59e44cd [RewriteStatepointsForGC] Add tests for the base pointer identification algorithm
These tests cover the 'base object' identification and rewritting portion of RewriteStatepointsForGC.  These aren't completely exhaustive, but they've proven to be reasonable effective over time at finding regressions.

In the process of porting these tests over, I found my first "cleanup per llvm code style standards" bug.  We were relying on the order of iteration when testing the base pointers found for a derived pointer.  When we switched from std::set to DenseSet, this stopped being a safe assumption.  I'm suspecting I'm going to find more of those.  In particular, I'm now really wondering about the main iteration loop for this algorithm.  I need to go take a closer look at the assumptions there.

I'm not really happy with the fact these are testing what is essentially debug output (i.e. enabled via command line flags).  Suggestions for how to structure this better are very welcome.  



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230818 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-28 00:20:48 +00:00
Bill Schmidt
88bbdc790e Regenerated test case from pr 230801 for change in LLVM IR syntax
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230811 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-27 23:29:57 +00:00
David Blaikie
ee62d93f1b Update SystemZ/Large test generators to handle new gep IR syntax
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230810 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-27 23:29:39 +00:00
David Blaikie
834cb56c1b Update SystemZ/Large test generators to handle new load IR syntax
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230809 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-27 23:29:33 +00:00
David Majnemer
7de1732297 llvm-vtabledump: Update field with a better name
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230804 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-27 22:35:25 +00:00
Bill Schmidt
52a5087a4b Revert test case until it can be fixed
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230803 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-27 22:31:14 +00:00
Bill Schmidt
0e1e8e2f62 [PowerPC] Fix PR22711 - Misaligned .toc section
Straightforward patch to emit an alignment directive when emitting a
TOC entry.  The test case was generated from the test in PR22711 that
demonstrated a misaligned .toc section.  The object code is run
through llvm-readobj to verify that the correct alignment has been
applied to the .toc section.

Thanks to Ulrich Weigand for running down where the fix was needed.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230801 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-27 22:14:10 +00:00
David Blaikie
7c9c6ed761 [opaque pointer type] Add textual IR support for explicit type parameter to load instruction
Essentially the same as the GEP change in r230786.

A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)

import fileinput
import sys
import re

pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")

for line in sys.stdin:
  sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))

Reviewers: rafael, dexonsmith, grosser

Differential Revision: http://reviews.llvm.org/D7649

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230794 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-27 21:17:42 +00:00
Charles Davis
dc64962c86 Target/X86: Never use the redzone for Win64 ABI functions.
Summary:
Until now, we did this (among other things) based on whether or not the
target was Windows. This is clearly wrong, not just for Win64 ABI functions
on non-Windows, but for System V ABI functions on Windows, too. In this
change, we make this decision based on the ABI the calling convention
specifies instead.

Reviewers: rnk

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D7953

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230793 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-27 21:11:16 +00:00
Hal Finkel
e03aac601f [PowerPC] Use vector types for memcpy and friends (sometimes)
When using Altivec, we can use vector loads and stores for aligned memcpy and
friends. Starting with the P7 and VXS, we have reasonable unaligned vector
stores. Starting with the P8, we have fast unaligned loads too.

For QPX, we use vector loads are stores, but only for aligned memory accesses.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230788 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-27 19:58:28 +00:00
David Blaikie
198d8baafb [opaque pointer type] Add textual IR support for explicit type parameter to getelementptr instruction
One of several parallel first steps to remove the target type of pointers,
replacing them with a single opaque pointer type.

This adds an explicit type parameter to the gep instruction so that when the
first parameter becomes an opaque pointer type, the type to gep through is
still available to the instructions.

* This doesn't modify gep operators, only instructions (operators will be
  handled separately)

* Textual IR changes only. Bitcode (including upgrade) and changing the
  in-memory representation will be in separate changes.

* geps of vectors are transformed as:
    getelementptr <4 x float*> %x, ...
  ->getelementptr float, <4 x float*> %x, ...
  Then, once the opaque pointer type is introduced, this will ultimately look
  like:
    getelementptr float, <4 x ptr> %x
  with the unambiguous interpretation that it is a vector of pointers to float.

* address spaces remain on the pointer, not the type:
    getelementptr float addrspace(1)* %x
  ->getelementptr float, float addrspace(1)* %x
  Then, eventually:
    getelementptr float, ptr addrspace(1) %x

Importantly, the massive amount of test case churn has been automated by
same crappy python code. I had to manually update a few test cases that
wouldn't fit the script's model (r228970,r229196,r229197,r229198). The
python script just massages stdin and writes the result to stdout, I
then wrapped that in a shell script to handle replacing files, then
using the usual find+xargs to migrate all the files.

update.py:
import fileinput
import sys
import re

ibrep = re.compile(r"(^.*?[^%\w]getelementptr inbounds )(((?:<\d* x )?)(.*?)(| addrspace\(\d\)) *\*(|>)(?:$| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$))")
normrep = re.compile(       r"(^.*?[^%\w]getelementptr )(((?:<\d* x )?)(.*?)(| addrspace\(\d\)) *\*(|>)(?:$| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$))")

def conv(match, line):
  if not match:
    return line
  line = match.groups()[0]
  if len(match.groups()[5]) == 0:
    line += match.groups()[2]
  line += match.groups()[3]
  line += ", "
  line += match.groups()[1]
  line += "\n"
  return line

for line in sys.stdin:
  if line.find("getelementptr ") == line.find("getelementptr inbounds"):
    if line.find("getelementptr inbounds") != line.find("getelementptr inbounds ("):
      line = conv(re.match(ibrep, line), line)
  elif line.find("getelementptr ") != line.find("getelementptr ("):
    line = conv(re.match(normrep, line), line)
  sys.stdout.write(line)

apply.sh:
for name in "$@"
do
  python3 `dirname "$0"`/update.py < "$name" > "$name.tmp" && mv "$name.tmp" "$name"
  rm -f "$name.tmp"
done

The actual commands:
From llvm/src:
find test/ -name *.ll | xargs ./apply.sh
From llvm/src/tools/clang:
find test/ -name *.mm -o -name *.m -o -name *.cpp -o -name *.c | xargs -I '{}' ../../apply.sh "{}"
From llvm/src/tools/polly:
find test/ -name *.ll | xargs ./apply.sh

After that, check-all (with llvm, clang, clang-tools-extra, lld,
compiler-rt, and polly all checked out).

The extra 'rm' in the apply.sh script is due to a few files in clang's test
suite using interesting unicode stuff that my python script was throwing
exceptions on. None of those files needed to be migrated, so it seemed
sufficient to ignore those cases.

Reviewers: rafael, dexonsmith, grosser

Differential Revision: http://reviews.llvm.org/D7636

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230786 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-27 19:29:02 +00:00
Eric Christopher
930da21265 Remove the Forward Control Flow Integrity pass and its dependencies.
This work is currently being rethought along different lines and
if this work is needed it can be resurrected out of svn. Remove it
for now as no current work in ongoing on it and it's unused. Verified
with the authors before removal.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230780 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-27 19:03:38 +00:00
Justin Bogner
b4d6a560c1 Object: Test for reading kext bundles
In the review for r230567, it was pointed out we should really test
the lib/Object part of that change. This does so using llvm-readobj.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230779 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-27 18:58:23 +00:00
Mehdi Amini
26d628d6ce Change the fast-isel-abort option from bool to int to enable "levels"
Summary:
Currently fast-isel-abort will only abort for regular instructions,
and just warn for function calls, terminators, function arguments.
There is already fast-isel-abort-args but nothing for calls and
terminators.

This change turns the fast-isel-abort options into an integer option,
so that multiple levels of strictness can be defined.
This will help no being surprised when the "abort" option indeed does
not abort, and enables the possibility to write test that verifies
that no intrinsics are forgotten by fast-isel.

Reviewers: resistor, echristo

Subscribers: jfb, llvm-commits

Differential Revision: http://reviews.llvm.org/D7941

From: Mehdi Amini <mehdi.amini@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230775 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-27 18:32:11 +00:00
Rafael Espindola
150233c378 Centralize handling of the eh_begin and eh_end labels.
This removes a bit of duplicated code and more importantly, remembers the
labels so that they don't need to be looked up by name.

This in turn allows for any name to be used and avoids a crash if the name
we wanted was already taken.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230772 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-27 18:18:39 +00:00
Renato Golin
636aacf211 Equally to NetBSD, Bitrig/ARM uses the Itanium-ABI.
Patch by Patrick Wildt.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230762 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-27 16:35:27 +00:00
Zoran Jovanovic
2846ef3680 [mips][microMIPS] Change register class for GP register
Differential Revision: http://reviews.llvm.org/D7934


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230760 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-27 15:03:50 +00:00
Petar Jovanovic
8407da0dbc Pass correct -mtriple for krait-cpu-div-attribute.ll
Not passing mtriple for one of the tests caused a regression failure
on MIPS buildbot. The issue was introduced by r230651.

Differential Revision: http://reviews.llvm.org/D7938


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230756 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-27 14:46:41 +00:00
Chandler Carruth
c4179ffed3 [x86] Run most of the rest of the shuffle combining over non-128-bit
vectors. This lets us fix the rest of the v16 lowering problems when
pshufb is clearly better.

We might still be able to improve some of the lowerings by enabling the
other combine-based rewriting to fire for non-128-bit vectors, but this
at least should remove any regressions from using the fancy v16i16
lowering strategy.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230753 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-27 12:13:14 +00:00