Commit Graph

84763 Commits

Author SHA1 Message Date
Hal Finkel
c10d5e9dae Move the PPC TOC defs into the PPC64 InstrInfo file.
Since TOC is just defined for PPC64, move its definition to PPC64 td file.

Patch by Adhemerval Zanella.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163234 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-05 19:22:27 +00:00
Chad Rosier
15515c944a Clean up.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163233 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-05 19:16:22 +00:00
Chad Rosier
581600bfc3 [ms-inline asm] Enumerate the InlineAsm dialects and rename the nsdialect to
inteldialect.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163231 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-05 19:00:49 +00:00
Tim Northover
7bebddf55e Strip old MachineInstrs *after* we know we can put them back.
Previous patch accidentally decided it couldn't convert a VFP to a
NEON instruction after it had already destroyed the old one. Not a
good move.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163230 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-05 18:37:53 +00:00
Benjamin Kramer
b985e9aacd Clean up includes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163229 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-05 18:19:08 +00:00
Jim Grosbach
54b3b308fd Update CMakeList.txt for new lli sources.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163228 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-05 18:15:08 +00:00
Roman Divacky
15d0c81b24 Remove unused typedefs gcc4.8 warns about.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163225 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-05 17:55:46 +00:00
Jim Grosbach
35ed842773 MCJIT: getPointerToFunction() references target address space.
Make sure to return a pointer into the target memory, not the local memory.
Often they are the same, but we can't assume that.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163217 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-05 16:50:40 +00:00
Jim Grosbach
706f03a35d MCJIT: Add faux remote target execution to lli for the MCJIT.
Simulate a remote target address space by allocating a seperate chunk of
memory for the target and re-mapping section addresses to that prior to
execution. Later we'll want to have a truly remote process, but for now
this gets us closer to being able to test the remote target
functionality outside LLDB.

rdar://12157052

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163216 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-05 16:50:34 +00:00
Benjamin Kramer
998d3cca29 Switch BasicAliasAnalysis' cache to SmallDenseMap.
It relies on clear() being fast and the cache rarely has more than 1 or 2
elements, so give it an inline capacity and always shrink it back down in case
it grows. DenseMap will grow to 64 buckets which makes clear() a lot slower.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163215 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-05 16:49:37 +00:00
Pranav Bhandarkar
4c3d3ecdf8 LLVM Bug Fix 13709: Remove needless lsr(Rp, #32) instruction access the
subreg_hireg of register pair Rp.

	* lib/Target/Hexagon/HexagonPeephole.cpp(PeepholeDoubleRegsMap): New
	 DenseMap similar to PeepholeMap that additionally records subreg info
	 too.
        (runOnMachineFunction): Record information in PeepholeDoubleRegsMap
        and copy propagate the high sub-reg of Rp0 in Rp1 = lsr(Rp0, #32) to
	the instruction Rx = COPY Rp1:logreg_subreg.
	* test/CodeGen/Hexagon/remove_lsr.ll: New test.
	



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163214 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-05 16:01:40 +00:00
Kostya Serebryany
7dadac65d3 [asan] fix lint
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163205 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-05 09:00:18 +00:00
Silviu Baranga
3d5e161fe4 Fixed the DAG combiner to better handle the folding of AND nodes for vector types. The previous code was making the assumption that the length of the bitmask returned by isConstantSplat was equal to the size of the vector type. Now we first make sure that the splat value has at least the length of the vector lane type, then we only use as many fields as we have available in the splat value.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163203 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-05 08:57:21 +00:00
Kostya Serebryany
59a4a47a7b [asan] extend the blacklist functionality to handle global-init. Patch by Reid Watson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163199 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-05 07:29:56 +00:00
Craig Topper
4e4e6c0d73 Remove some of the patterns added in r163196. Increasing the complexity on insert_subvector into undef accomplishes the same thing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163198 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-05 07:26:35 +00:00
Craig Topper
c17177f893 Add patterns for integer forms of VINSERTF128/VINSERTI128 folded with loads. Also add patterns to turn subvector inserts with loads to index 0 of an undef into VMOVAPS.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163196 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-05 06:58:39 +00:00
Chad Rosier
27b25c2076 Add a FIXME that assumes we maintain backward compatibility until the next major release.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163195 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-05 06:28:52 +00:00
Logan Chien
ec90cc8b0f Reorder the comments of EmitExceptionTable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163194 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-05 06:28:26 +00:00
Logan Chien
fd91d8dd7e Fix UseInitArray option for MIPS target.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163193 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-05 06:17:17 +00:00
Craig Topper
f6dc792df1 Convert vextracti128/vextractf128 intrinsics to extract_subvector at DAG build time. Similar was previously done for vinserti128/vinsertf128. Add patterns for folding these extract_subvectors with stores.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163192 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-05 05:48:09 +00:00
Marshall Clow
f7e0ea6627 Removed Trie.h; unused in a long time
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163191 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-05 03:18:55 +00:00
Richard Smith
a89fb0f170 Remove redundant semicolons to fix -pedantic-errors build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163190 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-05 01:41:37 +00:00
Chad Rosier
5d637d7e93 Fix function name per coding standard.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163187 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-05 01:15:43 +00:00
Chad Rosier
90e11f8c95 Fix function name per coding standard.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163186 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-05 01:02:38 +00:00
Chad Rosier
f16ae58891 [ms-inline asm] Add support for the nsdialect keyword in the Bitcode
Reader/Writer.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163185 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-05 00:56:20 +00:00
Chad Rosier
71f359a876 [ms-inline asm] Add the nsdialect keyword to the lexer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163184 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-05 00:51:02 +00:00
Chad Rosier
36547343ab [ms-inline asm] Emit the (new) inline asm Non-Standard Dialect attribute.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163181 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-05 00:08:17 +00:00
Dan Gohman
230768bd13 Make provenance checking conservative in cases when
pointers-to-strong-pointers may be in play. These can lead to retains and
releases happening in unstructured ways, foiling the optimizer. This fixes
rdar://12150909.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163180 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-04 23:16:20 +00:00
Jakub Staszak
be11991208 BypassSlowDivision: Assign to reference, don't copy the object.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163179 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-04 23:11:11 +00:00
Jakob Stoklund Olesen
f363ebdb03 Search the whole instruction for tied operands.
Implicit uses can be dynamically tied to defs. This will soon be used
for predicated instructions on ARM.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163177 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-04 22:59:30 +00:00
Chad Rosier
03fe8f6ab6 [ms-inline asm] Add the inline assembly dialect, AsmDialect, to the InlineAsm
class.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163175 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-04 22:46:24 +00:00
Chad Rosier
4e2132e7ae [ms-inline asm] Remove the Inline Asm Non-Standard Dialect attribute. This
implementation does not co-exist well with how the sideeffect and alignstack
attributes are handled.  The reverts r161641.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163174 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-04 22:29:45 +00:00
David Blaikie
7a9572f8af [LIT] Add a clang_tools_extra_site_cfg to match the various other site_cfg.
This doesn't seem ideal, perhaps we could just keep the llvm_site_cfg and have
other config (clang and clang-tools-extra) derive their site_cfg from that.

Suggestions/complaints/ideas welcome.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163171 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-04 22:09:04 +00:00
Jakub Staszak
ed0e3a31e1 Fix my previous patch (r163164). It does now what it is supposed to do:
Doesn't set MadeChange to TRUE if BypassSlowDivision doesn't change anything.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163165 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-04 21:16:59 +00:00
Jakub Staszak
7b2d20d060 Return false if BypassSlowDivision doesn't change anything.
Also a few minor changes:
- use pre-inc instead of post-inc
- use isa instead of dyn_cast
- 80 col
- trailing spaces


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163164 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-04 20:48:24 +00:00
Jakub Staszak
f2d8190b81 Remove unneeded code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163160 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-04 19:49:17 +00:00
Jakob Stoklund Olesen
4f1a56ce3c Typo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163154 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-04 18:44:43 +00:00
Jakob Stoklund Olesen
99c416c9f7 Actually use the MachineOperand field for isRegTiedToDefOperand().
The MachineOperand::TiedTo field was maintained, but not used.

This patch enables it in isRegTiedToDefOperand() and
isRegTiedToUseOperand() which are the actual functions use by the
register allocator.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163153 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-04 18:43:25 +00:00
Jakob Stoklund Olesen
daddf07497 Move tie checks into MachineVerifier::visitMachineOperand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163152 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-04 18:38:28 +00:00
Jakob Stoklund Olesen
9c13067276 Allow tied uses and defs in different orders.
After much agonizing, use a full 4 bits of precious MachineOperand space
to encode this. This uses existing padding, and doesn't grow
MachineOperand beyond its current 32 bytes.

This allows tied defs among the first 15 operands on a normal
instruction, just like the current MCInstrDesc constraint encoding.
Inline assembly needs to be able to tie more than the first 15 operands,
and gets special treatment.

Tied uses can appear beyond 15 operands, as long as they are tied to a
def that's in range.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163151 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-04 18:36:28 +00:00
Preston Gurd
2e2efd9600 Generic Bypass Slow Div
- CodeGenPrepare pass for identifying div/rem ops
- Backend specifies the type mapping using addBypassSlowDivType
- Enabled only for Intel Atom with O2 32-bit -> 8-bit
- Replace IDIV with instructions which test its value and use DIVB if the value
is positive and less than 256.
- In the case when the quotient and remainder of a divide are used a DIV
and a REM instruction will be present in the IR. In the non-Atom case
they are both lowered to IDIVs and CSE removes the redundant IDIV instruction,
using the quotient and remainder from the first IDIV. However,
due to this optimization CSE is not able to eliminate redundant
IDIV instructions because they are located in different basic blocks.
This is overcome by calculating both the quotient (DIV) and remainder (REM)
in each basic block that is inserted by the optimization and reusing the result
values when a subsequent DIV or REM instruction uses the same operands.
- Test cases check for the presents of the optimization when calculating
either the quotient, remainder,  or both.

Patch by Tyler Nowicki!



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163150 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-04 18:22:17 +00:00
Bob Wilson
e20cf3d149 Make sure macros in the include subdirectory are not used without being defined.
Rationale: For each preprocessor macro, either the definedness is what's
meaningful, or the value is what's meaningful, or both. If definedness is
meaningful, we should use #ifdef. If the value is meaningful, we should use
and #ifdef interchangeably for the same macro, seems ugly to me, even if
undefined macros are zero if used.

This also has the benefit that including an LLVM header doesn't prevent
you from compiling with -Wundef -Werror.

Patch by John Garvin!
<rdar://problem/12189979>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163148 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-04 17:42:53 +00:00
Sergei Larin
3e59040810 Porting Hexagon MI Scheduler to the new API.
Change current Hexagon MI scheduler to use new converging
scheduler. Integrates DFA resource model into it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163137 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-04 14:49:56 +00:00
Arnold Schwaighofer
67514e9066 Patch to implement UMLAL/SMLAL instructions for the ARM architecture
This patch corrects the definition of umlal/smlal instructions and adds support
for matching them to the ARM dag combiner.

Bug 12213

Patch by Yin Ma!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163136 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-04 14:37:49 +00:00
Elena Demikhovsky
3251020738 This patch optimizes shuffle instruction - generates 2 instructions instead of 4.
Since this specific shuffle is widely used in many workloads we have ~10% performance on them.

shufflevector <8 x float> %A, <8 x float> %B, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>

vmovaps (%rdx), %ymm0
vshufps $8, %ymm0, %ymm0, %ymm0
vmovaps (%rcx), %ymm1
vshufps $8, %ymm0, %ymm1, %ymm1
vunpcklps       %ymm0, %ymm1, %ymm0

vmovaps (%rcx), %ymm0
vmovsldup       (%rdx), %ymm1
vblendps        $85, %ymm0, %ymm1, %ymm0


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163134 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-04 12:49:02 +00:00
Nadav Rotem
7765492a7a LICM may hoist an instruction with undefined behavior above a trap.
Scan the body of the loop and find instructions that may trap.
Use this information when deciding if it is safe to hoist or sink instructions.
Notice that we can optimize the search of instructions that may throw in the case of nested loops.

rdar://11518836



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163132 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-04 10:25:04 +00:00
Evgeniy Stepanov
68d92bdcc9 Fix Android build of gtest and lib/Support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163131 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-04 09:14:45 +00:00
Alexey Samsonov
5eae90d727 Add support for fetching inlining context (stack of source code locations)
by instruction address from DWARF.

Add --inlining flag to llvm-dwarfdump to demonstrate and test this functionality,
so that "llvm-dwarfdump --inlining --address=0x..." now works much like
"addr2line -i 0x...", provided that the binary has debug info
(Clang's -gline-tables-only *is* enough).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163128 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-04 08:12:33 +00:00
Bob Wilson
2d5c28da0d Be conservative about allocations that may alias the accessed pointer.
If an allocation has a must-alias relation to the access pointer, we treat it
as a Def.  Otherwise, without this check, the code here was just skipping over
the allocation call and ignoring it.  I noticed this by inspection and don't
have a specific testcase that it breaks, but it seems like we need to treat
a may-alias allocation as a Clobber.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163127 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-04 03:30:13 +00:00
Chad Rosier
2dc88d94c3 [ms-inline asm] Make comment more verbose and add an assert.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163125 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-03 20:37:01 +00:00